My Inquiry
My Account
Vishay Siliconix DG4053EEY-T1-GE3
- Part No.:
- DG4053EEY-T1-GE3
- Manufacturer:
- Vishay Siliconix
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DG4053EEY-T1-GE3.pdf
- Description:
- IC SWITCH SPDT X 3 78OHM 16SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:8,117
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DG4053EEY-T1-GE3 from Vishay Siliconix is a triple 2-channel (triple SPDT) CMOS analog multiplexer designed for high-precision signal routing in test and measurement systems. It features 0.3 pC typical charge injection, 8.5 pF typical channel-on capacitance (CD(on)), and 2.0 pF typical source-off capacitance (CS(off)), operating from ±3 V to ±8 V dual supplies or 3 V to 16 V single supply - ideal for rail-to-rail audio and sensor signal switching in battery-powered data acquisition.
For engineers reviewing the DG4053EEY-T1-GE3 datasheet, DG4053EEY-T1-GE3 pinout, DG4053EEY-T1-GE3 application, or DG4053EEY-T1-GE3 equivalent, key selection criteria include its guaranteed 3 V logic compatibility, -40 °C to +125 °C extended temperature range, low leakage (<50 pA), and bi-directional analog conduction - critical for precision multiplexing in medical instrumentation and automated test equipment.
Technical Context
The DG4053EEY-T1-GE3 implements three independent SPDT switches controlled by a 3-bit binary address (A, B, C) and a global ENABLE input. All switches conduct bidirectionally with rail-to-rail analog voltage handling, supporting both multiplexer and demultiplexer configurations without signal polarity constraints.
Its architecture delivers fast enable-controlled switching (tON = 35 ns typ. at ±5 V), low crosstalk (-62 dB at 10 MHz), and high off-isolation (-68 dB at 10 MHz), enabled by low parasitic capacitance and matched on-resistance (ΔRON ≤ 6 Ω over full temperature range).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Analog Configuration | Triple SPDT (3 independent 2:1 switches) |
| Supply Range | ±3 V to ±8 V dual or 3 V to 16 V single - supports legacy ±5 V and modern 3.3 V/5 V systems |
| Charge Injection | 0.3 pC max over full signal swing - minimizes settling error in sample-and-hold and ADC front-ends |
| On-Resistance (RON) | 68 Ω typ. at ±5 V - ensures low insertion loss for precision signal paths |
| Off-Leakage Current | <50 pA max at -40 °C to +125 °C - preserves accuracy in high-impedance sensor interfaces |
| Bandwidth | 930 MHz (3 dB) - enables wideband RF and video signal routing |
| Operating Temperature | -40 °C to +125 °C - qualified for industrial and automotive under-hood environments |
Pinout & Package
Package: 16-pin narrow SOIC (JEDEC MS-012), 10.0 mm × 4.0 mm × 1.5 mm body, surface-mount, RoHS-compliant lead (Pb)-free finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 | X0, Y0, Z0 (Common terminals) | Three independent SPDT common inputs - each connects to one of two associated switched outputs |
| 5, 6, 7, 8 | X1, Y1, Z1 (Switched outputs) | Three independent SPDT normally-open outputs - selected when corresponding A/B/C = H |
| 9, 10 | V+, V- | Analog supply rails - define full analog signal range (e.g., ±5 V → -5 V to +5 V) |
| 11, 12, 13 | A, B, C | 3-bit binary address inputs - select active switch pair per channel (000–111) |
| 14 | ENABLE | Active-low global enable - disables all switches when HIGH |
| 15, 16 | GND, NC | Ground reference and no-connect (pin 16 is unused per datasheet) |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail analog switching | Supports full-swing signals from V− to V+ without clipping - essential for unipolar and bipolar sensor interfaces |
| 3 V logic-compatible control | Guaranteed VIH = 1.4 V min. at 3 V supply - interoperable with low-voltage microcontrollers and FPGAs |
| Low charge injection (≤0.3 pC) | Reduces voltage glitch on sampled nodes - improves DC accuracy in precision data acquisition |
| Bi-directional conduction | Enables reuse as both multiplexer and demultiplexer in same PCB layout - reduces component count |
| Extended temperature operation | Specified from -40 °C to +125 °C - suitable for industrial automation and automotive diagnostic tools |
Applications
| Automatic Test Equipment (ATE) | Medical Instrumentation |
|---|---|
Use Scenario: High-speed channel scanning across multiple sensor inputs in benchtop ATE racks. IC Role / Device Role / Timing Role: Triple SPDT analog switch routing calibrated reference signals and DUT outputs to shared ADC/DAC channels. Use Value: 35 ns enable turn-on time and <50 pA leakage ensure sub-LSB error in 16-bit measurements at 10 kSPS. |
Use Scenario: Multiplexing ECG, EEG, and temperature sensor outputs in portable patient monitors. IC Role / Device Role / Timing Role: Low-charge-injection analog switch enabling accurate DC-coupled bio-potential acquisition without baseline shift. Use Value: 0.3 pC charge injection and rail-to-rail operation preserve µV-level signal integrity across ±2.5 V sensor ranges. |
| Data Acquisition Systems | Audio Signal Routing |
Use Scenario: Channel selection in modular DAQ modules with simultaneous sampling requirements. IC Role / Device Role / Timing Role: Triple SPDT switch providing matched on-resistance (ΔRON ≤ 6 Ω) across all three channels for gain/offset calibration consistency. Use Value: On-resistance flatness of 20 Ω max ensures linear response over full ±5 V input range - critical for calibrated thermocouple inputs. |
Use Scenario: Input/output switching in professional audio mixers and effects processors. IC Role / Device Role / Timing Role: Bidirectional analog switch routing line-level stereo signals between processing stages and I/O jacks. Use Value: 930 MHz bandwidth and -62 dB crosstalk at 10 MHz prevent audible inter-channel bleed in 20 kHz audio paths. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar analog multiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4619ESE+ | Single SPDT, 3.5 Ω RON, 30 ns tON, but only one switch per package - requires 3x units for triple function | Limited to single-channel use; lacks integrated triple configuration and address decoding | Select when lowest on-resistance is prioritized over integration density and board space |
| ADG732BRUZ | 32-channel single-pole, 4.5 Ω RON, SPI interface, but higher charge injection (1.5 pC) and no ENABLE pin | Designed for high-channel-count digital control, not discrete triple-SPDT routing | Select for large-scale multiplexing with microcontroller serial control - not drop-in replacement |
Compared with MAX4619ESE+ and ADG732BRUZ, the DG4053EEY-T1-GE3 uniquely integrates three independent SPDT switches with parallel address control and global ENABLE in a single SOIC-16 package - reducing BOM count, layout complexity, and timing skew in multi-path signal conditioning.
Availability
DG4053EEY-T1-GE3 is available at Aetrix Electronics and suitable for automatic test equipment, medical instrumentation, and data acquisition systems requiring stable component supply across extended temperature and long product lifecycles.
Supply support for DG4053EEY-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix designs high-performance analog and discrete semiconductors, specializing in precision switches, MOSFETs, and power ICs for industrial, automotive, and computing markets.
The DG4053EEY-T1-GE3 belongs to Vishay's DG405xE family of low-charge-injection analog multiplexers, engineered specifically for high-fidelity signal routing in test, measurement, and medical applications where DC accuracy and dynamic performance are co-critical.
FAQ
What is the maximum analog signal voltage range supported by the DG4053EEY-T1-GE3?
The DG4053EEY-T1-GE3 supports analog signals from V− to V+ across its full specified supply range: ±3 V to ±8 V dual supply (e.g., -5 V to +5 V) or 3 V to 16 V single supply (e.g., 0 V to 5 V or 0 V to 12 V). Absolute maximum ratings allow V+ to V− up to 18 V, but operational signal range is bounded by the applied supply rails. This rail-to-rail capability is confirmed in the "Analog Signal Range" specification table for all tested supply conditions.
Does the DG4053EEY-T1-GE3 support 3 V logic inputs when powered from ±5 V supplies?
Yes. The DG4053EEY-T1-GE3 guarantees a 2 V minimum logic-high threshold (VIH) when operated from ±5 V supplies, making it fully compatible with standard 3 V CMOS logic levels. This is explicitly documented in the "Digital Control" section under "Input Current, VIN High" test conditions and confirmed in the truth table for ENABLE and address inputs A, B, and C.
How does the charge injection performance of the DG4053EEY-T1-GE3 impact precision sampling circuits?
The DG4053EEY-T1-GE3 specifies ≤0.3 pC typical charge injection over the full analog voltage range, directly limiting voltage glitch on sampling capacitors. For example, with a 1 nF hold capacitor, this yields ≤0.3 mV step error - enabling sub-12-bit accuracy in sample-and-hold stages without additional correction. This value is measured per Figure 13 in the datasheet and applies across -40 °C to +125 °C.
Is the DG4053EEY-T1-GE3 pin-compatible with other members of the DG405xE family?
No. While DG4051E (8-channel), DG4052E (dual 4-channel), and DG4053E (triple SPDT) share identical pinouts in the same package type (e.g., TSSOP-16 or SOIC-16), the DG4053EEY-T1-GE3 uses the narrow SOIC-16 footprint (JEDEC MS-012), whereas DG4051EEY-T1-GE3 and DG4052EEY-T1-GE3 use the same package. Pin mapping is consistent across the family for shared pins (V+, V−, GND, ENABLE, A/B/C), but channel terminal assignments differ per device function.
What thermal derating applies to the DG4053EEY-T1-GE3 in narrow SOIC package?
In the 16-pin narrow SOIC package (DG4053EEY-T1-GE3), thermal resistance is 125 °C/W, and power dissipation must be derated at 6.6 mW/°C above 70 °C ambient. This is specified in the "Absolute Maximum Ratings" table under "Thermal Resistance" and "Power Dissipation" notes. At 125 °C case temperature, maximum allowable power drops to approximately 300 mW.
DG4053EEY-T1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Switch Circuit:
- SPDT
- Multiplexer/Demultiplexer Circuit:
- 2:1
- Number of Circuits:
- 3
- On-State Resistance (Max):
- 78Ohm
- Channel-to-Channel Matching (ΔRon):
- 910mOhm
- Voltage - Supply, Single (V+):
- 3V ~ 16V
- Voltage - Supply, Dual (V±):
- ±3V ~ 8V
- Switch Time (Ton, Toff) (Max):
- 75ns, 88ns
- -3db Bandwidth:
- 930MHz
- Charge Injection:
- 0.3pC
- Channel Capacitance (CS(off), CD(off)):
- 2pF, 3.1pF
- Current - Leakage (IS(off)) (Max):
- 1nA
- Crosstalk:
- -105dB @ 100kHz
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
DG4053EEY-T1-GE3 FAQ
1.How can I place an order for DG4053EEY-T1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG4053EEY-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG4053EEY-T1-GE3 reliable?
The price and inventory of DG4053EEY-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG4053EEY-T1-GE3 is usually 5 days.
3.What payment methods are accepted for DG4053EEY-T1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG4053EEY-T1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG4053EEY-T1-GE3?
DG4053EEY-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG4053EEY-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG4053EEY-T1-GE3?
For technical support, including DG4053EEY-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG4053EEY-T1-GE3 requirements.
6.How does Aetrix verify that DG4053EEY-T1-GE3 is sourced from the original manufacturer or authorized distributors?
All DG4053EEY-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG4053EEY-T1-GE3 meets industry standards.
7.What is the process for return or replacement of DG4053EEY-T1-GE3?
All DG4053EEY-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with DG4053EEY-T1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG4053EEY-T1-GE3 part is unused and in its original packaging.
Return procedure for DG4053EEY-T1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DG4053EEY-T1-GE3 Tags
-
SN74LVC1G3157DBVR
Texas Instruments
-
SN74LVC1G66DBVR
Texas Instruments
-
SN74LVC1G66DCKR
Texas Instruments
-
SN74LVC1G3157DSFR
Texas Instruments
-
1P1G3157QDCKRQ1
Texas Instruments
-
SN74LVC2G66DCUR
Texas Instruments
-
SN74LV4052APWR
Texas Instruments
-
74HC4051D,653
Nexperia USA Inc.
-
SN74LV4051APWR
Texas Instruments
-
CD74HC4052PWR
Texas Instruments
-
CD74HC4051PWR
Texas Instruments
-
TS5A3166DBVR
Texas Instruments
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
