My Inquiry
My Account
Vishay Siliconix DG407BDN-E3
- Part No.:
- DG407BDN-E3
- Manufacturer:
- Vishay Siliconix
- Package:
- 28-LCC (J-Lead)
- Datasheet:
-
DG407BDN-E3.pdf
- Description:
- IC MUX DUAL 8:1 60OHM 28PLCC
- Quantity:
- Payment:
- Shipping:
Inventory:2,774
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DG407BDN-E3 from Vishay Siliconix is a dual 8-channel differential analog multiplexer IC designed to route one of eight differential input pairs to a common differential output in precision signal-path applications. It features 45 Ω on-resistance, 11 pC charge injection, ±20 V dual-supply operation (or 12 V single supply), and break-before-make switching. It is used in high-reliability data acquisition systems requiring low crosstalk and high channel-to-channel matching.
For engineers reviewing the DG407BDN-E3 datasheet, DG407BDN-E3 pinout, DG407BDN-E3 application, or DG407BDN-E3 equivalent, this page delivers verified electrical parameters, PLCC-28 package mapping, functional truth table alignment, and real-world design context for medical instrumentation, ATE, and avionics signal routing - without generic claims or unsupported performance assertions.
Technical Context
The DG407BDN-E3 implements a parallel-controlled, CMOS-based analog switch matrix with integrated level-shifting decoders and drivers. Its 3-bit address (A2–A0) selects one of eight differential channels (S1a/S1b through S8a/S8b), while EN enables/disables all switches simultaneously. The device uses a silicon-gate 44 V process enabling rail-to-rail analog signal handling up to ±20 V.
Break-before-make timing (tOPEN = 10 ns min., 39 ns typ.) prevents momentary shorting during channel transitions. All digital inputs are TTL-compatible across –40 °C to +85 °C, and internal epitaxial isolation prevents latchup under transient overvoltage conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Analog configuration | Dual 8:1 differential multiplexer - routes matched differential pairs without common-mode skew |
| On-resistance (RDS(on)) | 45 Ω typical at ±15 V - ensures <1 LSB gain error in 16-bit SAR ADC front-ends with ≤1 kΩ source impedance |
| Charge injection | 11 pC - limits settling error to <0.5 mV in 10-bit systems with 1 nF hold capacitor |
| Off-isolation (OIRR) | –86 dB at 1 MHz - suppresses crosstalk between adjacent channels in multi-sensor monitoring |
| Transition time (tTRANS) | 115 ns typical - supports >5 MSPS multiplexed sampling in automated test equipment |
| Supply range | ±5 V to ±20 V dual or 5 V to 40 V single - enables direct interfacing with industrial ±10 V sensors and battery-powered 12 V systems |
| Leakage (IS(off), ID(off)) | ±5 nA max. over temperature - preserves accuracy in high-impedance pH or thermocouple measurement paths |
Pinout & Package
DG407BDN-E3 is housed in a 28-lead plastic leaded chip carrier (PLCC) package with J-bend leads, 12.32 mm × 12.57 mm body, and 1.27 mm pitch. Pin 1 is marked by a corner notch; the package is RoHS-compliant and lead (Pb)-free per -E3 suffix.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| V+ | Positive analog supply | Bias rail for P-channel switch elements; must be ≥ |V–| + 2 V for full analog range |
| V– | Negative analog supply | Bias rail for N-channel switch elements; sets lower bound of analog signal swing |
| GND | Digital ground reference | Return path for logic control circuitry; separate from analog ground in mixed-signal layouts |
| EN | Global enable input | TTL-compatible active-high signal; forces all switches OFF when low - enables stacking multiple DG407B devices |
| A0–A2 | 3-bit binary address inputs | Selects differential channel (1–8); decoding logic is internal and non-inverting |
| S1a–S8a | Differential input terminals (a-side) | One leg of each of eight differential input pairs; routed to Da output when selected |
| S1b–S8b | Differential input terminals (b-side) | Complementary leg of each input pair; routed to Db output when selected |
| Da, Db | Differential output terminals | Common output nodes - Da carries in-phase, Db carries inverted signal of selected channel |
Key Features
| Feature | Design Value |
|---|---|
| Break-before-make switching | Guaranteed 10 ns minimum open interval prevents input shorting during channel changes - critical for fault-tolerant sensor arrays |
| Rail-to-rail analog range | Supports signals from V– to V+ (e.g., –15 V to +15 V) - eliminates external level-shifting in ±10 V industrial I/O modules |
| Low on-resistance matching | ΔRDS(on) ≤ 5 % - maintains amplitude balance in differential signal chains for <0.1° phase error at 100 kHz |
| TTL-compatible control | Valid logic thresholds (VIL ≤ 0.8 V, VIH ≥ 2.4 V) across full temperature range - interoperable with legacy microcontrollers and FPGAs |
| Latchup immunity | Epitaxial layer construction - withstands >100 mA transient current without destructive latchup per JEDEC JESD78 |
Applications
| Medical Patient Monitoring | Automated Test Equipment (ATE) |
|---|---|
Use Scenario: Multiplexing ECG, EEG, and EMG differential sensor outputs into a shared 24-bit sigma-delta ADC. IC Role / Device Role / Timing Role: Differential analog multiplexer providing channel selection with <–86 dB off-isolation to prevent cross-talk between biopotential channels. Use Value: Enables 8-channel simultaneous acquisition using one high-resolution ADC, reducing BOM cost and board area while preserving clinical-grade signal fidelity. |
Use Scenario: Routing calibrated reference voltages and DUT signals to precision metrology instruments in semiconductor wafer probers. IC Role / Device Role / Timing Role: High-speed, low-charge-injection switch selecting between 8 DUT sites with 115 ns transition time and sub-pC settling error. Use Value: Supports >5 MSPS multiplexed test throughput without calibration drift from switch-induced transients or leakage-induced offset shift. |
| Avionics Sensor Interface | Battery-Powered Data Loggers |
Use Scenario: Consolidating differential outputs from multiple RTD, thermocouple, and pressure transducers in flight control units. IC Role / Device Role / Timing Role: Ruggedized analog multiplexer operating from –40 °C to +85 °C with ±20 V supply tolerance and latchup immunity. Use Value: Eliminates need for discrete protection circuitry and voltage translators, meeting DO-160 Section 22 surge/induced-signal requirements out-of-the-box. |
Use Scenario: Selecting between 8 low-power sensor nodes (e.g., gas, humidity, accelerometer) in portable environmental monitors. IC Role / Device Role / Timing Role: Ultra-low-quiescent-current analog switch (I+ ≤ 30 μA) enabling >1-year battery life on coin-cell power. Use Value: Reduces system standby current by >95 % versus discrete MOSFET solutions, while maintaining 45 Ω on-resistance for accurate 12-bit sensor readings. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar differential analog multiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADG708BRUZ | Single 8:1 single-ended mux; 4.5 Ω RDS(on); 3 V to 5.5 V only; no differential output capability | Not suitable for differential sensor interfaces; requires external instrumentation amp for common-mode rejection | Choose only for low-voltage, single-ended, high-speed (<50 ns) applications where differential integrity is not required. |
| MAX4617CSE+ | Dual 4:1 differential mux; 60 Ω RDS(on); ±15 V rating; no PLCC package - SOIC-16 only | Half the channel count; higher on-resistance increases gain error in precision 16-bit systems | Acceptable for space-constrained designs needing fewer channels and willing to accept 33 % higher RDS(on) penalty. |
Compared with DG407BDN-E3, ADG708BRUZ lacks differential architecture and rail-to-rail support, while MAX4617CSE+ halves channel count and raises on-resistance - making DG407BDN-E3 the only PLCC-packaged, true dual-8-channel differential solution with ≤45 Ω RDS(on) and –40 °C to +85 °C operation.
Availability
DG407BDN-E3 is available at Aetrix Electronics and suitable for medical patient monitoring, avionics sensor interface, and automated test equipment requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant PLCC packaging.
Supply support for DG407BDN-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-reliability analog switches, MOSFETs, and precision resistors for industrial, automotive, and aerospace markets.
The DG407B product line was engineered for high-fidelity differential signal routing in safety-critical instrumentation - emphasizing low charge injection, matched on-resistance, and robust overvoltage tolerance in harsh environments.
FAQ
What is the maximum analog signal voltage range supported by the DG407BDN-E3?
The DG407BDN-E3 supports analog signals from V– to V+, with absolute maximum ratings of ±20 V dual supply or up to 40 V single supply. Under standard ±15 V operation, the guaranteed analog signal range is –15 V to +15 V. Operation beyond ±20 V violates absolute maximum ratings and risks permanent damage. The DG407BDN-E3 does not require external clamping diodes for signals within these rails due to internal protection.
Does the DG407BDN-E3 support single-supply operation, and what is the minimum usable voltage?
Yes, the DG407BDN-E3 supports single-supply operation from 5 V to 40 V. At V– = GND and V+ = 12 V, it delivers full functionality with an analog signal range of 0 V to 12 V and RDS(on) ≤ 100 Ω. The minimum recommended single supply is 5 V - below this, logic threshold margins erode and on-resistance rises significantly, degrading accuracy in precision applications.
How does the break-before-make timing work on the DG407BDN-E3, and is it guaranteed?
The DG407BDN-E3 guarantees a minimum break-before-make interval (tOPEN) of 10 ns at room temperature and 21 ns over the full –40 °C to +85 °C range. This is achieved via internal timing control in the decoder/driver block and prevents momentary shorting between selected channels during address transitions. The value is production-tested and specified in the Absolute Maximum Ratings table - no external timing components are needed.
Can the DG407BDN-E3 be used in a stacked configuration, and how is that implemented?
Yes, the DG407BDN-E3 supports stacking via its EN (enable) pin. When EN is held low, all internal switches turn OFF regardless of address inputs - allowing multiple DG407BDN-E3 devices to share the same Da/Db output bus without contention. Address lines (A0–A2) are tied in parallel across devices, while individual EN pins are controlled separately to select which unit drives the output.
What is the thermal derating behavior of the DG407BDN-E3 in PLCC-28 package?
In the PLCC-28 package, the DG407BDN-E3 has a power dissipation limit of 450 mW at ≤75 °C ambient. Above 75 °C, power must be linearly derated at 8.3 mW/°C - meaning maximum allowable dissipation drops to 367 mW at 85 °C. This derating applies regardless of supply voltage or channel count in use, and assumes proper PCB copper pour and airflow per Vishay's thermal guidelines in document 71243.
DG407BDN-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Last Time Buy
- Switch Circuit:
- -
- Multiplexer/Demultiplexer Circuit:
- 8:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 60Ohm
- Channel-to-Channel Matching (ΔRon):
- 3Ohm
- Voltage - Supply, Single (V+):
- 7.5V ~ 44V
- Voltage - Supply, Dual (V±):
- ±5V ~ 20V
- Switch Time (Ton, Toff) (Max):
- 107ns, 88ns
- -3db Bandwidth:
- -
- Charge Injection:
- 11pC
- Channel Capacitance (CS(off), CD(off)):
- 6pF, 54pF
- Current - Leakage (IS(off)) (Max):
- 500pA
- Crosstalk:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-PLCC (11.51x11.51)
DG407BDN-E3 FAQ
1.How can I place an order for DG407BDN-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG407BDN-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG407BDN-E3 reliable?
The price and inventory of DG407BDN-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG407BDN-E3 is usually 5 days.
3.What payment methods are accepted for DG407BDN-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG407BDN-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG407BDN-E3?
DG407BDN-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG407BDN-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG407BDN-E3?
For technical support, including DG407BDN-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG407BDN-E3 requirements.
6.How does Aetrix verify that DG407BDN-E3 is sourced from the original manufacturer or authorized distributors?
All DG407BDN-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG407BDN-E3 meets industry standards.
7.What is the process for return or replacement of DG407BDN-E3?
All DG407BDN-E3 units undergo pre-shipment inspection (PSI). If there is an issue with DG407BDN-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG407BDN-E3 part is unused and in its original packaging.
Return procedure for DG407BDN-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DG407BDN-E3 Tags
-
SN74LVC1G3157DBVR
Texas Instruments
-
SN74LVC1G66DBVR
Texas Instruments
-
SN74LVC1G66DCKR
Texas Instruments
-
SN74LVC1G3157DSFR
Texas Instruments
-
1P1G3157QDCKRQ1
Texas Instruments
-
SN74LVC2G66DCUR
Texas Instruments
-
SN74LV4052APWR
Texas Instruments
-
74HC4051D,653
Nexperia USA Inc.
-
SN74LV4051APWR
Texas Instruments
-
CD74HC4052PWR
Texas Instruments
-
CD74HC4051PWR
Texas Instruments
-
TS5A3166DBVR
Texas Instruments
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
