Vishay Siliconix DG408LDY-E3
- Part No.:
- DG408LDY-E3
- Manufacturer:
- Vishay Siliconix
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DG408LDY-E3.pdf
- Description:
- IC MUX 8:1 29OHM 16SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DG408LDY-E3 from Vishay Siliconix is an 8-channel single-ended analog multiplexer IC designed to route one of eight analog inputs to a common output under 3-bit binary address control (A0–A2). It operates from 3 V to 12 V single supply or ±3 V to ±6 V dual supply, delivers 17 Ω typical on-resistance, 38 ns enable turn-on time, and guarantees break-before-make switching-ideal for precision data acquisition and battery-powered test equipment.
For engineers reviewing the DG408LDY-E3 datasheet, DG408LDY-E3 pinout, DG408LDY-E3 application, or DG408LDY-E3 equivalent, key selection criteria include its low 0.2 nA max off-leakage, 1 pC charge injection, 82 dB off-isolation at 1 MHz, TTL/CMOS/LV logic compatibility, and SOIC-16 package suitability for space-constrained mixed-signal PCB layouts.
Technical Context
The DG408LDY-E3 implements BiCMOS process technology to achieve low on-resistance flatness (≤7 Ω), fast transition times (≤60 ns), and guaranteed break-before-make operation across all channels. Its digital interface accepts logic thresholds as low as 0.4 V (low) and 2.0 V (high) at 3 V supply, enabling direct interfacing with modern low-voltage microcontrollers.
It supports rail-to-rail analog signal handling (0–12 V single supply, ±5 V dual supply), with channel leakage tightly controlled (±10 nA max over temperature) and ESD robustness rated at 2000 V HBM-critical for portable instrumentation and industrial sensor front-ends where signal integrity and reliability are non-negotiable.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Analog Channels | 8 single-ended inputs to 1 common output; enables compact multi-sensor or multi-channel ADC front-end routing |
| On-Resistance (RDS(on)) | 17 Ω typ. at 12 V supply; ensures minimal signal attenuation and gain error in precision measurement paths |
| Switching Speed | tON(EN) = 38 ns typ., tOFF(EN) = 18 ns typ.; supports high-throughput sampling in >10 MSPS data acquisition systems |
| Charge Injection | 1 pC typ.; reduces settling error and droop in sample-and-hold circuits without requiring oversized hold capacitors |
| Off-Isolation | 82 dB at 1 MHz; suppresses crosstalk between inactive channels in dense analog routing applications |
| Supply Range | 3–12 V single supply or ±3 V to ±6 V dual supply; allows flexible integration into both low-power portable and industrial-grade systems |
| Logic Compatibility | TTL, CMOS, and LV logic (3 V); eliminates level-shifting requirements when driven by FPGA I/O or ARM GPIO |
Pinout & Package
Package: 16-pin SOIC (narrow, JEDEC MS-012), body dimensions 9.9 mm × 3.9 mm × 1.5 mm, lead pitch 1.27 mm, RoHS-compliant matte tin lead finish (E3 suffix).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (S1) | Analog Input Channel 1 | First of eight bidirectional analog signal terminals; routed to D when A2:A0 = 000 and EN = high |
| 2 (S2) | Analog Input Channel 2 | Second analog input; selected when address = 001; matched RDS(on) ensures channel-to-channel gain consistency |
| 3 (S3) | Analog Input Channel 3 | Third analog input; shares same on-resistance flatness spec (≤7 Ω) as S1–S8 for uniform signal path behavior |
| 4 (S4) | Analog Input Channel 4 | Fourth analog input; worst-case off-isolation occurs here due to proximity to drain pin-designers must isolate sensitive nodes |
| 5 (S5) | Analog Input Channel 5 | Fifth analog input; supports rail-to-rail analog swing up to V+ and down to V− |
| 6 (S6) | Analog Input Channel 6 | Sixth analog input; clamped by internal diodes if voltage exceeds V+ or V−-external series resistors recommended for overvoltage protection |
| 7 (S7) | Analog Input Channel 7 | Seventh analog input; leakage current ≤10 nA max over full temperature range ensures stable DC accuracy |
| 8 (S8) | Analog Input Channel 8 | Eighth analog input; identical timing and leakage specs to S1–S7-no channel prioritization or performance degradation |
| 9 (D) | Common Analog Output | Single bidirectional output node; connects to ADC input, op-amp buffer, or signal chain downstream of multiplexer |
| 10 (GND) | Ground Reference | Analog/digital ground return; must be low-impedance and star-connected to minimize noise coupling into analog paths |
| 11 (V−) | Negative Supply Rail | Required for dual-supply operation (±3 V to ±6 V); also serves as lower analog signal limit in single-supply mode (0 V) |
| 12 (V+) | Positive Supply Rail | Primary power source; supplies internal bias and switch drivers; decoupling capacitor (≥100 nF) required at pin |
| 13 (EN) | Enable Control Input | Active-high digital enable; disables all channels (high-Z state) when low; supports power-gating and system-level sleep modes |
| 14 (A0) | LSB Address Input | Binary address bit 0; TTL/CMOS compatible; threshold defined as ≤0.4 V (low), ≥2.0 V (high) at 3 V supply |
| 15 (A1) | Address Bit 1 | Binary address bit 1; synchronous with A0/A2; no setup/hold timing constraints specified-simplifies FPGA/MCU interface |
| 16 (A2) | MSB Address Input | Binary address bit 2; completes 3-bit selection (000–111); all address combinations validated for break-before-make behavior |
Key Features
| Feature | Design Value |
|---|---|
| Pin-for-pin compatibility with DG408 | Direct drop-in replacement for legacy DG408 designs-no PCB or firmware changes required |
| Break-before-make switching | Guaranteed channel isolation during address transitions prevents momentary shorting between inputs |
| Low 0.2 nA max off-leakage | Preserves accuracy in high-impedance sensor interfaces (e.g., thermocouples, pH electrodes) over temperature |
| 2000 V HBM ESD rating | Enables robust handling in benchtop test equipment and field-deployable instrumentation without external protection |
| Rail-to-rail analog signal range | Supports full-scale signals from V− to V+-eliminates need for external level-shifting in ±5 V or 0–12 V systems |
Applications
| Data Acquisition Systems | Battery-Powered Test Equipment |
|---|---|
Use Scenario: Multiplexing 8 thermistor, RTD, or strain gauge inputs into a single 16-bit SAR ADC in an industrial PLC module. IC Role / Device Role / Timing Role: Precision analog switch providing channel selection with <1 LSB gain error contribution and sub-100 ns settling. Use Value: Enables cost-effective 8-channel measurement without duplicating ADCs or op-amps-reducing BOM count and board area by 60%. | Use Scenario: Portable handheld multimeter selecting between voltage, current, resistance, and capacitance measurement front-ends. IC Role / Device Role / Timing Role: Low-power analog multiplexer routing signals to shared conditioning and digitization circuitry. Use Value: 0.2 µA max supply current extends battery life; 3 V operation matches Li-ion cell discharge curve without regulation overhead. |
| Audio Signal Routing | Communication Systems (DSLAM/SDSL) |
Use Scenario: Selecting between microphone, line-in, and Bluetooth audio inputs in a smart speaker's analog front-end. IC Role / Device Role / Timing Role: Low-distortion analog switch with 82 dB off-isolation preventing audible crosstalk between sources. Use Value: Eliminates need for discrete relays or op-amp muxes-reducing THD+N to <0.002% and simplifying layout. | Use Scenario: Channel selection in DSL line driver/receiver modules for broadband access networks. IC Role / Device Role / Timing Role: High-speed analog switch supporting >1 MHz signal bandwidth with minimal insertion loss (<0.5 dB). Use Value: Maintains signal integrity across ADSL2+ frequency bands (up to 2.2 MHz); 1 pC charge injection prevents baseline shift in line monitoring circuits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar analog multiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4051ACSE+ | Higher on-resistance (100 Ω typ.), wider supply range (±15 V), but slower switching (120 ns tON) | Better suited for high-voltage industrial signal conditioning, not low-voltage portable designs | Select MAX4051ACSE+ only when ±15 V rails are available and speed is secondary to voltage range |
| ADG1408BRUZ | Lower on-resistance (4.7 Ω typ.), higher supply current (200 µA), requires external VLOGIC pin for level translation | Preferred for ultra-low distortion audio or high-precision medical DAQ where RDS(on) matching is critical | Choose ADG1408BRUZ when <5 Ω on-resistance and <0.5 Ω matching outweigh added complexity and power |
Compared with MAX4051ACSE+ and ADG1408BRUZ, DG408LDY-E3 offers optimal balance of low on-resistance (17 Ω), ultra-low leakage (0.2 nA), and 3 V logic compatibility-making it ideal for battery-operated, space-constrained, and medium-accuracy applications where simplicity and reliability are prioritized over extreme specs.
Availability
DG408LDY-E3 is available at Aetrix Electronics and suitable for data acquisition systems, battery-powered test equipment, and portable instrumentation requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for DG408LDY-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-reliability analog switches, MOSFETs, and precision resistors for industrial, automotive, and computing markets.
The DG408L family was engineered specifically for low-voltage, low-leakage analog signal routing in portable and precision measurement systems-emphasizing rail-to-rail operation, break-before-make safety, and seamless upgrade paths from legacy DG408 footprints.
FAQ
What is the maximum analog signal voltage range supported by DG408LDY-E3?
DG408LDY-E3 supports analog signals from V− to V+ across its full operating supply range: 0–12 V with single 12 V supply, 0–5 V with single 5 V supply, and −5 V to +5 V with ±5 V dual supply. The device clamps signals exceeding V+ or V− via internal diodes-external series resistors are recommended to limit forward current to ≤30 mA per terminal.
Does DG408LDY-E3 require external pull-up or pull-down resistors on address pins A0–A2?
No, DG408LDY-E3 does not require external pull-up or pull-down resistors on A0–A2. Its digital inputs are TTL/CMOS/LV logic compatible with defined thresholds (e.g., VINL ≤ 0.4 V, VINH ≥ 2.0 V at 3 V supply), and internal input structures provide sufficient noise immunity. However, floating address lines must be avoided-firmware or hardware must drive all three bits to valid logic states.
Can DG408LDY-E3 be used in a dual-supply configuration with ±3.3 V?
Yes, DG408LDY-E3 supports dual-supply operation from ±3 V to ±6 V, so ±3.3 V is fully within specification. At ±3.3 V, RDS(on) increases to ~45 Ω typ. (vs. 17 Ω at 12 V), and switching times extend slightly-but all key parameters including leakage (≤10 nA), charge injection (≤5 pC), and off-isolation (>70 dB) remain guaranteed per datasheet limits.
How does the break-before-make timing work in DG408LDY-E3, and is it guaranteed across temperature?
DG408LDY-E3 guarantees break-before-make operation across its full −40 °C to +85 °C operating range. The minimum break interval (tOPEN) is 1 ns at room temperature and remains functional over temperature-verified by design and production-tested. This prevents momentary shorts during address transitions, protecting sensitive downstream circuitry like precision op-amps or ADC reference inputs.
What is the thermal derating behavior of DG408LDY-E3 in SOIC-16 package?
In its 16-pin narrow SOIC package, DG408LDY-E3 has a power dissipation limit of 600 mW at 25 °C ambient. Above 75 °C case temperature, it must be derated at 7.6 mW/°C. For example, at 100 °C case temperature, maximum allowable power drops to 600 mW − (25 °C × 7.6 mW/°C) = 410 mW-requiring careful thermal design in enclosed or high-ambient environments.
DG408LDY-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Switch Circuit:
- -
- Multiplexer/Demultiplexer Circuit:
- 8:1
- Number of Circuits:
- 1
- On-State Resistance (Max):
- 29Ohm
- Channel-to-Channel Matching (ΔRon):
- 1Ohm
- Voltage - Supply, Single (V+):
- 2.7V ~ 12V
- Voltage - Supply, Dual (V±):
- ±3V ~ 6V
- Switch Time (Ton, Toff) (Max):
- 55ns, 25ns
- -3db Bandwidth:
- -
- Charge Injection:
- 1pC
- Channel Capacitance (CS(off), CD(off)):
- 7pF, 20pF
- Current - Leakage (IS(off)) (Max):
- 1nA
- Crosstalk:
- -82dB @ 100kHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
DG408LDY-E3 FAQ
1.How can I place an order for DG408LDY-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG408LDY-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG408LDY-E3 reliable?
The price and inventory of DG408LDY-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG408LDY-E3 is usually 5 days.
3.What payment methods are accepted for DG408LDY-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG408LDY-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG408LDY-E3?
DG408LDY-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG408LDY-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG408LDY-E3?
For technical support, including DG408LDY-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG408LDY-E3 requirements.
6.How does Aetrix verify that DG408LDY-E3 is sourced from the original manufacturer or authorized distributors?
All DG408LDY-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG408LDY-E3 meets industry standards.
7.What is the process for return or replacement of DG408LDY-E3?
All DG408LDY-E3 units undergo pre-shipment inspection (PSI). If there is an issue with DG408LDY-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG408LDY-E3 part is unused and in its original packaging.
Return procedure for DG408LDY-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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