Vishay Siliconix DG412LDQ-E3
- Part No.:
- DG412LDQ-E3
- Manufacturer:
- Vishay Siliconix
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
DG412LDQ-E3.pdf
- Description:
- IC SW SPST-NOX4 17OHM 16TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DG412LDQ-E3 from Vishay Siliconix is a precision monolithic quad SPST low-voltage CMOS analog switch with break-before-make switching action, 17 Ω typical RDS(on), 19 ns tON, and ±3 V to ±6 V dual-supply or 2.7 V to 12 V single-supply operation - used in precision data acquisition and audio/video signal routing where low distortion and high off-isolation are critical.
For engineers reviewing the DG412LDQ-E3 datasheet, DG412LDQ-E3 pinout, DG412LDQ-E3 application, or DG412LDQ-E3 equivalent, key selection considerations include its 16-pin TSSOP package, complementary logic control versus DG411L, guaranteed 2000 V ESD protection, and flat on-resistance over full analog signal range enabling accurate low-level signal switching.
Technical Context
The DG412LDQ-E3 implements four independent normally-open analog switches with inverted control logic relative to DG411L (logic '0' = ON, logic '1' = OFF), supporting both single- and dual-supply configurations. Its BiCMOS process enables rail-to-rail analog signal handling up to ±5 V and guarantees sub-15 nA channel leakage at 85 °C.
It features break-before-make timing only in DG413L - not applicable to DG412LDQ-E3 - and delivers -50 dB off-isolation at 50 MHz with 280 MHz -3 dB bandwidth, making it suitable for high-fidelity analog multiplexing in mixed-signal systems requiring minimal crosstalk and insertion loss.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| RDS(on) | 17 Ω typical at VS = 5 V - ensures minimal voltage drop and signal attenuation for precision 12-bit+ data acquisition paths |
| tON/tOFF | 19 ns / 12 ns - enables fast channel switching in time-critical sampling and test equipment |
| Analog Signal Range | ±5 V (dual supply) or 0–12 V (single supply) - supports full-rail signal routing without clipping |
| Off-Isolation | -50 dB at 50 MHz - suppresses coupling between inactive channels in multi-channel audio/video systems |
| ESD Protection | 2000 V HBM - provides robust handling during PCB assembly and field operation without external protection |
| Leakage Current | 0.25 nA max at 25 °C - preserves accuracy in high-impedance sensor front-ends and integrator circuits |
| Supply Range | 2.7–12 V single or ±3–±6 V dual - allows direct interfacing with 3.3 V, 5 V, and ±5 V system rails |
Pinout & Package
Package: 16-pin TSSOP (JEDEC MO-153, MS-012), 4.4 mm × 5.0 mm body, 0.65 mm pitch, RoHS-compliant, lead-free (E3 suffix).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1–IN4 | Digital control inputs | Active-low logic: INx = 0 V → corresponding switch ON; TTL/CMOS compatible thresholds (≤0.8 V low, ≥2.4 V high) |
| S1–S4 | Switch source terminals | Analog inputs - connect to signal sources (e.g., sensor outputs, DACs, ADC inputs) |
| D1–D4 | Switch drain terminals | Analog outputs - route to common bus, amplifier inputs, or measurement nodes |
| V+ | Positive supply | Accepts 2.7–12 V (single) or +3–+6 V (dual); powers internal logic and analog path |
| V- | Negative supply | Required for dual-supply operation (-3 to -6 V); tied to GND for single-supply use |
| GND | Ground reference | Common return for digital logic and analog substrate; must be low-impedance for noise immunity |
| VL | Logic supply | Independent 3–5 V supply for control interface - decouples logic noise from analog performance |
Key Features
| Feature | Design Value |
|---|---|
| Break-before-make switching | Not implemented - DG412LDQ-E3 uses simultaneous ON/OFF transition; avoids signal shorting but requires external sequencing for critical paths |
| Flat RDS(on) vs. voltage | ±5 Ω variation across full analog range - maintains consistent gain and linearity in precision instrumentation |
| TTL/CMOS compatibility | 0.8 V low / 2.4 V high thresholds - eliminates need for level shifters when driving from FPGA or microcontroller GPIO |
| Low charge injection | 5 pC typical - minimizes voltage glitch on high-impedance nodes (e.g., sample-and-hold capacitors) |
| High off-isolation & crosstalk | -50 dB off-isolation, -95 dB crosstalk at 1 MHz - enables clean multi-channel signal routing in audio mixers and ATE |
Applications
| Precision Data Acquisition | Audio Signal Routing |
|---|---|
Use Scenario: Multiplexing multiple thermocouple or strain gauge inputs into a single high-resolution ADC in industrial PLC modules. IC Role / Device Role / Timing Role: Quad SPST analog switch providing channel selection with <17 Ω on-resistance and <0.25 nA leakage to preserve µV-level signal integrity. Use Value: Enables 16-channel scanning at 10 kSPS without gain/offset drift or thermal EMF-induced errors due to low RDS(on) tempco and matched channel characteristics. | Use Scenario: Routing line-level stereo signals between multiple sources (DAC, Bluetooth codec, phono preamp) and output amplifiers in active speaker controllers. IC Role / Device Role / Timing Role: Low-distortion analog switch handling ±2 V peak audio with -50 dB off-isolation to prevent audible crosstalk between input sources. Use Value: Delivers >100 dB SNR and <0.002% THD+N by minimizing nonlinear on-resistance and charge injection artifacts during mute/unmute transitions. |
| Battery-Powered Test Equipment | Communication System Front-End |
Use Scenario: Portable handheld DMM or LCR meter requiring ultra-low power consumption and rail-to-rail analog switching down to 2.7 V supply. IC Role / Device Role / Timing Role: Quad SPST switch operating from single 3 V coin cell with 1 µA max supply current and 65 Ω RDS(on) at 3 V. Use Value: Extends battery life beyond 200 hours while maintaining <0.1% measurement error across 4-wire resistance and capacitance ranges. | Use Scenario: Signal path selection in DSLAM line cards for SDSL/ADSL signal conditioning before ADSL transceivers. IC Role / Device Role / Timing Role: High-bandwidth analog switch supporting 280 MHz -3 dB bandwidth and -50 dB off-isolation at 50 MHz for broadband upstream/downstream separation. Use Value: Prevents spectral regrowth and adjacent-channel interference in multi-line aggregation by isolating unused line drivers during dynamic reconfiguration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4612ESE+ | Pin-compatible 16-pin SOIC; 18 Ω RDS(on); 25 ns tON; requires VL = V+ (no separate logic rail) | Lacks independent VL pin - less flexible in mixed-voltage systems; higher tON limits high-speed scanning | Select when SOIC packaging is required and VL/V+ co-location is acceptable |
| ADG1412BRUZ | 16-pin TSSOP; 1.8 Ω RDS(on); 12 ns tON; ±15 V max supply; no 2.7 V operation | Higher voltage rating but incompatible with 2.7–3.3 V battery systems; significantly higher cost | Select for high-precision, high-voltage industrial DAQ where ultra-low on-resistance justifies cost premium |
Compared with MAX4612ESE+ and ADG1412BRUZ, DG412LDQ-E3 uniquely balances low-voltage operability (2.7 V), independent logic supply (VL), and industry-standard pinout - making it optimal for portable, mixed-rail, and cost-sensitive precision analog routing where 17 Ω RDS(on) and 19 ns speed meet system requirements.
Availability
DG412LDQ-E3 is available at Aetrix Electronics and suitable for precision data acquisition, audio signal routing, and battery-powered test equipment requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for DG412LDQ-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix designs high-performance discrete semiconductors and analog ICs focused on power efficiency, signal fidelity, and reliability across industrial, automotive, and computing markets.
The DG412LDQ-E3 belongs to Vishay's precision analog switch family engineered for low-distortion, low-leakage signal routing in test and measurement, communications, and audio systems - emphasizing rail-to-rail operation, ESD robustness, and temperature-stable on-resistance.
FAQ
What is the logic polarity of DG412LDQ-E3 compared to DG411LDQ-E3?
DG412LDQ-E3 uses inverted control logic: logic low (≤0.8 V) turns the switch ON, while logic high (≥2.4 V) turns it OFF. In contrast, DG411LDQ-E3 is ON with logic high. This complementary behavior allows paired use in differential or redundant switching architectures without external inverters. DG412LDQ-E3 maintains identical pinout and electrical specs otherwise.
Does DG412LDQ-E3 support single-supply operation with V- tied to GND?
Yes, DG412LDQ-E3 supports single-supply operation with V- connected to GND and V+ set between 2.7 V and 12 V. In this configuration, the analog signal range extends from 0 V to V+, and VL may be supplied from the same rail or a separate 3–5 V source. The device retains full functionality including 17 Ω RDS(on) and 19 ns tON under these conditions.
What is the maximum analog signal voltage DG412LDQ-E3 can handle in dual-supply mode?
In dual-supply mode (e.g., V+ = +5 V, V- = -5 V), DG412LDQ-E3 supports analog signals from -5 V to +5 V - a full ±5 V range. Absolute maximum ratings allow VS or VD to exceed V+ or V- by ≤0.3 V, but internal clamping diodes activate beyond those limits. For reliable operation, keep signals within the specified analog range to avoid distortion or increased leakage.
Is DG412LDQ-E3 pin-compatible with the legacy DG412 series?
Yes, DG412LDQ-E3 is pin-for-pin compatible with the standard DG412 (non-L) in 16-pin TSSOP packaging. It improves upon the original with lower RDS(on), faster switching, enhanced ESD protection (2000 V HBM), and extended supply flexibility (down to 2.7 V). No PCB layout changes are needed when upgrading from DG412 to DG412LDQ-E3.
What does the "E3" suffix indicate in DG412LDQ-E3?
The "E3" suffix denotes a lead-free, RoHS-compliant termination per JEDEC J-STD-020, with 100% matte tin plating and no exemption for lead content. It confirms compliance with EU RoHS Directive 2011/65/EU and supports Pb-free reflow soldering profiles (peak ≤260 °C). DG412LDQ-E3 is not compatible with legacy SnPb assembly processes without reflow profile adjustment.
DG412LDQ-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Switch Circuit:
- SPST - NO
- Multiplexer/Demultiplexer Circuit:
- 1:1
- Number of Circuits:
- 4
- On-State Resistance (Max):
- 17Ohm
- Channel-to-Channel Matching (ΔRon):
- -
- Voltage - Supply, Single (V+):
- 2.7V ~ 12V
- Voltage - Supply, Dual (V±):
- ±3V ~ 6V
- Switch Time (Ton, Toff) (Max):
- 19ns, 12ns
- -3db Bandwidth:
- 280MHz
- Charge Injection:
- 5pC
- Channel Capacitance (CS(off), CD(off)):
- 5pF, 6pF
- Current - Leakage (IS(off)) (Max):
- 250pA
- Crosstalk:
- -95dB @ 1MHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP
DG412LDQ-E3 FAQ
1.How can I place an order for DG412LDQ-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG412LDQ-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG412LDQ-E3 reliable?
The price and inventory of DG412LDQ-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG412LDQ-E3 is usually 5 days.
3.What payment methods are accepted for DG412LDQ-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG412LDQ-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG412LDQ-E3?
DG412LDQ-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG412LDQ-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG412LDQ-E3?
For technical support, including DG412LDQ-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG412LDQ-E3 requirements.
6.How does Aetrix verify that DG412LDQ-E3 is sourced from the original manufacturer or authorized distributors?
All DG412LDQ-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG412LDQ-E3 meets industry standards.
7.What is the process for return or replacement of DG412LDQ-E3?
All DG412LDQ-E3 units undergo pre-shipment inspection (PSI). If there is an issue with DG412LDQ-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG412LDQ-E3 part is unused and in its original packaging.
Return procedure for DG412LDQ-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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