Vishay Siliconix DG417BDY-E3
- Part No.:
- DG417BDY-E3
- Manufacturer:
- Vishay Siliconix
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DG417BDY-E3.pdf
- Description:
- IC SWITCH SPST-NCX1 25OHM 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,699
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Product details
Overview
DG417BDY-E3 from Vishay Siliconix is a precision monolithic single-pole single-throw (SPST) CMOS analog switch optimized for high-fidelity signal routing in low-power, battery-operated systems. It delivers ±15 V analog signal range, 15 Ω typical on-resistance at ±15 V supplies, 110 ns turn-on time, and operates across –40 °C to +85 °C - enabling use in portable instrumentation and military-grade test equipment.
For engineers reviewing the DG417BDY-E3 datasheet, DG417BDY-E3 pinout, DG417BDY-E3 application, or DG417BDY-E3 equivalent, key selection criteria include guaranteed break-before-make timing (for DG419B only), low charge injection (38 pC), sub-0.25 nA off-leakage, RoHS-compliant SOIC-8 packaging, and compatibility with TTL/CMOS logic levels.
Technical Context
The DG417BDY-E3 implements a single SPST switch using Vishay's high-voltage silicon gate (HVSG) process, enabling rail-to-rail analog conduction and blocking up to ±20 V supply rails. Its control logic is active-high: logic "1" (≥2.4 V) disables the switch, while logic "0" (≤0.8 V) enables conduction in both directions.
On-resistance remains stable across temperature (15–29 Ω over full range) and analog voltage (±15 V), with channel leakage limited to ±0.25 nA at ±15.5 V. An epitaxial layer prevents latchup, and internal clamping diodes protect against overvoltage transients on S/D pins beyond V+ or V−.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Analog Signal Range | ±15 V - supports full-rail switching of bipolar signals without clipping in dual-supply precision circuits. |
| On-Resistance (RDS(on)) | 15 Ω typ. at ±15 V - ensures minimal signal attenuation and distortion in low-impedance paths (e.g., sensor front-ends). |
| Turn-On Time (tON) | 110 ns max. - enables fast multiplexing in data acquisition systems sampling at ≥5 MHz effective rate. |
| Off-Leakage Current | ±0.25 nA max. at ±15.5 V - preserves accuracy in high-impedance sample-and-hold or integrator nodes. |
| Charge Injection | 38 pC - limits voltage glitch on hold capacitors, critical for 14-bit+ ADC input conditioning. |
| Supply Voltage Range | V+ = 20 V max., V− = –20 V max. - accommodates industrial ±15 V and automotive 12 V single-supply configurations. |
| Logic Compatibility | TTL/CMOS - interfaces directly with microcontrollers and FPGAs without level-shifting circuitry. |
Pinout & Package
Package: 8-pin narrow SOIC (JEDEC MS-012), body dimensions 4.90 mm × 3.90 mm × 1.50 mm, RoHS-compliant matte tin lead finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (S) | Source terminal | Analog input/output node; bidirectional conduction path when switch is ON; must remain within V− to V+. |
| 2 (D) | Drain terminal | Analog output/input node; electrically identical to S in ON state; shares same voltage and current ratings. |
| 3 (V−) | Negative supply rail | Bias reference for analog channel; sets lower bound of signal range; must be connected before logic inputs. |
| 4 (GND) | Digital ground | Reference for logic control inputs (IN, VL); isolated from analog ground in mixed-signal layouts to minimize noise coupling. |
| 5 (IN) | Control input | Active-low enable: logic "0" (≤0.8 V) turns switch ON; logic "1" (≥2.4 V) turns OFF; compatible with 3.3 V/5 V logic. |
| 6 (V+) | Positive supply rail | Bias reference for analog channel; sets upper bound of signal range; decoupling capacitor required near pin. |
| 7 (VL) | Logic supply | Provides power to internal level shifter; typically tied to 5 V or 3.3 V; independent of V+/V− for flexible logic interfacing. |
| 8 (NC) | No connect | Internally unconnected; must remain floating - no external connection or pull-up/pull-down allowed. |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail analog switching | Conducts and blocks signals from V− to V+, eliminating need for external clamping in ±15 V systems. |
| Low on-resistance flatness | ±15 Ω variation over ±12.5 V signal swing - maintains consistent gain and linearity in audio and instrumentation paths. |
| Ultra-low leakage | Sub-nanoampere off-state current - prevents drift in high-Z sample-and-hold capacitors (>1 µF) over >100 ms hold times. |
| Fast, controlled switching | 110 ns tON/88 ns tOFF with <5 ns edge rates - minimizes settling error in time-multiplexed ADC architectures. |
| Latchup immunity | Epitaxial isolation layer - guarantees no destructive latchup under IEC 61000-4-2 ESD events or supply sequencing faults. |
Applications
| Precision Test Equipment | Precision Instrumentation |
|---|---|
Use Scenario: Automated test system multiplexing thermocouple, RTD, and strain gauge inputs to a shared 24-bit sigma-delta ADC. IC Role / Device Role / Timing Role: SPST analog switch isolating individual sensor channels during measurement; sequenced via FPGA GPIO. Use Value: 15 Ω RDS(on) and ±0.25 nA leakage preserve DC accuracy to <0.005 % FS; 38 pC charge injection avoids hold-capacitor step errors. |
Use Scenario: Portable handheld multimeter selecting between AC/DC voltage, current, and resistance ranges. IC Role / Device Role / Timing Role: Signal-path selector routing DUT signals to appropriate front-end amplifier and filter stages. Use Value: ±15 V signal range handles 1000 V input via scaling resistors; SOIC-8 footprint enables compact PCB layout with minimal trace inductance. |
| Battery-Powered Systems | Military Radios |
Use Scenario: Low-power IoT sensor node performing periodic analog measurements while sleeping at <1 µA quiescent current. IC Role / Device Role / Timing Role: Power-gating switch disconnecting bias networks and amplifiers during sleep mode. Use Value: 1 µA max. supply current (I+, I−, IL, IGND) extends battery life; HVSG process ensures reliable operation at 2.7 V minimum V+. |
Use Scenario: Secure HF/VHF radio transceiver switching antenna paths between RX/TX and calibration loops. IC Role / Device Role / Timing Role: RF front-end protection switch isolating sensitive LNA inputs during transmit bursts. Use Value: –82 dB off-isolation at 1 MHz prevents TX leakage into RX chain; 12 pF CS(off)/CD(off) minimizes impedance mismatch at IF frequencies. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar SPST analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4617EUA+ | Higher RDS(on) (35 Ω typ.), wider temp range (–40 °C to +125 °C), same SOIC-8 package. | Better suited for under-hood automotive where extended temperature is required; higher on-resistance increases gain error in precision gain stages. | Select MAX4617EUA+ only if operating above 85 °C is mandatory; verify 35 Ω RDS(on) meets system THD budget. |
| ADG1419BRMZ | Lower charge injection (12 pC), higher supply rating (±20 V), but larger 10-lead MSOP package. | Ideal for ultra-low-distortion medical imaging front-ends; MSOP-10 requires PCB redesign versus SOIC-8. | Choose ADG1419BRMZ when charge injection is the dominant error source; confirm layout supports 3.0 mm × 3.0 mm MSOP footprint. |
Compared with MAX4617EUA+ and ADG1419BRMZ, DG417BDY-E3 offers the best balance of low on-resistance (15 Ω), low leakage (±0.25 nA), and industry-standard SOIC-8 packaging - making it optimal for cost-sensitive, space-constrained precision instrumentation where 85 °C max ambient suffices.
Availability
DG417BDY-E3 is available at Aetrix Electronics and suitable for precision test equipment, portable instrumentation, and battery-powered systems requiring stable component supply, long-term lifecycle support, and RoHS-compliant sourcing.
Supply support for DG417BDY-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-reliability, high-performance analog solutions for industrial, military, and automotive markets.
The DG417B series was engineered specifically for precision analog signal routing in resource-constrained environments - emphasizing low power, low distortion, and robustness across wide temperature and supply ranges.
FAQ
What is the maximum allowable analog signal voltage for DG417BDY-E3?
The DG417BDY-E3 supports analog signals from V− to V+, with absolute maximum ratings of –20 V on V− and +20 V on V+. Under normal operation with ±15 V supplies, the guaranteed analog signal range is ±15 V. Exceeding V+ or V− triggers internal clamping diodes - forward current must be limited to ≤30 mA continuous to avoid damage. DG417BDY-E3 must never see analog voltages outside the (V− – 2 V) to (V+ + 2 V) window.
Does DG417BDY-E3 require external pull-up or pull-down resistors on the IN pin?
No, DG417BDY-E3 does not require external pull-up or pull-down resistors on the IN pin. Its input structure accepts TTL/CMOS logic levels directly: logic "0" (≤0.8 V) enables the switch, and logic "1" (≥2.4 V) disables it. Input current is ±0.5 µA max. across temperature, so drive capability of standard microcontroller GPIOs is sufficient. External resistors would add unnecessary leakage paths and noise susceptibility.
Can DG417BDY-E3 operate from a single 12 V supply?
Yes, DG417BDY-E3 can operate from a single 12 V supply (V+ = 12 V, V− = 0 V). In this configuration, the analog signal range is 0 V to 12 V, RDS(on) increases to 26 Ω typ., and tON rises to 100 ns max. The device retains full functionality - including TTL/CMOS compatibility via VL = 5 V - and is commonly used in industrial PLC I/O modules and automotive body-control units with 12 V rails.
Is the NC pin (Pin 8) safe to leave unconnected on DG417BDY-E3?
Yes, Pin 8 (NC) on DG417BDY-E3 is internally unconnected and must remain floating - no external connection, pull-up, pull-down, or grounding is permitted. Connecting it risks introducing parasitic capacitance, noise coupling, or unintended current paths that could degrade off-isolation (–82 dB) or increase crosstalk. PCB layout should omit any copper or via at Pin 8 location per Vishay's recommended land pattern for SOIC-8.
How does DG417BDY-E3 compare to DG419B in terms of switching architecture?
DG417BDY-E3 is a single-pole single-throw (SPST) switch with one control input (IN), while DG419B is a single-pole double-throw (SPDT) switch with break-before-make timing guaranteed. DG417BDY-E3 cannot replace DG419B in SPDT applications without redesigning the signal path and control logic. DG417BDY-E3 has no break-before-make function - it is a simple ON/OFF switch. Use DG417BDY-E3 only where SPST topology matches the system architecture.
DG417BDY-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Active
- Switch Circuit:
- SPST - NC
- Multiplexer/Demultiplexer Circuit:
- 1:1
- Number of Circuits:
- 1
- On-State Resistance (Max):
- 25Ohm
- Channel-to-Channel Matching (ΔRon):
- -
- Voltage - Supply, Single (V+):
- 13V ~ 36V
- Voltage - Supply, Dual (V±):
- ±7V ~ 22V
- Switch Time (Ton, Toff) (Max):
- 89ns, 80ns
- -3db Bandwidth:
- -
- Charge Injection:
- 38pC
- Channel Capacitance (CS(off), CD(off)):
- 12pF, 12pF
- Current - Leakage (IS(off)) (Max):
- 250pA
- Crosstalk:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
DG417BDY-E3 FAQ
1.How can I place an order for DG417BDY-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG417BDY-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG417BDY-E3 reliable?
The price and inventory of DG417BDY-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG417BDY-E3 is usually 5 days.
3.What payment methods are accepted for DG417BDY-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG417BDY-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG417BDY-E3?
DG417BDY-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG417BDY-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG417BDY-E3?
For technical support, including DG417BDY-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG417BDY-E3 requirements.
6.How does Aetrix verify that DG417BDY-E3 is sourced from the original manufacturer or authorized distributors?
All DG417BDY-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG417BDY-E3 meets industry standards.
7.What is the process for return or replacement of DG417BDY-E3?
All DG417BDY-E3 units undergo pre-shipment inspection (PSI). If there is an issue with DG417BDY-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG417BDY-E3 part is unused and in its original packaging.
Return procedure for DG417BDY-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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