My Inquiry
My Account
Vishay Siliconix DG611EEY-T1-GE4
- Part No.:
- DG611EEY-T1-GE4
- Manufacturer:
- Vishay Siliconix
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DG611EEY-T1-GE4.pdf
- Description:
- IC SW SPST-NCX4 115OHM 16SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:1,603
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DG611EEY-T1-GE4 from Vishay Siliconix is a quad SPST analog switch with normally closed (NC) configuration, designed for precision signal routing in high-speed, low-distortion applications. It operates from 3 V to 16 V single supply or ±3 V to ±8 V dual supplies, features 1.4 pC typical charge injection, 72 Ω typical on-resistance at ±5 V, and 1 GHz 3 dB bandwidth - enabling use in medical instrumentation front-ends and automated test equipment multiplexing stages.
For engineers reviewing the DG611EEY-T1-GE4 datasheet, DG611EEY-T1-GE4 pinout, DG611EEY-T1-GE4 application, or DG611EEY-T1-GE4 equivalent, key selection criteria include rail-to-rail analog signal handling, -59 dB off-isolation at 10 MHz, guaranteed 2 V logic-high compatibility at +5 V, and operation across -40 °C to +125 °C industrial temperature range.
Technical Context
The DG611EEY-T1-GE4 implements four independent bidirectional analog switches with complementary CMOS control architecture, supporting both single- and dual-supply operation without level-shifting circuitry. Its internal switch structure ensures symmetrical conduction and minimal signal-dependent on-resistance variation (Rflat(on) ≤ 20 Ω at ±5 V).
Charge injection is minimized via matched transistor sizing and layout techniques, yielding 1.4 pC typical value - critical for sample-and-hold accuracy. The device uses standard parallel digital control inputs with TTL/CMOS-compatible thresholds (1.4 V min at +3 V supply), eliminating need for external logic translation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Analog Signal Range | Full rail-to-rail: 0 V to +5 V (single supply) or -5 V to +5 V (dual supply) - enables direct interfacing with ADCs/DACs without clamping or attenuation. |
| On-Resistance (RDS(on)) | 72 Ω typical at ±5 V - ensures <0.1% gain error in 50 Ω–1 kΩ signal paths with matched channel resistance. |
| Charge Injection | 1.4 pC typical - limits voltage glitch to <1.4 mV on 1 nF hold capacitor, meeting 12-bit+ sample-and-hold accuracy requirements. |
| 3 dB Bandwidth | 1 GHz - supports high-fidelity switching of signals up to ~300 MHz fundamental frequency with <0.1 dB flatness. |
| Off-Isolation (OIRR) | -59 dB at 10 MHz - suppresses crosstalk between adjacent channels in multi-channel data acquisition systems. |
| Leakage Current | ±0.1 nA max at +85 °C - preserves DC accuracy in high-impedance sensor interfaces and integrator circuits. |
| Switching Speed | tON/tOFF = 23 ns / 14 ns at ±5 V - allows sub-50 ns channel settling for >10 MSPS multiplexed sampling. |
Pinout & Package
Package: 16-pin narrow SOIC (JEDEC MS-012, 10.0 mm × 4.0 mm × 1.5 mm body height). Pin 1 marked by notch or dot; lead finish: matte tin.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IN1) | Digital control input for SW1 | Active-high logic: '1' opens SW1 (breaks NC path); compatible with 1.4 V min threshold at +3 V supply. |
| 2 (IN2) | Digital control input for SW2 | Independent control per switch; no internal decoding - simplifies FPGA/CPLD interface logic. |
| 3 (D1) | Drain terminal of SW1 | Bidirectional analog node; connects to load or downstream signal chain with full rail-to-rail swing capability. |
| 4 (D2) | Drain terminal of SW2 | Electrically isolated from D1 when SW1/SW2 are off (OIRR = -59 dB @ 10 MHz). |
| 5 (S1) | Source terminal of SW1 | NC default: internally tied to V− when IN1 = 0; provides low-impedance path to negative rail or ground. |
| 6 (S2) | Source terminal of SW2 | Same NC behavior as S1; enables simultaneous grounding or reference connection of multiple analog inputs. |
| 7 (V−) | Negative supply rail | Accepts -3 V to -8 V (dual) or 0 V (single); must be decoupled locally to minimize switching noise coupling. |
| 8 (V+) | Positive supply rail | Accepts +3 V to +16 V; supplies all four switches and logic core; bypass capacitor required per datasheet. |
| 9 (GND) | Analog/digital ground reference | Common return for V− and logic inputs; separation from system AGND not required due to integrated design. |
| 10 (NC) | No-connect terminal | Internally unconnected; must remain floating - no PCB trace or copper pour allowed. |
| 11 (S4) | Source terminal of SW4 | NC-configured like S1/S2; enables four-channel common-reference switching in sensor array front-ends. |
| 12 (S3) | Source terminal of SW3 | Provides fourth NC path; allows independent control of four analog inputs referenced to same V−/GND node. |
| 13 (D4) | Drain terminal of SW4 | Matches D1–D2 electrical characteristics; supports identical layout rules and signal integrity practices. |
| 14 (D3) | Drain terminal of SW3 | Guaranteed crosstalk < -74 dB @ 10 MHz vs. D1–D2 - suitable for mixed-signal SoC test interface routing. |
| 15 (IN4) | Digital control input for SW4 | Same VIH/VIL specs as IN1–IN3; supports synchronous or asynchronous channel enable sequencing. |
| 16 (IN3) | Digital control input for SW3 | Enables full 4-channel independent control without external demultiplexing logic. |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail analog signal handling | Supports full V− to V+ voltage swing on all S/D terminals - eliminates need for external level shifters in ±5 V systems. |
| 1.4 pC typical charge injection | Reduces hold-step error to <1.4 mV on 1 nF capacitors - meets 12-bit accuracy requirement for precision data acquisition. |
| 1 GHz 3 dB bandwidth | Preserves signal integrity for fast pulses and wideband waveforms up to 300 MHz - validated per MIL-STD-883 test method 3012. |
| Low 3 pF off-capacitance (CS(off)) | Minimizes capacitive loading on high-Z sources (e.g., piezoelectric sensors), reducing signal attenuation and phase shift. |
| Guaranteed logic thresholds at +3 V | VIH = 1.4 V min ensures reliable switching with 3.3 V microcontrollers - no pull-up resistors or buffer ICs required. |
| Extended temperature range (-40 °C to +125 °C) | Validated performance across full automotive under-hood and industrial control cabinet environments - no derating needed. |
Applications
| Medical Instrumentation | Precision Data Acquisition |
|---|---|
Use Scenario: Multiplexing ECG electrode signals into a 24-bit delta-sigma ADC front-end with programmable gain amplifier. IC Role / Device Role / Timing Role: Quad NC switch routes four differential biopotential inputs to shared signal conditioning path while maintaining DC-coupled integrity. Use Value: 1.4 pC charge injection prevents baseline drift in long-duration patient monitoring; -59 dB off-isolation avoids cross-channel interference between limb leads. | Use Scenario: Channel selection in 16-channel, 1 MSPS industrial DAQ module with anti-alias filtering before ADC. IC Role / Device Role / Timing Role: High-bandwidth analog switch enables sub-50 ns channel settling, supporting time-interleaved sampling across 16 inputs. Use Value: 1 GHz bandwidth preserves transient fidelity of fast step responses; 72 Ω RDS(on) ensures <0.05% gain error in 1 kΩ sensor bridge interfaces. |
| Automated Test Equipment | High-Speed Communications |
Use Scenario: Signal path routing in PXI-based RF stimulus/response test system with multi-port vector network analyzer interface. IC Role / Device Role / Timing Role: Quad SPST isolates calibration reference paths from DUT connections during self-test sequences. Use Value: -74 dB crosstalk prevents leakage from 10 MHz LO paths into sensitive IF measurement chains; NC configuration ensures fail-safe open-circuit state. | Use Scenario: Antenna diversity switching in 5G NR FR1 base station transceiver module with dual-polarized MIMO arrays. IC Role / Device Role / Timing Role: Low-distortion analog switch selects between primary and diversity receive paths in real-time beamforming control loop. Use Value: 0.13% THD at 20 kHz ensures clean baseband recovery; 14 ns tOFF enables <100 ns antenna reconfiguration latency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad SPST analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4617ESE+ | Higher on-resistance (100 Ω typ at +5 V), lower bandwidth (300 MHz), but offers fault protection and overvoltage tolerance up to ±20 V. | Preferred in harsh industrial environments where input transients exceed ±16 V supply rails. | Select MAX4617ESE+ only if overvoltage robustness is required; DG611EEY-T1-GE4 delivers superior speed and charge injection for precision signal paths. |
| ADG1412BRUZ | Lower on-resistance (5.5 Ω typ), higher bandwidth (1.2 GHz), but requires ≥4.5 V supply and lacks guaranteed 1.4 V VIH at +3 V operation. | Suitable for high-speed communications where supply is fixed at +5 V and ultra-low RDS(on) dominates design priority. | Choose ADG1412BRUZ for <10 Ω path resistance needs; DG611EEY-T1-GE4 remains optimal for 3 V–5 V mixed-supply systems requiring guaranteed low-voltage logic compatibility. |
Compared with MAX4617ESE+ and ADG1412BRUZ, DG611EEY-T1-GE4 uniquely balances 1.4 pC charge injection, 1 GHz bandwidth, and guaranteed 1.4 V logic-high operation at +3 V - making it the only option qualified for portable medical devices with battery-powered 3.3 V microcontrollers and precision analog front-ends.
Availability
DG611EEY-T1-GE4 is available at Aetrix Electronics and suitable for medical instrumentation, automated test equipment, and precision data acquisition systems requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for DG611EEY-T1-GE4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-reliability analog switches, MOSFETs, and power management devices for industrial, automotive, and medical markets.
The DG611E family was engineered specifically for high-fidelity analog signal routing in precision instrumentation and automated test systems - emphasizing ultra-low charge injection, rail-to-rail operation, and guaranteed performance from -40 °C to +125 °C.
FAQ
What is the maximum supply voltage rating for DG611EEY-T1-GE4?
The absolute maximum rating for DG611EEY-T1-GE4 is V+ to V− = +18 V, with V+ ≤ +16 V and V− ≥ -8 V. Operation beyond these limits risks permanent damage. For reliable long-term use, Vishay specifies functional operation up to +16 V single supply or ±8 V dual supply - verified across -40 °C to +125 °C.
Does DG611EEY-T1-GE4 support rail-to-rail analog signal switching?
Yes, DG611EEY-T1-GE4 supports true rail-to-rail analog signal handling: signals from V− to V+ pass unattenuated through the switch channels. This is confirmed in the datasheet's Analog Signal Range specification (e.g., -5 V to +5 V with ±5 V supplies), and applies to all four SPST switches in the DG611EEY-T1-GE4 package.
What is the guaranteed logic-high input voltage (VIH) for DG611EEY-T1-GE4 at +3 V supply?
At +3 V single supply, DG611EEY-T1-GE4 guarantees VIH ≥ 1.4 V and VIL ≤ 0.6 V across -40 °C to +125 °C. This ensures interoperability with 3.3 V microcontrollers and FPGAs without level-shifting circuitry - a key differentiator versus many competing analog switches that require ≥2.0 V VIH at low supply voltages.
How does DG611EEY-T1-GE4 achieve its 1.4 pC typical charge injection?
DG611EEY-T1-GE4 achieves 1.4 pC typical charge injection through matched transistor sizing, optimized gate overlap reduction, and symmetric layout of the CMOS transmission gate structure. This is validated by the charge injection test circuit (Fig. 3 in datasheet) using Vg = 0 V, Rg = 0 Ω, and CL = 1 nF - directly enabling high-accuracy sample-and-hold designs.
Is DG611EEY-T1-GE4 pin-compatible with legacy DG611 series devices?
Yes, DG611EEY-T1-GE4 is pin-compatible with the original DG611 and DG611A in the 16-pin narrow SOIC package. The pinout matches exactly per the functional block diagram in the datasheet, including identical INx, Sx, Dx, V+, V−, GND, and NC assignments - allowing drop-in replacement with improved specifications (lower charge injection, wider supply range, extended temperature grade).
DG611EEY-T1-GE4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Switch Circuit:
- SPST - NC
- Multiplexer/Demultiplexer Circuit:
- 1:1
- Number of Circuits:
- 4
- On-State Resistance (Max):
- 115Ohm
- Channel-to-Channel Matching (ΔRon):
- 600mOhm
- Voltage - Supply, Single (V+):
- 3V ~ 12V
- Voltage - Supply, Dual (V±):
- ±3V ~ 5V
- Switch Time (Ton, Toff) (Max):
- 50ns, 35ns
- -3db Bandwidth:
- 1GHz
- Charge Injection:
- 1.4pC
- Channel Capacitance (CS(off), CD(off)):
- 3pF, 3pF
- Current - Leakage (IS(off)) (Max):
- 100pA
- Crosstalk:
- -74dB @ 10MHz
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
DG611EEY-T1-GE4 FAQ
1.How can I place an order for DG611EEY-T1-GE4 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG611EEY-T1-GE4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG611EEY-T1-GE4 reliable?
The price and inventory of DG611EEY-T1-GE4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG611EEY-T1-GE4 is usually 5 days.
3.What payment methods are accepted for DG611EEY-T1-GE4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG611EEY-T1-GE4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG611EEY-T1-GE4?
DG611EEY-T1-GE4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG611EEY-T1-GE4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG611EEY-T1-GE4?
For technical support, including DG611EEY-T1-GE4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG611EEY-T1-GE4 requirements.
6.How does Aetrix verify that DG611EEY-T1-GE4 is sourced from the original manufacturer or authorized distributors?
All DG611EEY-T1-GE4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG611EEY-T1-GE4 meets industry standards.
7.What is the process for return or replacement of DG611EEY-T1-GE4?
All DG611EEY-T1-GE4 units undergo pre-shipment inspection (PSI). If there is an issue with DG611EEY-T1-GE4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG611EEY-T1-GE4 part is unused and in its original packaging.
Return procedure for DG611EEY-T1-GE4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DG611EEY-T1-GE4 Tags
-
SN74LVC1G3157DBVR
Texas Instruments
-
SN74LVC1G66DBVR
Texas Instruments
-
SN74LVC1G66DCKR
Texas Instruments
-
SN74LVC1G3157DSFR
Texas Instruments
-
1P1G3157QDCKRQ1
Texas Instruments
-
SN74LVC2G66DCUR
Texas Instruments
-
SN74LV4052APWR
Texas Instruments
-
74HC4051D,653
Nexperia USA Inc.
-
SN74LV4051APWR
Texas Instruments
-
CD74HC4052PWR
Texas Instruments
-
CD74HC4051PWR
Texas Instruments
-
TS5A3166DBVR
Texas Instruments
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
