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Vishay Siliconix DG641DY-E3

Part No.:
DG641DY-E3
Manufacturer:
Vishay Siliconix
Category:
Analog Switches, Multiplexers, Demultiplexers
Package:
16-SOIC (0.154", 3.90mm Width)
Datasheet:
AetrixDG641DY-E3.pdf
Description:
IC SWITCH SPST-NOX4 15OHM 16SOIC
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,726

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Product details

Overview

DG641DY-E3 from Vishay Siliconix is a quad single-pole single-throw (SPST) analog switch optimized for wideband video and RF signal routing. It delivers 500 MHz bandwidth, 5 Ω typical RDS(on) (per channel), -87 dB crosstalk at 5 MHz, and TTL-compatible digital control with 50 ns turn-on time. It operates from ±3 V to ±15 V dual supplies and supports bidirectional signal flow in RGB, composite video, and ATE systems.

For engineers reviewing the DG641DY-E3 datasheet, DG641DY-E3 pinout, DG641DY-E3 application, or DG641DY-E3 equivalent, key selection criteria include guaranteed 500 MHz bandwidth into 50 Ω, low 10 pF on-state input capacitance, -40 °C to +85 °C industrial temperature range, SOIC-16 package compatibility, and verified performance in high-fidelity video multiplexing.

Technical Context

The DG641DY-E3 implements four independent SPST switches fabricated using Vishay's proprietary D/CMOS process, enabling true bidirectional analog signal conduction with matched RDS(on) (≤2 Ω max mismatch) and negligible nonlinearity. Its on-chip regulator maintains TTL logic thresholds across full supply ranges (V+ = 15 V, V− = −3 V).

Each channel features symmetrical source/drain terminals, 14 Vp-p off-state blocking capability, and epitaxial layer latch-up protection. Dynamic performance is sustained by low 10 pF CS(on) and 4–12 pF CD(off)/CS(off), enabling flat frequency response up to 500 MHz with minimal group delay distortion.

Key Specifications

ParameterValue and Actual Design Meaning
Bandwidth500 MHz - Enables full HD video (1080p60) and RF signal switching without attenuation above baseband.
RDS(on)8 Ω (max) - Ensures ≤0.1 dB insertion loss in 75 Ω video lines and preserves signal amplitude integrity.
Crosstalk-87 dB at 5 MHz - Prevents ghosting or interference between adjacent channels in multi-source video routing.
Turn-on Time50 ns - Supports fast channel switching in automated test equipment (ATE) with sub-20 MHz update rates.
Supply RangeV+ = -0.3 to 21 V, V− = -19 to +0.3 V - Allows flexible biasing: single +15 V (V− = GND) or dual ±15 V for ±5 V analog signals.
Off Isolation-60 dB at 5 MHz - Blocks leakage from active to inactive paths in radar/FLIR front-end signal conditioning.
Charge Injection-19 pC - Minimizes voltage glitches on high-impedance nodes (e.g., sample-and-hold inputs) during switching.

Pinout & Package

Package: 16-pin narrow SOIC (JEDEC MS-012), 3.9 mm × 9.9 mm body, 1.27 mm pitch, 1.75 mm max height.

Pin/TerminalCircuit RoleDesign Meaning
1, 2, 3, 4Switch Inputs (IN1–IN4)High-impedance analog inputs accepting bidirectional signals up to ±5 V when V− = −5 V.
5, 6, 7, 8Switch Outputs (S1–S4)Low-capacitance outputs routed to load; interchangeable with drains per channel.
9, 10Ground (GND)Dual ground pins reduce return-path inductance for high-frequency signal integrity.
11, 12, 13, 14Drain Terminals (D1–D4)Alternate connection points for analog paths; electrically identical to S1–S4.
15Positive Supply (V+)Bias rail for internal logic and switch PMOS; decoupling required within 5 mm.
16Negative Supply (V−)Substrate reference and NMOS bias; must be decoupled separately due to substrate coupling sensitivity.

Key Features

FeatureDesign Value
True bidirectional operationSource/drain terminals fully interchangeable-enables flexible PCB layout without signal direction constraints.
D/CMOS process architectureCombines low RDS(on) of DMOS with CMOS logic density-achieves 500 MHz bandwidth without external buffers.
TTL-compatible control inputsLogic thresholds fixed at 0.8 V (low) / 2.4 V (high) across full supply range-eliminates level-shifting circuitry.
Epitaxial latch-up protectionPrevents destructive parasitic SCR activation during overvoltage transients-supports robust operation in noisy industrial environments.
On-chip supply regulationMaintains stable gate drive despite V+ variation-ensures consistent RDS(on) and switching speed across ±15 V supply range.

Applications

RGB Video MultiplexerATE Signal Routing

Use Scenario: Selecting one of four RGB sources (PC, DVD, game console, set-top box) for display on a single monitor.

IC Role / Device Role / Timing Role: Quad SPST switch routing red, green, blue, and sync signals simultaneously with matched propagation delay.

Use Value: 500 MHz bandwidth preserves pixel clock integrity up to 165 MHz; -87 dB crosstalk prevents color bleeding between channels.

Use Scenario: Automated switching of stimulus and measurement paths across multiple DUTs in semiconductor test handlers.

IC Role / Device Role / Timing Role: High-speed analog path selector controlled by FPGA GPIO, enabling <50 ns channel reconfiguration.

Use Value: 50 ns tON/28 ns tOFF supports >10 MHz test pattern rates; 100 mA continuous current handles 5 V/10 mA driver loads.

Radar Front-End SwitchingSatellite IF Signal Selection

Use Scenario: Alternating transmit/receive paths in pulsed Doppler radar modules operating at L-band (1–2 GHz).

IC Role / Device Role / Timing Role: Low-insertion-loss RF switch isolating LNA input during TX burst to prevent damage.

Use Value: 8 Ω RDS(on) minimizes noise figure degradation; -60 dB off-isolation suppresses TX leakage into sensitive RX chain.

Use Scenario: Selecting between two satellite IF downconverters (950–1450 MHz and 1450–2150 MHz bands) feeding a common demodulator.

IC Role / Device Role / Timing Role: Wideband analog switch providing flat gain response across entire 1.2 GHz IF span.

Use Value: 500 MHz -3 dB bandwidth ensures <0.5 dB ripple across 950–2150 MHz after cascading two DG641DY-E3 devices.

Equivalent & Alternatives

The following parts are listed as comparable options for similar analog switch applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
MAX4617ESE+Quad SPST, 300 MHz bandwidth, 12 Ω RDS(on), SOIC-16, but requires external level shifters for TTL control.Lower bandwidth limits use in >720p60 video; higher RDS(on) increases insertion loss in 50 Ω RF paths.Select when cost sensitivity outweighs bandwidth needs and system already includes level-shifting infrastructure.
ADG612BRUZQuad SPST, 475 MHz bandwidth, 7.5 Ω RDS(on), TSSOP-16, TTL-compatible, but only rated to +70 °C ambient.Reduced thermal margin restricts deployment in industrial enclosures without forced air cooling.Choose for commercial-grade video gear where extended temperature operation is not required.

Compared with MAX4617ESE+ and ADG612BRUZ, the DG641DY-E3 provides superior 500 MHz bandwidth and guaranteed -40 °C to +85 °C operation-making it the preferred choice for military-grade radar, broadcast video, and high-reliability ATE systems demanding full-spec performance across temperature extremes.

Availability

DG641DY-E3 is available at Aetrix Electronics and suitable for RGB video multiplexing, automated test equipment (ATE) signal routing, and radar front-end switching requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for DG641DY-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-performance analog switching, power management, and sensing solutions.

The DG641DY-E3 belongs to Vishay's wideband analog switch product line, engineered specifically for high-fidelity video, RF, and precision instrumentation applications where bandwidth, crosstalk, and signal integrity are critical.

FAQ

What is the maximum analog signal voltage range supported by the DG641DY-E3?

The DG641DY-E3 supports analog signals from V− to V+, with absolute maximum ratings of V− = −19 V and V+ = +21 V. For standard operation, the recommended range is V− = −5 V to GND and V+ = +12 V, enabling ±5 V peak-to-peak signal handling. Exceeding V− by more than −0.3 V forward-biases internal diodes, so proper supply rail design is essential. The DG641DY-E3 datasheet specifies this limit under Absolute Maximum Ratings.

Does the DG641DY-E3 require external decoupling capacitors, and if so, what values are recommended?

Yes, the DG641DY-E3 requires dedicated decoupling on both V+ and V− pins due to its high-frequency operation and substrate-coupled architecture. Vishay recommends a 10 µF tantalum bead capacitor plus a 0.1 µF ceramic capacitor placed within 5 mm of each supply pin. This dual-capacitor approach suppresses both low-frequency supply sag and high-frequency ringing that would otherwise degrade the DG641DY-E3's 500 MHz bandwidth and crosstalk performance.

Can the DG641DY-E3 be operated from a single positive supply, and how does that affect its analog signal range?

Yes, the DG641DY-E3 supports single-supply operation with V− tied to GND and V+ set to +12 V or +15 V. In this configuration, the analog signal range is limited to 0 V to V+ − 0.3 V (e.g., 0–11.7 V at V+ = 12 V). To preserve full bidirectional capability, dual supplies (e.g., V+ = +15 V, V− = −3 V) are required-this enables true ±5 V signal handling without DC biasing networks. The DG641DY-E3 functional description confirms this flexibility in the Applications section.

How does the DG641DY-E3 achieve TTL compatibility across varying supply voltages?

The DG641DY-E3 integrates an on-chip voltage regulator that stabilizes internal logic thresholds regardless of V+ and V− values. This ensures consistent VINH = 2.4 V and VINL = 0.8 V levels even when V+ varies from +5 V to +21 V, eliminating the need for external level shifters. The regulator is part of the D/CMOS process architecture and is explicitly documented in the DG641DY-E3 Applications section as enabling "TTL input compatibility over the whole operating supply voltage range."

Is the DG641DY-E3 pinout compatible with other Vishay analog switches like the DG642 or DG643?

No, the DG641DY-E3 has a unique 16-pin SOIC pinout optimized for quad SPST topology, while DG642 (SOIC-8) and DG643 (SOIC-16) implement SPDT and dual-SPDT functions respectively. Their pin assignments differ fundamentally-for example, DG642 uses pins 1–4 for control and signal paths, whereas DG641DY-E3 dedicates pins 1–4 to inputs and 5–8 to outputs. Direct replacement is not possible without PCB redesign. The DG641DY-E3 pin configuration diagram in the datasheet confirms this distinct layout.

DG641DY-E3 Specifications

Product attributes
Attribute value
Manufacturer:
Vishay Siliconix
Series:
-
Packaging:
Bulk
Product Status:
Obsolete
Switch Circuit:
SPST - NO
Multiplexer/Demultiplexer Circuit:
1:1
Number of Circuits:
4
On-State Resistance (Max):
15Ohm
Channel-to-Channel Matching (ΔRon):
1Ohm
Voltage - Supply, Single (V+):
3V ~ 15V
Voltage - Supply, Dual (V±):
±3V ~ 15V
Switch Time (Ton, Toff) (Max):
70ns, 50ns
-3db Bandwidth:
500MHz
Charge Injection:
19pC
Channel Capacitance (CS(off), CD(off)):
12pF, 12pF
Current - Leakage (IS(off)) (Max):
10nA
Crosstalk:
-87dB @ 5MHz
Operating Temperature:
-40°C ~ 85°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
16-SOIC

DG641DY-E3 FAQ

1.How can I place an order for DG641DY-E3 through Aetrix?

Please submit a Request for Quotation (RFQ) for DG641DY-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for DG641DY-E3 reliable?

The price and inventory of DG641DY-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG641DY-E3 is usually 5 days.

3.What payment methods are accepted for DG641DY-E3?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG641DY-E3 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for DG641DY-E3?

DG641DY-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your DG641DY-E3 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for DG641DY-E3?

For technical support, including DG641DY-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG641DY-E3 requirements.

6.How does Aetrix verify that DG641DY-E3 is sourced from the original manufacturer or authorized distributors?

All DG641DY-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG641DY-E3 meets industry standards.

7.What is the process for return or replacement of DG641DY-E3?

All DG641DY-E3 units undergo pre-shipment inspection (PSI). If there is an issue with DG641DY-E3, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The DG641DY-E3 part is unused and in its original packaging.

Return procedure for DG641DY-E3:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

DG641DY-E3 Tags

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