Vishay Siliconix DG642DY-T1-E3
- Part No.:
- DG642DY-T1-E3
- Manufacturer:
- Vishay Siliconix
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DG642DY-T1-E3.pdf
- Description:
- IC SWITCH SPDT X 1 8OHM 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DG642DY-T1-E3 from Vishay Siliconix is a single-pole double-throw (SPDT) analog switch optimized for wideband video and RF signal routing. It delivers 5 Ω typical on-resistance, 500 MHz bandwidth, -85 dB crosstalk at 5 MHz, 100 mA continuous current handling, and TTL-compatible digital control - enabling high-fidelity RGB switching in broadcast-grade video systems.
For engineers reviewing the DG642DY-T1-E3 datasheet, DG642DY-T1-E3 pinout, DG642DY-T1-E3 application, or DG642DY-T1-E3 equivalent, key selection criteria include bidirectional signal integrity up to ±5 V, low charge injection (-40 pC), fast switching (tON = 60 ns typ), and SOIC-8 package compatibility with high-density PCB layouts.
Technical Context
The DG642DY-T1-E3 uses Vishay's proprietary D/CMOS process to achieve true bidirectional conduction, substrate latchup prevention via epitaxial isolation, and on-chip voltage regulation for stable TTL input compatibility across full supply ranges. Its SPDT topology supports signal path selection between one common input (IN) and two independent outputs (D1/D2) controlled by a single logic line.
Operation requires dual supplies (V+ = +15 V, V− = −3 V typical) to support ±5 V analog signal swing; however, single-supply operation (V− = GND) is supported with reduced signal range. The device blocks up to 14 Vp-p when off and maintains <1 Ω RDS(on) match between channels.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Bandwidth | 500 MHz - supports full HD video (1080p60) and UWB RF signals without attenuation |
| RDS(on) | 5 Ω typ - minimizes insertion loss and gain error in precision video paths |
| Crosstalk | -85 dB at 5 MHz - prevents interference between adjacent video channels in RGB or YUV routing |
| Switching Time | tON = 60 ns typ - enables sub-microsecond channel selection for real-time video multiplexing |
| Charge Injection | -40 pC - reduces vertical sync artifacts and ghosting in analog video output stages |
| Analog Range | ±5 V (V− = −5 V, V+ = +12 V) - accommodates standard video signal levels without external biasing |
| Supply Flexibility | V+ to V− = 21 V max - allows configuration for single-supply (V− = GND) or split-rail operation |
Pinout & Package
Package: 8-pin narrow SOIC (MS-012), 4.9 mm × 3.9 mm footprint, 1.27 mm pitch, 1.75 mm max height - compatible with automated SMT assembly and IPC-7351B SOIC-N8 land patterns.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (D2) | Drain 2 / Switch Output 2 | Bidirectional signal path; connects to IN when logic = 0 per truth table |
| 2 (GND) | Ground Reference | Substrate reference for internal regulator and digital logic; must be decoupled with 0.1 µF ceramic |
| 3 (S2) | Source 2 / Switch Output 2 | Redundant terminal for D2; interchangeable with D2 per layout flexibility note |
| 4 (S1) | Source 1 / Switch Output 1 | Redundant terminal for D1; interchangeable with D1 per circuit layout guidance |
| 5 (IN) | Common Analog Input | Bidirectional node accepting signals up to ±5 V; symmetric RDS(on) in both directions |
| 6 (D1) | Drain 1 / Switch Output 1 | Bidirectional signal path; connects to IN when logic = 1 per truth table |
| 7 (V+) | Positive Supply Rail | +15 V nominal; powers analog channel and internal regulator; requires 1–10 µF tantalum + 0.1 µF ceramic |
| 8 (V−) | Negative Supply Rail | −3 V nominal; sets analog lower rail and reduces on-capacitance; substrate tied to this pin |
Key Features
| Feature | Design Value |
|---|---|
| True bidirectional switching | Identical RDS(on), capacitance, and leakage in source-to-drain and drain-to-source directions - eliminates signal path asymmetry in video routing |
| On-chip TTL regulator | Maintains VINH ≥ 2.4 V and VINL ≤ 0.8 V across full V+ to V− range - eliminates level-shifting ICs in mixed-voltage systems |
| Epitaxial latchup protection | Prevents destructive parasitic SCR activation during overvoltage transients - critical for field-deployed video equipment |
| Interchangeable S/D terminals | Source and drain pins electrically identical - simplifies PCB layout and reduces routing congestion in dense video interfaces |
| Low off-isolation degradation | OIRR = -63 dB at 5 MHz - ensures minimal signal bleed-through during channel switching in radar/FLIR receivers |
Applications
| RGB Video Routing | RF Signal Selection |
|---|---|
Use Scenario: Selecting between two HDMI source streams for display on a single monitor using discrete analog RGB conversion. IC Role / Device Role / Timing Role: SPDT analog switch routing red, green, and blue baseband signals with sub-ns timing skew between channels. Use Value: 500 MHz bandwidth preserves pixel clock harmonics; 5 Ω RDS(on) avoids gamma curve distortion in 75 Ω terminated lines. | Use Scenario: Channel selection in a dual-band satellite LNB downconverter front-end operating at 950–2150 MHz. IC Role / Device Role / Timing Role: Low-loss RF path selector isolating LO injection paths while maintaining phase coherence. Use Value: -85 dB crosstalk prevents intermodulation between bands; ±5 V analog range accommodates DC-coupled IF stages. |
| ATE Test Signal Multiplexing | Programmable Video Filter Bank |
Use Scenario: Routing calibrated test waveforms from a single AWG to 16 DUT inputs in semiconductor production testers. IC Role / Device Role / Timing Role: High-reliability SPDT switch enabling sequential stimulus delivery with <100 ns settling time. Use Value: 100 mA current rating supports driving 50 Ω coax loads; -40 pC charge injection prevents DC offset drift across 10⁶ cycles. | Use Scenario: Configuring cutoff frequencies in a multi-standard broadcast receiver supporting NTSC, PAL, and ATSC. IC Role / Device Role / Timing Role: Selecting between discrete RC networks to set filter breakpoints under microcontroller control. Use Value: Bidirectional operation allows shared capacitor nodes; low RDS(on) tolerance (±0.5 Ω) ensures <0.1% fc error across temperature. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4682EUA+ | Higher RDS(on) (8 Ω typ), lower bandwidth (350 MHz), no negative supply support | Limited to single-supply 3.3 V/5 V systems; unsuitable for ±5 V video swing | Choose for cost-sensitive, low-frequency industrial I/O where split-rail operation is unnecessary |
| ADG788BRUZ | Lower current rating (30 mA), smaller package (TSSOP-16), higher crosstalk (-65 dB) | Optimized for space-constrained portable devices; insufficient for broadcast video SNR requirements | Choose for battery-powered instrumentation requiring ultra-low quiescent current (1 nA), not video fidelity |
Compared with MAX4682EUA+ and ADG788BRUZ, DG642DY-T1-E3 uniquely balances 500 MHz bandwidth, ±5 V analog range, and 100 mA drive in an industry-standard SOIC-8 - making it the only option among the three qualified for professional RGB video routing and satellite receiver front-ends.
Availability
DG642DY-T1-E3 is available at Aetrix Electronics and suitable for RGB video routing, RF signal selection, and ATE test multiplexing requiring stable component supply, long-term lifecycle assurance, and traceable sourcing for industrial and broadcast equipment manufacturing.
Supply support for DG642DY-T1-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-reliability analog solutions for demanding signal integrity applications.
The DG642DY-T1-E3 belongs to the DG64x family of wideband analog switches designed specifically for professional video infrastructure, radar/FLIR systems, and high-speed test equipment where low crosstalk, precise linearity, and robust ESD tolerance are mandatory.
FAQ
What is the maximum analog signal voltage range supported by DG642DY-T1-E3?
DG642DY-T1-E3 supports an analog signal range of ±5 V when operated with V− = −5 V and V+ = +12 V, as specified in the Absolute Maximum Ratings and confirmed in the VANALOG parameter table. This range enables direct interface with standard video signals without external level-shifting circuitry, and the device blocks up to 14 Vp-p when off.
Does DG642DY-T1-E3 require external decoupling capacitors, and if so, what values are recommended?
Yes, DG642DY-T1-E3 requires external decoupling: 1–10 µF tantalum bead plus 10–100 nF ceramic or polyester capacitors on both V+ and V− pins, mounted as close as possible to the device. This is mandated in the Applications section to prevent dynamic performance degradation and substrate coupling effects, especially critical given the V− pin connection to the silicon substrate.
Can DG642DY-T1-E3 operate from a single positive supply, and what are the trade-offs?
Yes, DG642DY-T1-E3 can operate from a single positive supply with V− connected to GND, but the analog signal range is reduced to 0–8 V (per VANALOG spec). Trade-offs include higher RDS(on), increased on-capacitance, and loss of true bipolar signal handling - making split-rail operation (V− = −3 V) preferred for video linearity and bandwidth preservation.
What is the logic polarity relationship between the control input and switch state for DG642DY-T1-E3?
Per the DG642 truth table, a logic "0" (≤ 0.8 V) turns SW1 OFF and SW2 ON, connecting IN to D2; a logic "1" (≥ 2.4 V) turns SW1 ON and SW2 OFF, connecting IN to D1. This active-high control mapping is fixed and does not support inversion - the device has no enable/disable or polarity-select pins.
Is DG642DY-T1-E3 pin-compatible with other members of the DG64x family, such as DG641DY or DG643DY?
No, DG642DY-T1-E3 is not pin-compatible with DG641DY (16-pin SOIC) or DG643DY (16-pin SOIC). DG642DY-T1-E3 uses an 8-pin narrow SOIC package with unique pin assignments (e.g., dual ground and redundant S/D terminals), while DG641/DG643 use 16-pin packages supporting quad or dual SPDT configurations - requiring distinct PCB footprints and routing.
DG642DY-T1-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Switch Circuit:
- SPDT
- Multiplexer/Demultiplexer Circuit:
- 2:1
- Number of Circuits:
- 1
- On-State Resistance (Max):
- 8Ohm
- Channel-to-Channel Matching (ΔRon):
- 500mOhm
- Voltage - Supply, Single (V+):
- 3V ~ 15V
- Voltage - Supply, Dual (V±):
- ±3V ~ 15V
- Switch Time (Ton, Toff) (Max):
- 100ns, 60ns
- -3db Bandwidth:
- 500MHz
- Charge Injection:
- 40pC
- Channel Capacitance (CS(off), CD(off)):
- 20pF, 20pF
- Current - Leakage (IS(off)) (Max):
- 10nA
- Crosstalk:
- -85dB @ 5MHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
DG642DY-T1-E3 FAQ
1.How can I place an order for DG642DY-T1-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG642DY-T1-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG642DY-T1-E3 reliable?
The price and inventory of DG642DY-T1-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG642DY-T1-E3 is usually 5 days.
3.What payment methods are accepted for DG642DY-T1-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG642DY-T1-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG642DY-T1-E3?
DG642DY-T1-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG642DY-T1-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG642DY-T1-E3?
For technical support, including DG642DY-T1-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG642DY-T1-E3 requirements.
6.How does Aetrix verify that DG642DY-T1-E3 is sourced from the original manufacturer or authorized distributors?
All DG642DY-T1-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG642DY-T1-E3 meets industry standards.
7.What is the process for return or replacement of DG642DY-T1-E3?
All DG642DY-T1-E3 units undergo pre-shipment inspection (PSI). If there is an issue with DG642DY-T1-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG642DY-T1-E3 part is unused and in its original packaging.
Return procedure for DG642DY-T1-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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