Vishay Siliconix DG643DJ
- Part No.:
- DG643DJ
- Manufacturer:
- Vishay Siliconix
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
DG643DJ.pdf
- Description:
- IC SWITCH SPDT X 2 15OHM 16DIP
- Quantity:
- Payment:

- Shipping:

Inventory:1,741
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DG643DJ from Vishay Siliconix is a dual SPDT analog switch IC designed for high-fidelity RF and video signal routing in bidirectional wideband applications. It delivers 500 MHz bandwidth, 5 Ω typical RDS(on) (per switch), –87 dB crosstalk at 5 MHz, TTL-compatible control, and ±14 Vp-p signal blocking capability - deployed in RGB video multiplexing and satellite receiver front-ends.
For engineers reviewing the DG643DJ datasheet, DG643DJ pinout, DG643DJ application, or DG643DJ equivalent, key selection criteria include its dual SPDT topology, 16-pin DIP package, –40 °C to +85 °C operating range, low charge injection (–19 pC), and compatibility with split-supply (V+ = +15 V, V– = –3 V) or single-supply (V– = GND) configurations.
Technical Context
The DG643DJ implements two independent SPDT switches fabricated on Vishay's proprietary D/CMOS process, enabling true bidirectional conduction with matched on-resistance and minimal nonlinearity. Each switch supports analog signals from V– to V+, with substrate isolation preventing latchup and internal clamping diodes limiting overvoltage stress.
Its digital interface uses standard TTL thresholds (VINH ≥ 2.4 V, VINL ≤ 0.8 V), and an on-chip regulator maintains logic compatibility across the full supply range. The device operates with V+ to V– up to 21 V, and analog signal swing is limited only by supply rails - supporting ±5 V ac handling when biased at V+ = +12 V, V– = –5 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Switch Type | Dual SPDT - enables independent selection between two input sources per channel, ideal for redundant signal paths or A/B video routing. |
| Bandwidth | 500 MHz - supports full HD video (1080p60) and UHF RF switching without significant attenuation. |
| RDS(on) | 8 Ω max (–40 °C to +85 °C) - ensures low insertion loss <0.1 dB in 75 Ω systems at baseband. |
| Crosstalk | –87 dB at 5 MHz - prevents interference between active and inactive channels in multi-source video systems. |
| Charge Injection | –19 pC - minimizes voltage glitch on sampled-hold nodes and preserves DC accuracy in precision instrumentation. |
| Supply Range | V+ = –0.3 V to +21 V, V– = –19 V to +0.3 V - allows flexible biasing including single-supply (V– = GND) or split-rail (±15 V, ±12 V, +15 V/–3 V). |
| Logic Compatibility | TTL - interfaces directly with 5 V microcontrollers, FPGAs, and ASICs without level-shifting circuitry. |
Pinout & Package
Package: 16-pin plastic DIP (Dual-In-Line), JEDEC MS-001, body width 0.300", lead pitch 0.100". Dimensions: 19.18 mm × 6.60 mm × 4.06 mm (L × W × H).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 | Switch Inputs (IN1–IN4) | Four analog inputs - IN1/IN2 feed Switch 1 & 2; IN3/IN4 feed Switch 3 & 4; bidirectional signal path. |
| 5, 6, 11, 12 | Switch Outputs (S1–S4) | Source terminals - connect to common output bus or load; interchangeable with drain terminals. |
| 7, 8, 15, 16 | Switch Outputs (D1–D4) | Drain terminals - paired with S1–S4 to form two SPDT switches (S1/D1/S2/D2 and S3/D3/S4/D4). |
| 9 | GND | Ground reference for logic and substrate; must be decoupled with 10 µF tantalum + 0.1 µF ceramic. |
| 10 | V+ | Positive supply rail - powers internal CMOS logic and DMOS switch elements; bypass critical. |
| 13 | V– | Negative supply rail - sets lower analog signal limit and reduces on-capacitance via body effect. |
| 14 | Control | Single TTL-compatible logic input - controls both SPDT sections simultaneously (0 = SW1/SW2 OFF, SW3/SW4 ON; 1 = opposite). |
Key Features
| Feature | Design Value |
|---|---|
| True bidirectional switching | Identical RDS(on) and capacitance regardless of signal direction - eliminates need for polarity-aware layout. |
| Low on-resistance match | ΔRDS(on) ≤ 2 Ω - ensures balanced gain and phase response across dual-channel video or RF paths. |
| High off-isolation | –60 dB at 5 MHz - suppresses leakage from powered-off channels into sensitive receiver stages. |
| Fast switching | tON = 70 ns max, tOFF = 50 ns max - supports frame-rate video switching and burst-mode RF gating. |
| Latchup immunity | Epitaxial layer isolation - guarantees robust operation under transient overvoltage or ESD events per JEDEC JESD78. |
Applications
| RGB Video Multiplexer | Satellite Receiver Signal Routing |
|---|---|
Use Scenario: Selecting between multiple HDMI source outputs (e.g., set-top box, media player, game console) before feeding a single display controller. IC Role / Device Role / Timing Role: Dual SPDT analog switch providing low-distortion, sub-ns timing skew routing of red, green, and blue baseband video signals. Use Value: Preserves differential phase/gain specs (<0.1°/0.1%) required for NTSC/PAL compliance due to <5 Ω RDS(on) and <12 pF Coff. | Use Scenario: Switching between LNB outputs (vertical/horizontal polarization) in a dual-LNB satellite dish system before downconversion. IC Role / Device Role / Timing Role: High-isolation RF switch handling 950–2150 MHz IF signals with minimal group delay variation. Use Value: –87 dB crosstalk and 500 MHz bandwidth prevent adjacent-channel interference and preserve SNR > 45 dB in QPSK demodulation. |
| Radar/FLIR Channel Selection | ATE Analog Signal Path Switching |
Use Scenario: Routing calibrated test signals to multiple antenna array elements in phased-array radar beamforming modules. IC Role / Device Role / Timing Role: Precision analog switch enabling fast, repeatable calibration path selection without introducing harmonic distortion. Use Value: Low charge injection (–19 pC) prevents DC offset errors during automated gain calibration sequences. | Use Scenario: Configuring stimulus/response paths in automated test equipment for mixed-signal IC validation (e.g., ADC/DAC characterization). IC Role / Device Role / Timing Role: Wideband signal router connecting arbitrary waveform generators, power supplies, and measurement instruments to DUT pins. Use Value: 500 MHz bandwidth and <8 Ω RDS(on) support accurate testing of high-speed serial interfaces (e.g., USB 2.0, LVDS) up to 480 Mbps. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual SPDT analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4683ESE+ | Lower bandwidth (300 MHz), higher RDS(on) (12 Ω typ), no negative supply support - requires single +5 V operation. | Better suited for portable 5 V systems; unsuitable for ±12 V video or RF designs requiring extended signal swing. | Select MAX4683ESE+ only when supply simplicity outweighs bandwidth and dynamic range requirements. |
| ADG633BRUZ | Higher RDS(on) (18 Ω max), wider temp range (–40 °C to +125 °C), same 16-pin TSSOP package - no DIP option available. | Preferred for automotive under-hood applications; lacks the DG643DJ's crosstalk performance (–75 dB vs. –87 dB). | Choose ADG633BRUZ for extended temperature reliability where PCB space constraints favor surface-mount over through-hole DIP. |
Compared with MAX4683ESE+ and ADG633BRUZ, the DG643DJ uniquely balances ultra-low crosstalk, 500 MHz bandwidth, and dual-supply flexibility - making it optimal for high-fidelity video and RF routing where signal integrity is non-negotiable.
Availability
DG643DJ is available at Aetrix Electronics and suitable for RGB video multiplexing, satellite receiver signal routing, radar/FLIR channel selection, and ATE analog signal path switching requiring stable component supply across industrial and broadcast design cycles.
Supply support for DG643DJ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-reliability analog switching, power management, and sensing solutions for demanding industrial and communications applications.
The DG643DJ belongs to Vishay's wideband analog switch product line, engineered specifically for high-fidelity signal routing in video, RF, and test equipment where low distortion, fast settling, and rail-to-rail analog handling are essential.
FAQ
What is the maximum analog signal voltage range supported by the DG643DJ?
The DG643DJ supports analog signals from V– to V+, with absolute maximum ratings of V+ to V– ≤ 21 V and V– to GND ≥ –19 V. When operated at V+ = +15 V and V– = –3 V, it handles ±5 Vp-p signals. Signals exceeding V+ or V– are clamped by internal diodes - forward current must be limited to 20 mA per diode to avoid damage. This makes the DG643DJ suitable for both single-supply (V– = GND) and split-supply video/RF systems.
Does the DG643DJ require external decoupling capacitors, and if so, what values are recommended?
Yes, the DG643DJ requires dedicated decoupling on both V+ and V– pins to maintain 500 MHz bandwidth and minimize switching noise. Vishay specifies a 10 µF tantalum bead capacitor plus a 0.1 µF ceramic capacitor placed as close as possible to each supply pin. Poor decoupling degrades off-isolation and increases crosstalk - especially critical because the substrate is tied to V–, making its decoupling essential for RF stability. Layout guidelines recommend star-grounding these capacitors to avoid ground-loop coupling.
How does the DG643DJ's dual SPDT configuration differ from using two separate SPDT switches like the DG642DJ?
The DG643DJ integrates two fully independent SPDT switches in one 16-pin DIP package, sharing only the V+, V–, GND, and control input - whereas two DG642DJ devices would occupy double the board area and require duplicated supply filtering. Its truth table shows simultaneous complementary control: logic 0 activates SW3/SW4 while deactivating SW1/SW2, and logic 1 reverses this state. This synchronized operation simplifies timing-critical applications like video frame switching, eliminating inter-switch skew that could cause visible artifacts in RGB routing.
Can the DG643DJ be used in single-supply applications, and how does performance change compared to split-supply operation?
Yes, the DG643DJ supports single-supply operation with V– connected to GND and V+ ≥ 5 V. In this mode, analog signal range is limited to 0 V to V+ – 1.5 V (e.g., 0–8 V with V+ = 12 V). Performance trade-offs include higher on-capacitance (due to loss of body-effect reduction), slightly reduced bandwidth (~450 MHz), and increased RDS(on) mismatch. However, TTL compatibility and fast switching are preserved - making it viable for cost-sensitive consumer video gear where split supplies are impractical.
What is the purpose of the epitaxial layer in the DG643DJ's construction, and how does it affect reliability?
The epitaxial layer in the DG643DJ provides inherent latchup immunity by electrically isolating the DMOS switch transistors from the silicon substrate. This prevents parasitic SCR activation during overvoltage transients, ESD events, or supply sequencing faults - a critical feature for field-deployed video and RF equipment. Vishay validates this structure per JEDEC JESD78, ensuring the DG643DJ sustains >2 kV HBM ESD rating and operates reliably across –40 °C to +85 °C without functional interruption, even under repeated fault conditions.
DG643DJ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Obsolete
- Switch Circuit:
- SPDT
- Multiplexer/Demultiplexer Circuit:
- 2:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 15Ohm
- Channel-to-Channel Matching (ΔRon):
- 1Ohm
- Voltage - Supply, Single (V+):
- 3V ~ 15V
- Voltage - Supply, Dual (V±):
- ±3V ~ 15V
- Switch Time (Ton, Toff) (Max):
- 70ns, 50ns
- -3db Bandwidth:
- 500MHz
- Charge Injection:
- 19pC
- Channel Capacitance (CS(off), CD(off)):
- 12pF, 12pF
- Current - Leakage (IS(off)) (Max):
- 10nA
- Crosstalk:
- -87dB @ 5MHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-PDIP
DG643DJ FAQ
1.How can I place an order for DG643DJ through Aetrix?
Please submit a Request for Quotation (RFQ) for DG643DJ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG643DJ reliable?
The price and inventory of DG643DJ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG643DJ is usually 5 days.
3.What payment methods are accepted for DG643DJ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG643DJ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG643DJ?
DG643DJ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG643DJ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG643DJ?
For technical support, including DG643DJ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG643DJ requirements.
6.How does Aetrix verify that DG643DJ is sourced from the original manufacturer or authorized distributors?
All DG643DJ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG643DJ meets industry standards.
7.What is the process for return or replacement of DG643DJ?
All DG643DJ units undergo pre-shipment inspection (PSI). If there is an issue with DG643DJ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG643DJ part is unused and in its original packaging.
Return procedure for DG643DJ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DG643DJ Tags

-
SN74LVC1G3157DBVR
Texas Instruments
-
SN74LVC1G66DBVR
Texas Instruments
-
SN74LVC1G66DCKR
Texas Instruments

-
SN74LVC1G3157DSFR
Texas Instruments

-
1P1G3157QDCKRQ1
Texas Instruments

-
SN74LVC2G66DCUR
Texas Instruments
-
SN74LV4052APWR
Texas Instruments

-
74HC4051D,653
Nexperia USA Inc.
-
SN74LV4051APWR
Texas Instruments
-
CD74HC4052PWR
Texas Instruments
-
CD74HC4051PWR
Texas Instruments
-
TS5A3166DBVR
Texas Instruments
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

