My Inquiry
My Account
Vishay Siliconix DG9232EDQ-T1-GE3
- Part No.:
- DG9232EDQ-T1-GE3
- Manufacturer:
- Vishay Siliconix
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
DG9232EDQ-T1-GE3.pdf
- Description:
- IC SWITCH SPST-NCX2 25OHM 8MSOP
- Quantity:
- Payment:
- Shipping:
Inventory:2,342
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DG9232EDQ-T1-GE3 from Vishay Siliconix is a dual normally-closed (NC) monolithic CMOS analog switch IC designed for precision signal routing in low-voltage instrumentation and medical systems. It delivers 17 Ω typical on-resistance at 5 V, 1 pC charge injection, 100 pA max on-leakage at 25 °C, and operates from +2.7 V to +5.5 V - enabling high-fidelity switching in ADC front ends and sample-and-hold circuits.
For engineers reviewing the DG9232EDQ-T1-GE3 datasheet, DG9232EDQ-T1-GE3 pinout, DG9232EDQ-T1-GE3 application, or DG9232EDQ-T1-GE3 equivalent, key selection criteria include guaranteed low leakage (<100 pA), break-before-make timing compatibility, MSOP-8 footprint constraints, and ESD robustness (8 kV HBM) in battery-powered or healthcare-grade designs.
Technical Context
The DG9232EDQ-T1-GE3 implements two independent single-pole single-throw (SPST) switches with normally-closed logic behavior: both switches conduct when control input is logic low (≤0.8 V) and block when high (≥2.4 V). Its CMOS architecture ensures bidirectional analog conduction, rail-to-rail signal handling up to V+, and minimal parasitic capacitance (3.8 pF off, 7.8 pF on).
Designed for low-power precision systems, it features 1 nW typical power consumption, 32 ns turn-on / 10 ns turn-off times at 5 V, and latch-up immunity >300 mA per JESD78 - supporting reliable operation in data acquisition and portable diagnostic equipment without external protection circuitry.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| On-resistance (RDS(on)) | 17 Ω typ. at 5 V - enables <1 LSB error in 16-bit ADC interfaces with ≤10 kΩ source impedance |
| Charge injection | 1 pC max - minimizes voltage glitch in sample-and-hold nodes, preserving DC accuracy |
| On-leakage current | 100 pA max at 25 °C - critical for maintaining gain stability in high-impedance transducer signal chains |
| Supply range | +2.7 V to +5.5 V - supports direct interface with 3.3 V and 5 V logic and analog rails without level shifters |
| Switching time (tON/tOFF) | 32 ns / 10 ns at 5 V - allows multiplexing of signals up to ~10 MHz without inter-channel skew distortion |
| ESD tolerance | 8 kV HBM / 1 kV CDM - meets IEC 61000-4-2 Level 3 for handheld medical device handling |
| Off-isolation (OIRR) | –80 dB at 1 MHz - ensures ≥10,000:1 channel rejection in multi-sensor data acquisition |
Pinout & Package
Package: 8-lead MSOP (JEDEC MO-187, variation AA/BA), 3.00 mm × 4.90 mm footprint, 0.65 mm pitch, exposed pad not present.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (NC1) | No-connect terminal | Internally unconnected; must be left floating or tied to GND per layout best practice |
| 2 (V+) | Positive supply rail | Accepts 2.7–5.5 V; decoupling capacitor (100 nF) required within 2 mm of this pin |
| 3 (COM1) | Common terminal of Switch-1 | Bidirectional path; connects to signal source or load depending on system topology |
| 4 (IN1) | Control input for Switch-1 | CMOS-compatible; logic low (≤0.8 V) closes Switch-1, logic high (≥2.4 V) opens it |
| 5 (IN2) | Control input for Switch-2 | Independent logic control; identical threshold and timing behavior as IN1 |
| 6 (COM2) | Common terminal of Switch-2 | Electrically isolated from COM1; supports dual independent signal paths |
| 7 (GND) | Analog/digital ground reference | Single ground plane required; star-point connection recommended for mixed-signal layouts |
| 8 (NC2) | No-connect terminal | Internally unconnected; no PCB trace or thermal pad required |
Key Features
| Feature | Design Value |
|---|---|
| Dual NC SPST configuration | Both switches default closed at power-up - eliminates signal interruption during initialization in safety-critical monitoring |
| Rail-to-rail analog capability | Supports 0 V to V+ signal swing without clipping - preserves full dynamic range in ±2.5 V referenced systems |
| Ultra-low leakage matching | Matched COM-off leakage <±100 pA across temperature - essential for differential sensor offset cancellation |
| Break-before-make timing | Guaranteed non-overlapping conduction between channels - prevents momentary short-circuits in relay-replacement applications |
| Low parasitic capacitance asymmetry | 3.8 pF NO/NC-off vs. 7.8 pF COM-on - maintains consistent bandwidth across on/off states in filter-switching networks |
Applications
| Medical Patient Monitoring | Data Acquisition Systems |
|---|---|
Use Scenario: Routing ECG, EEG, or EMG electrode signals to a shared ADC channel while maintaining baseline stability. IC Role / Device Role / Timing Role: Dual NC analog switch providing fault-tolerant signal path selection with zero hold-time interruption. Use Value: 1 pC charge injection prevents baseline wander; 100 pA leakage avoids drift in high-gain (>1000×) instrumentation amplifiers. |
Use Scenario: Multiplexing 8 thermocouple or RTD inputs into a single sigma-delta ADC with cold-junction compensation. IC Role / Device Role / Timing Role: Precision SPST switch enabling sequential sampling with sub-μV offset contribution. Use Value: 17 Ω RDS(on) introduces <0.02% gain error at 10 kΩ sensor impedance; –80 dB off-isolation suppresses crosstalk between adjacent channels. |
| Portable Diagnostic Instruments | Battery-Powered Test Equipment |
Use Scenario: Enabling/disabling optical sensor bias paths in handheld pulse oximeters to extend battery life. IC Role / Device Role / Timing Role: Low-leakage switch controlling current to LED drivers and photodiode amplifiers. Use Value: 1 nW typical power consumption reduces quiescent drain; 8 kV HBM withstands repeated handling in field-service environments. |
Use Scenario: Isolating calibration references from measurement circuits during self-test sequences in handheld multimeters. IC Role / Device Role / Timing Role: Normally-closed guard switch that opens only during calibration to prevent reference loading. Use Value: Break-before-make timing ensures no transient short between reference and DUT; 32 ns tON supports fast test cycle execution. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual SPST analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4623EUA+ | Higher on-resistance (45 Ω typ. at 5 V); 2.5 pC charge injection; SOIC-8 only | Less suitable for 16-bit+ precision systems due to higher glitch energy and mismatch | Select when cost sensitivity outweighs leakage/charge specs and MSOP footprint is not required |
| ADG722BRMZ-REEL | Normally-open configuration; 4.5 Ω RDS(on); 0.25 pC charge injection; same MSOP-8 package | Requires inverted logic drive; better for low-RDS(on) but incompatible with NC-default safety requirements | Choose only if system design mandates NO default state and can accommodate logic inversion |
Compared with MAX4623EUA+ and ADG722BRMZ-REEL, DG9232EDQ-T1-GE3 uniquely combines NC default behavior, 1 pC charge injection, and MSOP-8 packaging - making it the only option among the three qualified for fail-safe signal routing in Class II medical devices without redesigning control logic or layout.
Availability
DG9232EDQ-T1-GE3 is available at Aetrix Electronics and suitable for medical patient monitoring, portable diagnostic instruments, data acquisition systems, and battery-powered test equipment requiring stable component supply across extended production lifecycles.
Supply support for DG9232EDQ-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-reliability analog solutions for industrial, automotive, and medical markets.
The DG9232EDQ-T1-GE3 belongs to Vishay's precision analog switch family engineered for ultra-low distortion signal routing in safety-critical, low-power instrumentation - emphasizing leakage, charge injection, and ESD performance over raw speed or integration.
FAQ
What is the default switch state of DG9232EDQ-T1-GE3 at power-up?
The DG9232EDQ-T1-GE3 features two normally-closed (NC) SPST switches: both Switch-1 and Switch-2 conduct when the control inputs (IN1/IN2) are at logic low (≤0.8 V). At power-up with undefined control states, internal design ensures NC behavior dominates - maintaining signal continuity until firmware asserts logic high to open either switch. This fail-safe default is confirmed in the truth table on page 2 of Vishay document 75165.
Does DG9232EDQ-T1-GE3 support rail-to-rail analog signals?
Yes, DG9232EDQ-T1-GE3 supports analog signals from 0 V to V+ (up to +5.5 V), as specified in the "Analog signal range" parameter (0 to V+ V) under both 3 V and 5 V supply conditions. The switch conducts equally well in both directions when on, and blocks up to the power supply level when off - enabling true bidirectional, rail-to-rail operation without signal clipping or distortion in precision front-end designs.
Can DG9232EDQ-T1-GE3 be used with a 3.3 V supply?
Yes, DG9232EDQ-T1-GE3 is fully specified for operation from +2.7 V to +5.5 V, including standard 3.3 V systems. At V+ = 3.3 V, its typical on-resistance is 35 Ω (max 50 Ω), charge injection remains ≤1 pC, and logic thresholds (≤0.8 V low, ≥2.4 V high) are compatible with 3.3 V CMOS outputs. All dynamic and leakage parameters retain their specified performance across this range per Tables on pages 3–4 of the datasheet.
What is the maximum allowable analog signal voltage when V+ = 5 V?
When V+ = 5 V, the absolute maximum analog signal voltage on any COM, NO, or NC terminal is (V+ + 0.3 V) = 5.3 V, as defined in the Absolute Maximum Ratings table (page 2). Exceeding this clamps the signal via internal diodes; forward diode current must be limited to ±20 mA continuous or ±40 mA pulsed to avoid damage. For reliable operation, analog signals should remain within 0 V to V+ (0–5 V) per the functional specifications.
Is DG9232EDQ-T1-GE3 RoHS-compliant and lead-free?
Yes, DG9232EDQ-T1-GE3 is RoHS-compliant and lead-free, as indicated by the "-GE3" suffix in the part number and confirmed in Vishay's ordering information table (page 2 of document 75165). The "GE3" denotes lead (Pb)-free, halogen-free, and RoHS-compliant packaging per Vishay's material categorization standard (www.vishay.com/doc?99912). Full compliance documentation is available upon request from Aetrix Electronics.
DG9232EDQ-T1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Switch Circuit:
- SPST - NC
- Multiplexer/Demultiplexer Circuit:
- 1:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 25Ohm
- Channel-to-Channel Matching (ΔRon):
- 400mOhm
- Voltage - Supply, Single (V+):
- 2.7V ~ 5.5V
- Voltage - Supply, Dual (V±):
- -
- Switch Time (Ton, Toff) (Max):
- 75ns, 50ns
- -3db Bandwidth:
- -
- Charge Injection:
- -0.78pC
- Channel Capacitance (CS(off), CD(off)):
- 3.8pF
- Current - Leakage (IS(off)) (Max):
- 100pA
- Crosstalk:
- -108dB @ 1MHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-MSOP
DG9232EDQ-T1-GE3 FAQ
1.How can I place an order for DG9232EDQ-T1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG9232EDQ-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG9232EDQ-T1-GE3 reliable?
The price and inventory of DG9232EDQ-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG9232EDQ-T1-GE3 is usually 5 days.
3.What payment methods are accepted for DG9232EDQ-T1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG9232EDQ-T1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG9232EDQ-T1-GE3?
DG9232EDQ-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG9232EDQ-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG9232EDQ-T1-GE3?
For technical support, including DG9232EDQ-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG9232EDQ-T1-GE3 requirements.
6.How does Aetrix verify that DG9232EDQ-T1-GE3 is sourced from the original manufacturer or authorized distributors?
All DG9232EDQ-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG9232EDQ-T1-GE3 meets industry standards.
7.What is the process for return or replacement of DG9232EDQ-T1-GE3?
All DG9232EDQ-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with DG9232EDQ-T1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG9232EDQ-T1-GE3 part is unused and in its original packaging.
Return procedure for DG9232EDQ-T1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DG9232EDQ-T1-GE3 Tags
-
SN74LVC1G3157DBVR
Texas Instruments
-
SN74LVC1G66DBVR
Texas Instruments
-
SN74LVC1G66DCKR
Texas Instruments
-
SN74LVC1G3157DSFR
Texas Instruments
-
1P1G3157QDCKRQ1
Texas Instruments
-
SN74LVC2G66DCUR
Texas Instruments
-
SN74LV4052APWR
Texas Instruments
-
74HC4051D,653
Nexperia USA Inc.
-
SN74LV4051APWR
Texas Instruments
-
CD74HC4052PWR
Texas Instruments
-
CD74HC4051PWR
Texas Instruments
-
TS5A3166DBVR
Texas Instruments
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
