My Inquiry
My Account
Vishay Siliconix DG9263DY-T1-E3
- Part No.:
- DG9263DY-T1-E3
- Manufacturer:
- Vishay Siliconix
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DG9263DY-T1-E3.pdf
- Description:
- IC SWITCH SPST-NOX2 60OHM 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:4,355
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DG9263DY-T1-E3 from Vishay Siliconix is a low-voltage dual SPST analog switch in SOIC-8 package, designed for bidirectional signal routing in portable systems. It features 40 Ω on-resistance (RDS(on)), 35 ns turn-on time (tON), 20 ns turn-off time (tOFF), 1 pC charge injection, and operates from 2.7 V to 5 V supply - ideal for battery-powered sample-and-hold circuits and cellular phone front-end switching.
For engineers reviewing the DG9263DY-T1-E3 datasheet, DG9263DY-T1-E3 pinout, DG9263DY-T1-E3 application, or DG9263DY-T1-E3 equivalent, key selection criteria include logic-inverted control (high = on), break-before-make guarantee, ±20 mA continuous current rating, and SOIC-8 thermal derating above 75 °C (6.5 mW/°C).
Technical Context
The DG9263DY-T1-E3 implements two independent CMOS SPST switches fabricated on Vishay's BCD-15 process, with epitaxial latchup protection and 2000 V HBM ESD rating. Each switch conducts equally in both directions when on and blocks signals up to V+ when off.
Its inverted logic interface requires high-level input (≥2.4 V) to enable conduction, distinguishing it from the DG9262 variant. Break-before-make timing is guaranteed across -40 °C to +85 °C, and analog signal range spans 0 V to V+ (3 V or 5 V typical).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 2.7 V to 12 V - supports single-supply operation in 3 V and 5 V systems without level shifting |
| RDS(on) | 40 Ω max at V+ = 5 V - ensures minimal voltage drop and signal distortion in precision analog paths |
| tON/tOFF | 35 ns / 20 ns typical at V+ = 5 V - enables fast multiplexing in data acquisition and communication interfaces |
| Charge Injection | 1 pC typical - reduces settling error in sample-and-hold and ADC front-end applications |
| Off-Leakage Current | ±5000 pA max at room temperature - preserves signal integrity in high-impedance sensor interfaces |
| Logic Compatibility | TTL/CMOS - allows direct interfacing with microcontrollers and FPGAs without external drivers |
| ESD Rating | >2000 V HBM (Method 3015.7) - provides robust handling during board assembly and field operation |
Pinout & Package
Package: SOIC-8 (JEDEC MS-012, 5.00 mm × 3.95 mm × 1.50 mm), RoHS-compliant, Pb-free terminations.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (NO1) | Normally Open Terminal 1 | Switch output that connects to COM1 only when IN1 = logic high |
| 2 (V+) | Positive Supply Rail | Accepts 2.7–12 V; powers internal CMOS circuitry and defines analog signal ceiling |
| 3 (COM1) | Common Terminal 1 | Bidirectional analog path shared between NO1 and NC1; must remain within V+ range |
| 4 (IN1) | Control Input 1 | Inverted logic: ≥2.4 V enables NO1–COM1 path; ≤0.8 V disables it |
| 5 (IN2) | Control Input 2 | Inverted logic: ≥2.4 V enables NO2–COM2 path; ≤0.8 V disables it |
| 6 (COM2) | Common Terminal 2 | Bidirectional analog path shared between NO2 and NC2 |
| 7 (GND) | Ground Reference | Analog and digital return; must be low-impedance for leakage and noise control |
| 8 (NO2) | Normally Open Terminal 2 | Switch output that connects to COM2 only when IN2 = logic high |
Key Features
| Feature | Design Value |
|---|---|
| Inverted Logic Control | Eliminates need for external inverters in systems where active-high enable is unavailable |
| Break-Before-Make Guarantee | Prevents momentary shorting between channels during state transitions - critical for multi-channel mux safety |
| Low 1 pC Charge Injection | Minimizes voltage glitch on hold capacitors, enabling sub-12-bit accuracy in sampling circuits |
| 40 Ω RDS(on) Match | ΔRDS(on) ≤ 2 Ω ensures matched gain/attenuation across dual channels in differential signal paths |
| Halogen-Free Construction | Complies with IEC 61249-2-21 - meets environmental requirements for industrial and telecom equipment |
Applications
| Battery-Powered Test Equipment | Cellular Phone RF Front-End |
|---|---|
Use Scenario: Portable multimeter channel selection and signal conditioning under 3 V battery supply. IC Role / Device Role / Timing Role: Dual SPST switch routes sensor inputs to ADC while rejecting crosstalk and leakage. Use Value: 35 ns switching and 1 pC charge injection preserve measurement accuracy during rapid channel scanning. | Use Scenario: Antenna diversity switching and transceiver path selection in GSM/WCDMA handsets. IC Role / Device Role / Timing Role: Isolates RF receive paths during transmit bursts using break-before-make timing. Use Value: 2000 V ESD rating and 40 Ω RDS(on) ensure reliability and low insertion loss in noisy mobile environments. |
| Sample-and-Hold Circuits | Military Radio Signal Routing |
Use Scenario: Precision data acquisition system capturing analog waveforms at up to 10 MSPS. IC Role / Device Role / Timing Role: Connects analog source to hold capacitor with minimal charge kickback. Use Value: 1 pC charge injection and 20 ns tOFF reduce aperture uncertainty and improve effective resolution. | Use Scenario: Secure voice/data path switching in handheld tactical radios operating from 3.3 V rails. IC Role / Device Role / Timing Role: Enables rapid reconfiguration of audio and baseband signal chains under software control. Use Value: -40 °C to +85 °C operation and guaranteed break-before-make support ruggedized field deployment. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual SPST analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4623EUA+ | Same SOIC-8 package; 35 ns tON, but higher RDS(on) (60 Ω typ at 5 V); non-inverted logic | Requires logic inversion for DG9263DY-T1-E3 drop-in replacement; less suitable for low-RDS(on) precision paths | Select when non-inverted control simplifies system logic, and 60 Ω on-resistance is acceptable |
| ADG721BRMZ | SOIC-8; 3 V/5 V compatible; 4.5 Ω RDS(on) but only 100 mA peak current; no break-before-make guarantee | Superior on-resistance but lacks guaranteed break-before-make - unsuitable for safety-critical channel isolation | Choose for ultra-low distortion in audio or instrumentation where timing coordination is handled externally |
Compared with MAX4623EUA+ and ADG721BRMZ, the DG9263DY-T1-E3 uniquely combines inverted logic, guaranteed break-before-make, and 40 Ω RDS(on) in a production-qualified SOIC-8 package - making it optimal for portable systems requiring robust, low-distortion analog switching without external timing control.
Availability
DG9263DY-T1-E3 is available at Aetrix Electronics and suitable for battery-operated test equipment, cellular phone RF front-ends, sample-and-hold circuits, military radio systems, and PBX guidance requiring stable component supply across industrial temperature ranges.
Supply support for DG9263DY-T1-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global semiconductor manufacturer specializing in discrete MOSFETs, diodes, optoelectronics, and analog switches with emphasis on power efficiency and reliability.
The DG9263DY-T1-E3 belongs to Vishay's low-voltage analog switch product line, engineered for portable and battery-powered applications demanding low on-resistance, fast switching, and minimal charge injection.
FAQ
What is the logic polarity of DG9263DY-T1-E3 control inputs?
The DG9263DY-T1-E3 uses inverted logic: a logic high (≥2.4 V) on IN1 or IN2 enables the corresponding NO–COM path, while logic low (≤0.8 V) disables it. This differs from the DG9262 variant, which activates on logic low. The DG9263DY-T1-E3 truth table explicitly confirms "Logic 1 = On" for both channels, eliminating ambiguity in firmware-driven switching sequences.
Does DG9263DY-T1-E3 support rail-to-rail analog signal switching?
Yes, the DG9263DY-T1-E3 supports analog signals from 0 V to V+ (up to 5 V typical), with full conduction and blocking capability across that range. Its CMOS architecture ensures symmetrical on-resistance and leakage performance regardless of signal polarity, provided no terminal exceeds V+ + 0.3 V or falls below -0.3 V relative to GND - as specified in Absolute Maximum Ratings.
What is the maximum continuous current rating per switch in DG9263DY-T1-E3?
The DG9263DY-T1-E3 supports ±20 mA continuous current per switch terminal, as defined in Absolute Maximum Ratings. Exceeding this limit risks thermal overstress or parametric shift. Derating is required above 75 °C (6.5 mW/°C), and peak pulsed current is limited to ±40 mA at 1 ms pulse width and 10% duty cycle.
Is DG9263DY-T1-E3 pin-compatible with DG9262DY-T1-E3?
No, DG9263DY-T1-E3 is not pin-compatible with DG9262DY-T1-E3. Although both use SOIC-8 packaging and share identical pinouts (NO1, V+, COM1, IN1, IN2, COM2, GND, NO2), their logic polarity is inverted: DG9262 activates switches on logic low, while DG9263 activates on logic high. Swapping them without firmware adjustment causes functional failure - confirmed by separate truth tables in the DG9262/DG9263 datasheet.
What package variants are offered for DG9263DY-T1-E3?
The DG9263DY-T1-E3 is exclusively offered in SOIC-8 (narrow-body, JEDEC MS-012). The MSOP-8 variant is designated DG9263DQ-T1-E3 - a different orderable part with distinct land pattern, thermal resistance, and mechanical footprint. No other packages (e.g., TSSOP, QFN) are listed for DG9263DY-T1-E3 in Vishay's official ordering information or package drawings.
DG9263DY-T1-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Switch Circuit:
- SPST - NO
- Multiplexer/Demultiplexer Circuit:
- 1:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 60Ohm
- Channel-to-Channel Matching (ΔRon):
- 400mOhm
- Voltage - Supply, Single (V+):
- 2.7V ~ 12V
- Voltage - Supply, Dual (V±):
- -
- Switch Time (Ton, Toff) (Max):
- 75ns, 50ns
- -3db Bandwidth:
- -
- Charge Injection:
- 2pC
- Channel Capacitance (CS(off), CD(off)):
- 7pF
- Current - Leakage (IS(off)) (Max):
- 100pA
- Crosstalk:
- -90dB @ 1MHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
DG9263DY-T1-E3 FAQ
1.How can I place an order for DG9263DY-T1-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG9263DY-T1-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG9263DY-T1-E3 reliable?
The price and inventory of DG9263DY-T1-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG9263DY-T1-E3 is usually 5 days.
3.What payment methods are accepted for DG9263DY-T1-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG9263DY-T1-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG9263DY-T1-E3?
DG9263DY-T1-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG9263DY-T1-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG9263DY-T1-E3?
For technical support, including DG9263DY-T1-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG9263DY-T1-E3 requirements.
6.How does Aetrix verify that DG9263DY-T1-E3 is sourced from the original manufacturer or authorized distributors?
All DG9263DY-T1-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG9263DY-T1-E3 meets industry standards.
7.What is the process for return or replacement of DG9263DY-T1-E3?
All DG9263DY-T1-E3 units undergo pre-shipment inspection (PSI). If there is an issue with DG9263DY-T1-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG9263DY-T1-E3 part is unused and in its original packaging.
Return procedure for DG9263DY-T1-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DG9263DY-T1-E3 Tags
-
SN74LVC1G3157DBVR
Texas Instruments
-
SN74LVC1G66DBVR
Texas Instruments
-
SN74LVC1G66DCKR
Texas Instruments
-
SN74LVC1G3157DSFR
Texas Instruments
-
1P1G3157QDCKRQ1
Texas Instruments
-
SN74LVC2G66DCUR
Texas Instruments
-
SN74LV4052APWR
Texas Instruments
-
74HC4051D,653
Nexperia USA Inc.
-
SN74LV4051APWR
Texas Instruments
-
CD74HC4052PWR
Texas Instruments
-
CD74HC4051PWR
Texas Instruments
-
TS5A3166DBVR
Texas Instruments
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
