Semtech Corporation GS1559-CBE2
- Part No.:
- GS1559-CBE2
- Manufacturer:
- Semtech Corporation
- Category:
- Video Processing
- Package:
- 100-LBGA
- Datasheet:
-
GS1559-CBE2.pdf
- Description:
- IC VIDEO RECLOCKER 100BGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
GS1559-CBE2 from Gennum is a multi-rate HD-SDI/SD-SDI/DVB-ASI deserializer with integrated reclocker, loop-through cable driver, and parallel 20-bit/10-bit CMOS output. It supports SMPTE 292M (1.485 Gb/s), SMPTE 259M-C (270 Mb/s), and DVB-ASI (270 Mb/s) standards, performs NRZI→NRZ decoding and descrambling, and delivers parallel clock outputs at 148.5/74.25/27/13.5 MHz for broadcast video routing systems.
For engineers reviewing the GS1559-CBE2 datasheet, pinout, applications, or equivalent options, key selection criteria include input jitter tolerance (±0.3 UI), reclocked vs. buffered loop-through mode control, SMPTE 352M payload ID detection, EDH CRC correction capability, and dual-input mux support for redundant signal switching in professional video infrastructure.
Technical Context
The GS1559-CBE2 implements a dual-path serial digital input architecture with 2×1 multiplexer selection between DDI1/DDI1 and DDI2/DDI2 differential inputs, each with integrated termination. Its reclocker uses an external VCO (e.g., GO1555) and features programmable loop bandwidth via LB_CONT and ±0.3 UI input jitter tolerance compliant with SMPTE 292M and DVB-ASI.
In SMPTE mode, it performs word alignment, flywheel-based H/V/F timing extraction, and descrambling per SMPTE 292M/259M-C; in DVB-ASI mode, it executes 8b/10b decoding and K28.5 sync alignment. All error detection (CRC, TRS, EDH, line number, ANC checksum) and correction functions are host-configurable via GSPI interface and can be individually enabled/disabled.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Data Rates | 1.485 Gb/s (HD-SDI), 270 Mb/s (SD-SDI/DVB-ASI) - supports auto-detection and lock without manual rate setting |
| Input Jitter Tolerance | ±0.3 UI - ensures robust locking to degraded cable signals in long-haul broadcast links |
| Parallel Output Bus | 20-bit or 10-bit CMOS - configurable via 20bit/10bit pin; supports luma/chroma demux or multiplexed output |
| Output Clock Frequencies | 148.5 / 74.25 / 27 / 13.5 MHz - matches SMPTE pixel clock harmonics for seamless integration with FPGA/ASIC video processors |
| Power Supplies | 1.8 V core, 3.3 V I/O, 3.3 V charge pump - enables low-power operation while maintaining LVCMOS/LVTTL compatibility |
| Standards Compliance | SMPTE 292M, SMPTE 259M-C, DVB-ASI - guarantees interoperability with certified broadcast equipment |
| Loop-Through Driver | Reclocked or non-reclocked output - selectable via RC_BYP pin; includes loss-of-signal mute and slew-rate adaptation |
Pinout & Package
GS1559-CBE2 is housed in an 11 mm × 11 mm Pb-free QFN-100 package with exposed thermal pad. Pin assignment follows a 10×10 grid layout with dedicated analog/digital power domains, differential input pairs (DDI1/DDI1, DDI2/DDI2), and 20-bit parallel data bus (DOUT[19:0]) plus status/control signals.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DDI1 / DDI1 DDI2 / DDI2 | Differential Serial Input Pairs | Two independent SMPTE/DVB-ASI input channels; selected via IP_SEL; each with integrated AC-coupled termination |
| SDO | Serial Loop-Through Output | Reclocked or buffered output; supports cable re-drive with mute-on-loss-of-signal and HD/SD slew-rate adaptation |
| DOUT[19:0] | Parallel Digital Output Bus | 20-bit LVCMOS/LVTTL bus; MSB-aligned; configurable as 20-bit demux or 10-bit multiplexed per SD/HD and 20bit/10bit pins |
| PCLK | Parallel Clock Output | LVCMOS/LVTTL clock synchronized to parallel data; frequency set by data rate and bus width (e.g., 74.25 MHz in HD 20-bit mode) |
| RC_BYP | Reclock Bypass Control/Status | Input in Slave mode to force reclocked/buffered SDO; output in Master mode indicating SMPTE lock status |
| LOCKED | Lock Status Indicator | Active-HIGH synchronous output confirming valid SMPTE or DVB-ASI lock; used for system-level fault monitoring |
Key Features
| Feature | Design Value |
|---|---|
| Auto-configured HD/SD detection | Eliminates manual rate selection - device automatically identifies 1.485 Gb/s vs. 270 Mb/s streams and configures internal processing accordingly |
| Integrated flywheel timing extraction | Enables noise-immune H/V/F signal generation from noisy or unstable serial inputs - critical for stable frame synchronization in live production |
| Programmable error correction engine | Corrects line-based CRC (HD), EDH CRC (SD), TRS, ANC checksum, and line number errors - reduces downstream video artifacts without external logic |
| Host-configurable I/O processing | Individual enable/disable of CRC check, TRS insertion, illegal code remapping, and ANC detection via GSPI register writes - supports flexible feature licensing or mode-specific optimization |
| Dual-input mux with carrier detect | Supports hot-swappable input redundancy using CD1/CD2 status signals - enables automatic failover in mission-critical broadcast routers |
Applications
| HD-SDI Video Routing Switcher | SD-SDI Broadcast Distribution Amplifier |
|---|---|
Use Scenario: A 32×32 HD-SDI router receives 1.485 Gb/s signals from multiple camera feeds and must distribute clean, reclocked, parallel video data to processing blades. IC Role / Device Role / Timing Role: GS1559-CBE2 acts as the front-end deserializer and reclocker, extracting embedded timing (H/V/F), performing SMPTE descrambling, and delivering aligned 20-bit parallel data with PCLK. Use Value: Enables deterministic latency and jitter reduction across all input paths, ensuring frame-accurate switching and eliminating timing skew between sources. | Use Scenario: An SD-SDI distribution amplifier accepts a single 270 Mb/s feed and fans out to 16 monitors, requiring signal regeneration and integrity verification. IC Role / Device Role / Timing Role: GS1559-CBE2 serves as deserializer + loop-through driver, providing reclocked serial output to downstream receivers while generating parallel data for local EDH/CRC validation. Use Value: Simultaneous serial re-drive and parallel error checking allows real-time signal health monitoring without adding external test equipment. |
| DVB-ASI Transport Stream Decoder | Multi-Standard Broadcast Capture Card |
Use Scenario: A cable headend ingest card decodes DVB-ASI transport streams (270 Mb/s) carrying MPEG-TS packets for transcoding and IP streaming. IC Role / Device Role / Timing Role: GS1559-CBE2 performs 8b/10b decoding, K28.5 word alignment, and parallel data output - feeding FPGA-based TS parser and PID filter logic. Use Value: Native DVB-ASI compliance eliminates need for external decoder ASICs; parallel bus simplifies high-speed interface to Xilinx/Kintex FPGAs. | Use Scenario: A PCIe capture card supports HD-SDI, SD-SDI, and DVB-ASI inputs on a single board, requiring automatic standard detection and unified parallel interface. IC Role / Device Role / Timing Role: GS1559-CBE2 operates in Master mode to auto-detect SMPTE or DVB-ASI, configure internal blocks, and output standardized 20-bit parallel data with PCLK. Use Value: Single-chip multi-standard support reduces BOM count and PCB area versus discrete SDI/DVB solutions - accelerating time-to-market for OEM video cards. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rate serial digital deserializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| GS2971-IBE2 | Successor Gennum device with enhanced SMPTE 424M (3 Gb/s) support, lower power, and integrated equalizer - not pin-compatible; requires layout change | Targets next-gen 3G-SDI infrastructure; lacks DVB-ASI mode; adds HDMI-style embedded audio extraction | Select GS2971-IBE2 only for new 3G-SDI designs; GS1559-CBE2 remains optimal for legacy HD/SD/DVB-ASI convergence systems |
| LMH0384SQ/NOPB | Texas Instruments device with integrated cable equalizer and reclocker; supports SMPTE 292M/259M but no DVB-ASI decoding or parallel error correction | Focused on signal conditioning only; requires external FPGA for parallel processing and EDH/CRC handling | Choose LMH0384SQ/NOPB when signal recovery dominates requirements; GS1559-CBE2 preferred when full SMPTE/DVB-ASI deserialization + correction is needed on-chip |
Compared with GS2971-IBE2 and LMH0384SQ/NOPB, the GS1559-CBE2 uniquely combines SMPTE 292M/259M-C and DVB-ASI 8b/10b decoding, on-the-fly error correction, and dual-input mux in a single chip - making it irreplaceable for multi-standard broadcast equipment where firmware-controlled feature flexibility and legacy protocol support are mandatory.
Availability
GS1559-CBE2 is available at Aetrix Electronics and suitable for HD-SDI routing switchers, SD-SDI distribution amplifiers, DVB-ASI transport stream decoders, and multi-standard broadcast capture cards requiring stable component supply across extended product lifecycles.
Supply support for GS1559-CBE2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Gennum Corporation was a Canadian semiconductor company specializing in high-speed serial interface ICs for professional video, broadcast, and communications markets before its acquisition by Semtech in 2011.
The GS1559-CBE2 belongs to Gennum's HD-LINX™ II family, engineered specifically for broadcast-grade serial digital interface applications demanding SMPTE and DVB-ASI interoperability, robust jitter tolerance, and integrated signal processing.
FAQ
What video standards does the GS1559-CBE2 support?
The GS1559-CBE2 supports SMPTE 292M (HD-SDI, 1.485 Gb/s), SMPTE 259M-C (SD-SDI, 270 Mb/s), and DVB-ASI (270 Mb/s). It auto-detects incoming data rates and configures internal descrambling, decoding, and timing extraction accordingly. The GS1559-CBE2 does not support SMPTE 424M (3G-SDI) or HDMI protocols.
Does the GS1559-CBE2 require an external VCO?
Yes, the GS1559-CBE2 requires an external Voltage Controlled Oscillator such as the GO1555 (recommended for new designs) or GO1525 to implement its reclocking function. The device provides dedicated VCO_VCC, VCO_GND, and differential VCO inputs, along with LF and LB_CONT pins for loop filter and bandwidth control. The GS1559-CBE2 itself contains no on-chip oscillator.
How does the GS1559-CBE2 handle ancillary data detection?
The GS1559-CBE2 detects VANC and HANC data in both HD and SD modes using YANC and CANC status outputs synchronized to PCLK. In HD mode, YANC indicates luma ancillary data and CANC indicates chroma ancillary data; in SD mode, behavior depends on 20bit/10bit configuration. Detection is fully configurable via host interface registers. The GS1559-CBE2 also supports programmable ANC data filtering and checksum validation.
Can the GS1559-CBE2 operate without the Host Interface?
Yes, the GS1559-CBE2 supports basic operation in pin-strapped mode using control pins like SMPTE_BYPASS, DVB_ASI, SD/HD, and RC_BYP. However, advanced features - including EDH correction, illegal code remapping, ANC detection thresholds, and individual error correction enablement - require configuration via the GSPI host interface. The GS1559-CBE2 will function as a deserializer/reclocker without host communication, but full feature utilization mandates host access.
What is the purpose of the FW_EN/DIS pin on the GS1559-CBE2?
The FW_EN/DIS pin enables or disables the internal flywheel circuit used for noise-immune extraction of horizontal (H), vertical (V), and field (F) timing signals. When HIGH, the flywheel stabilizes TRS timing generation, improves automatic video standard detection accuracy, and supports manual switch-line lock handling. When LOW, flywheel functionality is disabled and TRS correction/insertion becomes unavailable. This pin directly controls a core timing subsystem within the GS1559-CBE2.
GS1559-CBE2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Semtech Corporation
- Series:
- HD-LINX® II
- Package/Case:
- 100-LBGA
- Packaging:
- Tray
- Product Status:
- Obsolete
- Function:
- Reclocker
- Applications:
- Professional Video
- Standards:
- SMPTE
- Control Interface:
- Serial
- Voltage - Supply:
- 3V ~ 3.6V
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 100-LBGA (11x11)
GS1559-CBE2 FAQ
1.How can I place an order for GS1559-CBE2 through Aetrix?
Please submit a Request for Quotation (RFQ) for GS1559-CBE2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for GS1559-CBE2 reliable?
The price and inventory of GS1559-CBE2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for GS1559-CBE2 is usually 5 days.
3.What payment methods are accepted for GS1559-CBE2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for GS1559-CBE2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for GS1559-CBE2?
GS1559-CBE2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your GS1559-CBE2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for GS1559-CBE2?
For technical support, including GS1559-CBE2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your GS1559-CBE2 requirements.
6.How does Aetrix verify that GS1559-CBE2 is sourced from the original manufacturer or authorized distributors?
All GS1559-CBE2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that GS1559-CBE2 meets industry standards.
7.What is the process for return or replacement of GS1559-CBE2?
All GS1559-CBE2 units undergo pre-shipment inspection (PSI). If there is an issue with GS1559-CBE2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The GS1559-CBE2 part is unused and in its original packaging.
Return procedure for GS1559-CBE2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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