Semtech Corporation GS9060-CFE3

Overview

GS9060-CFE3 from Gennum is a SMPTE 259M-C and DVB-ASI compliant reclocking deserializer with integrated loop-through cable driver, 20-bit/10-bit parallel output, 27 MHz/13.5 MHz clock support, and JTAG/host interface control. It performs NRZI-to-NRZ decoding, descrambling, word alignment, and error correction in broadcast video infrastructure.

For engineers reviewing the GS9060-CFE3 datasheet, pinout, applications, or equivalent options, this page delivers verified electrical specs, real-world timing roles (H/V/F extraction), parallel bus configuration options, and confirmed alternative parts for SD-SDI/DVB-ASI receiver design validation and replacement sourcing.

Technical Context

The GS9060-CFE3 implements dual serial digital input buffers with 2×1 mux selection, an integrated reclocker achieving ±0.3 UI input jitter tolerance and rapid asynchronous lock, and a configurable loop-through cable driver supporting both reclocked and non-reclocked SDO outputs with mute-on-loss-of-signal. Its SMPTE mode handles TRS-based timing extraction and flywheel-assisted H/V/F generation, while DVB-ASI mode performs K28.5 sync detection and 8b/10b decoding.

It supports automatic standards detection, EDH CRC/ANC checksum/TRS error detection and correction, illegal code remapping, and programmable I/O processing enablement via host interface registers. Parallel output is configurable as 20-bit demultiplexed (13.5 MHz) or 10-bit multiplexed (27 MHz), with dedicated YANC/CANC status signals and FIFO_LD pulse synchronized to PCLK.

Key Specifications

Pinout & Package

GS9060-CFE3 is housed in an 80-pin LQFP package (12 mm × 12 mm, 0.5 mm pitch) with exposed thermal pad. Power domains are segregated: CORE_GND/CORE_VDD (1.8 V digital core), IO_GND/IO_VDD (3.3 V I/O), CP_GND/CP_VDD (3.3 V analog charge pump), PDBUFF_GND/BUFF_VDD (1.8 V analog input buffers), CD_GND/CD_VDD (1.8 V cable driver), and VCO_GND/VCO_VCC (isolated VCO supply).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar SD-SDI and DVB-ASI deserialization applications.

Compared with GS9062-CFE3, GS9060-CFE3 is the designated production part with identical functionality and footprint; compared with GS1561-CFE3, it adds full DVB-ASI decode, dual-input flexibility, and comprehensive error correction - making it the only choice for multi-standard broadcast infrastructure.

Availability

GS9060-CFE3 is available at Aetrix Electronics and suitable for broadcast video receivers, DVB-ASI transport decoders, multi-standard video routers, and field-deployable signal analyzers requiring stable component supply and long-term lifecycle support.

Supply support for GS9060-CFE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Gennum Corporation was a fabless semiconductor company specializing in high-speed serial interface ICs for broadcast, medical imaging, and industrial video applications before its acquisition by Semtech in 2011.

The GS9060-CFE3 belongs to Gennum's HD-LINX® II family, designed specifically for robust, standards-compliant SD-SDI and DVB-ASI deserialization in professional broadcast equipment where signal integrity, error resilience, and multi-format interoperability are critical.

FAQ

What video standards does the GS9060-CFE3 support?

The GS9060-CFE3 supports SMPTE 259M-C for SD-SDI (including 525i and 625i formats) and DVB-ASI transport streams. It performs automatic standards detection and indication, extracting video timing (H/V/F) and payload identifiers per SMPTE 352M. The GS9060-CFE3 does not support HD-SDI, 3G-SDI, or HDMI protocols - its design scope is strictly SD-SDI and DVB-ASI baseband and transport layer compliance.

Does the GS9060-CFE3 require an external VCO?

Yes, the GS9060-CFE3 requires an external voltage-controlled oscillator such as the GO1555 (recommended for new designs) or GO1525 to implement its integrated reclocker. The device provides dedicated VCO differential inputs (pins 73/74), VCO_GND (pin 75), VCO_VCC (pin 76), LF (pin 77), and LB_CONT (pin 79) for full PLL control. Without an external VCO, the reclocker cannot achieve lock, and the GS9060-CFE3 will not generate valid parallel output or timing signals.

How does the GS9060-CFE3 handle error correction in broadcast workflows?

The GS9060-CFE3 detects and corrects TRS ID words, ancillary data checksums, and EDH CRC errors in real time using internal logic. It provides a single DATA_ERROR pin (active-low OR of all errors) and individual status bits in the ERROR_STATUS register. Corrections are applied before parallel output, ensuring clean data delivery to downstream processors. The GS9060-CFE3 also supports illegal code remapping and can insert new TRS/ANC/EDH words - meeting SMPTE RP168 and EBU R97 broadcast reliability requirements.

Can the GS9060-CFE3 operate with only one serial input source?

Yes, the GS9060-CFE3 supports single-input operation. When IP_SEL is held HIGH, it uses DDI1/DDI1 and CD1; when LOW, it uses DDI2/DDI2 and CD2. Either input can be used independently - the unused differential pair should be terminated per datasheet guidelines (e.g., TERM1 or TERM2 AC-coupled to PDBUFF_GND). No reconfiguration of internal logic is needed; the 2×1 mux simply routes the selected input to the reclocker and decoder blocks.

What are the power supply requirements for the GS9060-CFE3?

The GS9060-CFE3 requires four independent supply rails: 1.8 V for CORE_VDD (digital core), 3.3 V for IO_VDD (I/O buffers), 3.3 V for CP_VDD (charge pump), and 1.8 V for CD_VDD (cable driver). Each has dedicated ground pins (CORE_GND, IO_GND, CP_GND, CD_GND, PDBUFF_GND, VCO_GND) that must be routed separately per the layout guidelines in the datasheet. Mixing or sharing these supplies degrades jitter performance and may cause functional failure.