Infineon Technologies IR2235JTRPBF

Overview

IR2235JTRPBF from Infineon Technologies is a high-voltage, high-speed 3-phase bridge driver IC with six independent gate drive channels (three high-side and three low-side), rated for up to 1200V offset voltage, ±200 mA / +420 mA output current, 10–20 V gate supply range, 750/700 ns typical turn-on/turn-off propagation delay, and 250 ns matched deadtime. It integrates an analog current-sense amplifier and over-current shutdown for motor inverter applications.

For engineers reviewing the IR2235JTRPBF datasheet, IR2235JTRPBF pinout, IR2235JTRPBF application, or IR2235JTRPBF equivalent, key selection criteria include 1200V floating channel capability, integrated current feedback via CA+/CA−/CAO pins, fault-clear (FLT-CLR) and shutdown (SD) logic control, and SOIC-28 package compatibility with bootstrap gate drive topologies.

Technical Context

The IR2235JTRPBF employs proprietary HVIC (High-Voltage IC) technology to enable monolithic integration of three isolated high-side drivers capable of operating at VS offsets up to 1200 V with dV/dt immunity. Its floating channels use bootstrap-supplied VBx pins to drive N-channel IGBTs or MOSFETs in high-side configurations.

It features a dedicated current-sense amplifier (CA+, CA−, CAO) with 5–10 V/µs slew rate and ±30 mV input offset, enabling real-time analog current monitoring. Over-current protection triggers full six-output shutdown within 850 ns (typ.), while undervoltage lockout on both VCC and VBx supplies ensures robust start-up and fault recovery.

Key Specifications

Pinout & Package

IR2235JTRPBF is housed in a 28-lead wide-body SOIC package (body width 0.400", JEDEC MS-013AC) with exposed thermal pad (not electrically connected). Pin layout supports compact 3-phase inverter PCB routing with segregated high-side (VB1–VB3, VS1–VS3, HO1–HO3) and low-side (VSS, COM, LO1–LO3) sections.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 3-phase gate driver applications.

Compared with IR2235JTRPBF, IR2233JTRPBF trades 1200 V capability for cost reduction in lower-voltage systems, while IRS2330JPbF removes the integrated amplifier to simplify die size-both require revalidation of fault response timing and current sensing accuracy.

Availability

IR2235JTRPBF is available at Aetrix Electronics and suitable for industrial motor inverters, EV traction systems, solar PV string inverters, and UPS three-phase output stages requiring stable component supply and long-term lifecycle support.

Supply support for IR2235JTRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive electronics, and industrial control ICs, with global manufacturing and quality certification to ISO 9001 and IATF 16949.

The IR22xx family targets high-reliability 3-phase inverter systems, emphasizing integrated protection (UVLO, OCP), timing precision, and high-voltage robustness for motor control and renewable energy applications.

FAQ

What is the maximum allowable dV/dt at VS pins for reliable operation?

The IR2235JTRPBF is specified as dV/dt immune up to 50 V/ns under recommended operating conditions. This rating is validated per the Absolute Maximum Ratings table and ensures no false triggering occurs during fast-rising bus transients in IGBT-based inverters. Layout practices-including short VB/VS traces and localized bootstrap capacitors-are required to maintain this immunity in production designs.

Can the CAO output drive an MCU's ADC input directly?

Yes, CAO delivers a rail-to-rail output (0–5.4 V) with ±20 mV low-level output and 7 mA source/sink capability, fully compatible with 12-bit or 16-bit SAR ADCs having ≥10 kΩ input impedance. No series resistor or buffer is needed if the ADC sample-and-hold capacitance is ≤100 pF and acquisition time exceeds 100 ns.

How does the 250 ns deadtime behave under varying temperature and supply voltage?

Deadtime remains stable across −40°C to +125°C junction temperature and 10–20 V VCC due to internal matched delay circuitry. Data sheet Figure 3 confirms variation stays within ±50 ns over full operating range, ensuring consistent shoot-through prevention regardless of thermal or rail drift in industrial environments.

Is the FLT-CLR function latched or edge-triggered?

FLT-CLR is a level-sensitive, negative-logic input: holding FLT-CLR low for ≥850 ns (per tfltclr spec) clears the FAULT latch and restores normal operation. It is not edge-triggered; the signal must remain asserted for the full propagation delay to guarantee reset, especially after sustained over-current events.