Infineon Technologies IR3521MTRPBF
- Part No.:
- IR3521MTRPBF
- Manufacturer:
- Infineon Technologies
- Category:
- Power Management - Specialized
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
IR3521MTRPBF.pdf
- Description:
- IC CTRL XPHASE3 SVID 32-MLPQ
- Quantity:
- Payment:

- Shipping:

Inventory:2,763
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Product details
Overview
IR3521MTRPBF from Infineon Technologies is an AMD SVID-compliant dual-output digital power controller IC for CPU core (VDD) and auxiliary (VDDNB) voltage planes. It delivers 0.5% system set-point accuracy, supports 250kHz–1.5MHz per-phase switching, integrates high-speed error amplifiers (20MHz bandwidth, 10V/µs slew), and enables remote differential sensing with <50µA bias current. Used in AMD-based server and desktop motherboards for precise, adaptive CPU power delivery.
For engineers reviewing the IR3521MTRPBF datasheet, IR3521MTRPBF pinout, IR3521MTRPBF application, or IR3521MTRPBF equivalent, key selection criteria include SVID protocol compliance, dual-plane remote sensing capability, programmable dynamic VID slew rates, hiccup-mode overcurrent protection, and compatibility with xPHASE3™ phase ICs in multi-phase buck topologies.
Technical Context
The IR3521 operates as a master controller in a distributed two-output power architecture: it receives SVID commands from the AMD processor via SVC/SVD bus, generates reference voltages (VDAC1/VDAC2), and coordinates timing and fault signaling across multiple external phase ICs using PSI_L, CLKOUT, PHSOUT, and IIN/ISHARE signals. Its dual error amplifiers drive remote sense loops independently with programmable output impedance and dynamic OC thresholds.
It implements centralized overvoltage detection via ROSC/OVP pin (0.6V normal, >1.6V OVP flag), disables OVP during dynamic VID down-transitions to prevent false triggering, and provides open-sense-line detection. The VCCL linear regulator (programmable 4.75–7.5V input) powers internal circuitry and supplies bias to gate drivers and clock logic.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| SVID Compliance | Fully compliant with AMD Serial VID interface; supports boot VID decoding and dynamic voltage scaling per AMD specification. |
| Output Planes | Dual independent outputs: VDD core and VDDNB auxiliary, each with dedicated remote sense, error amplifier, and current monitoring. |
| Set-Point Accuracy | ±0.5% overall system accuracy ensures tight voltage regulation under load transients and temperature variation. |
| Error Amplifier BW/Slew | 20MHz bandwidth and 10V/µs slew rate enable fast transient response for high-performance CPU loads. |
| Switching Frequency Range | Programmable 250kHz–1.5MHz per phase via ROSC resistor; determines trade-off between efficiency, size, and EMI. |
| Remote Sense Bias | <50µA bias current per sense pair minimizes IR drop error and supports long PCB trace routing. |
| OVP Detection Logic | Centralized overvoltage detection with delay and dynamic disable during VID down transitions prevents false shutdown. |
Pinout & Package
IR3521MTRPBF is housed in a thermally enhanced 32-lead MLPQ package (5mm × 5mm body, 0.5mm pitch), with exposed EPAD for improved thermal dissipation and grounding. Pin assignment follows JEDEC MO-220 standard for MLPQ-32.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 SVD | SVID data bidirectional bus | Open-drain I/O for serial VID communication with AMD CPU; requires external pull-up. |
| 3 ENABLE | Global converter enable control | Active-high logic input; low state forces fault mode; must be externally biased-never floated. |
| 4 IIN2 / 21 IIN1 | Average phase current inputs | Receive summed current signals from VDDNB/VDD phase ICs; also carry OV fault signals via ISHARE protocol. |
| 11 VOSEN1+ / 12 VOSEN1− / 14 VOSEN2+ / 12 VOSEN2− | Differential remote sense inputs | Enable Kelvin sensing at CPU VRM output; reject PCB IR drop and noise for accurate regulation. |
| 23 ROSC/OVP | Oscillator frequency & OV monitor | Resistor-programmed switching frequency; voltage >1.6V indicates system overvoltage condition. |
| 24 PSI_L | Power state indicator output | Drives digital signal to phase ICs indicating C-state transitions (e.g., C6/C7) for phase shedding. |
| 25 CLKOUT / 26 PHSOUT | Phase clock distribution | CLKOUT = fSW × Nphases; PHSOUT = fSW; synchronize all phase ICs in daisy-chain topology. |
| 31 PGOOD | System power-good status | Open-collector output asserting high only when both VDD and VDDNB are within ±315mV of VDAC targets. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable Dynamic VID Slew Rates | RC networks on VDAC1/VDAC2 pins allow independent tuning of voltage ramp speed to meet AMD C-state transition timing requirements. |
| Per-Phase Switching Frequency Control | Single ROSC resistor sets identical frequency across all phases-ensuring synchronized operation and predictable EMI profile. |
| Hiccup Overcurrent Protection | Auto-retry fault recovery with programmable delay prevents latch-up during temporary overload or inrush events. |
| Centralized OVP with Dynamic Disable | OVP remains active during startup and steady state but suppresses during VID down-slews to avoid false triggers from intentional undershoot. |
| Gate Drive & VCCL Bias Regulation | Integrated linear regulator (VCCL) powers internal clocks and gate drivers; output voltage programmable via external divider on VCCLFB. |
Applications
| Server CPU Power Delivery | Desktop AM4 Platform VRM |
|---|---|
Use Scenario: High-current, multi-phase power delivery for AMD EPYC™ processors in 1U/2U rack servers requiring strict voltage accuracy and thermal management. IC Role / Device Role / Timing Role: Master SVID controller coordinating up to 8+ xPHASE3™ phase ICs; manages dynamic VID, phase shedding via PSI_L, and centralized fault reporting. Use Value: Enables <0.5% voltage deviation across 0–120A load range while supporting C6/C7 deep sleep states with sub-100ns PSI_L latency. | Use Scenario: Dual-rail motherboard VRM for Ryzen™ 5000-series CPUs with discrete GPU co-location and PCIe 4.0 signal integrity constraints. IC Role / Device Role / Timing Role: Dual-output controller managing independent VDD (core) and VDDNB (northbridge) rails; uses remote sensing to compensate for VRM-to-CPU voltage drop. Use Value: Achieves 20MHz error amplifier bandwidth and 10V/µs slew rate to maintain regulation during 100A/µs CPU load steps without overshoot exceeding ±20mV. |
| Workstation APUs with Integrated Graphics | Embedded AMD Ryzen™ Embedded SoC Systems |
Use Scenario: Compact form-factor workstations (e.g., mini-ITX) requiring low-profile, high-efficiency CPU power with minimal BOM count. IC Role / Device Role / Timing Role: Central controller interfacing with two xPHASE3™ phase ICs-one for VDD, one for VDDNB-reducing component count vs. discrete PWM + driver solutions. Use Value: 32-pin MLPQ (5×5mm) package reduces PCB area by 40% vs. legacy QFN alternatives while maintaining thermal performance via EPAD grounding. | Use Scenario: Fanless industrial edge compute systems using Ryzen™ Embedded V1000/V2000 SoCs with extended temperature and lifecycle requirements. IC Role / Device Role / Timing Role: SVID master enabling firmware-controlled voltage scaling and telemetry reporting (via IIN/ISHARE) for predictive thermal throttling. Use Value: Programmable OCSET1/OCSET2 thresholds and dynamic VID offset allow fine-grained current limiting aligned with SoC TDP profiles across -40°C to +85°C. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar AMD SVID dual-output controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IR35203MTRPBF | Single-output SVID controller; lacks VDDNB rail support and associated pins (IIN2, VDAC2, etc.). | Only suitable for single-rail CPU designs or where VDDNB is integrated into SoC or handled separately. | Select only if VDDNB is not required or managed externally-IR3521MTRPBF is mandatory for full AMD platform compliance. |
| MP2940AGQSE-LF-Z | Monolithic dual-output controller with integrated MOSFET drivers; no external phase IC interface; fixed 500kHz–1.2MHz frequency range. | Targets cost-sensitive consumer boards; lacks PSI_L, CLKOUT, and daisy-chain capability for scalable multi-phase designs. | Choose for simplified BOM and lower layout complexity; avoid when phase scalability or AMD C-state coordination is needed. |
Compared with IR35203MTRPBF and MP2940AGQSE-LF-Z, IR3521MTRPBF uniquely supports dual-rail AMD SVID with distributed phase IC architecture, enabling higher current capacity, better thermal distribution, and precise C-state synchronization-critical for server-grade reliability and performance headroom.
Availability
IR3521MTRPBF is available at Aetrix Electronics and suitable for server motherboard design, AMD desktop VRM development, and embedded Ryzen™ platform power management requiring stable component supply and long-term lifecycle support.
Supply support for IR3521MTRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive, and industrial control ICs, with leadership in high-efficiency DC-DC conversion and digital power control.
The IR35xx series is designed specifically for AMD CPU power delivery ecosystems, emphasizing SVID protocol fidelity, multi-phase scalability, and robust fault handling in high-density computing environments.
FAQ
What is the function of the ROSC/OVP pin on IR3521MTRPBF?
The ROSC/OVP pin serves dual functions: it sets the per-phase switching frequency via an external resistor (7.75kΩ–50kΩ), and acts as a centralized overvoltage monitor. During normal operation, its voltage is regulated at 0.60V; a rise above 1.6V indicates an overvoltage condition and triggers immediate fault signaling to connected phase ICs and PGOOD deassertion.
Can IR3521MTRPBF operate without external phase ICs?
No. IR3521MTRPBF is a controller-only device and requires external xPHASE3™ phase ICs (e.g., IR3595) to drive high-current buck stages. It provides reference voltages, timing, and fault coordination-but contains no power switches, gate drivers, or current-sense amplifiers for direct power stage control.
How does IR3521MTRPBF handle remote sense line disconnection?
IR3521MTRPBF detects open remote sense lines by monitoring bias current and differential voltage at VOSENx+/VOSENx− pins. If either sense line floats beyond specified thresholds (e.g., VOSEN1− < –0.5V or VOSEN1+ > 8V), the device asserts PGOOD low and halts regulation to prevent uncontrolled output voltage drift.
Is the VCCL regulator output adjustable?
Yes. VCCL output voltage is programmable via an external resistor divider connected between VCCL and VCCLFB pins. The internal error amplifier regulates VCCL to maintain 0.6V at VCCLFB; typical VCCL range is 4.75V–7.5V, powering internal clocks, logic, and external gate driver bias circuits.
IR3521MTRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Series:
- XPhase3™
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Multiphase Controller
- Current - Supply:
- 10mA
- Voltage - Supply:
- 4.75V ~ 7.5V
- Operating Temperature:
- 0°C ~ 100°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-MLPQ (5x5)
IR3521MTRPBF FAQ
1.How can I place an order for IR3521MTRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for IR3521MTRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for IR3521MTRPBF reliable?
The price and inventory of IR3521MTRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for IR3521MTRPBF is usually 5 days.
3.What payment methods are accepted for IR3521MTRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for IR3521MTRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for IR3521MTRPBF?
IR3521MTRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your IR3521MTRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for IR3521MTRPBF?
For technical support, including IR3521MTRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your IR3521MTRPBF requirements.
6.How does Aetrix verify that IR3521MTRPBF is sourced from the original manufacturer or authorized distributors?
All IR3521MTRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that IR3521MTRPBF meets industry standards.
7.What is the process for return or replacement of IR3521MTRPBF?
All IR3521MTRPBF units undergo pre-shipment inspection (PSI). If there is an issue with IR3521MTRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The IR3521MTRPBF part is unused and in its original packaging.
Return procedure for IR3521MTRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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