Infineon Technologies IRS26072DSTRPBF

Overview

IRS26072DSTRPBF from Infineon Technologies is a high-voltage, half-bridge gate driver IC with integrated bootstrap diode, 600 V high-side voltage rating, 200 ns typical propagation delay, and ±2 A peak output current. It drives N-channel MOSFETs or IGBTs in motor control inverters and DC-DC resonant converters.

For engineers reviewing the IRS26072DSTRPBF datasheet, IRS26072DSTRPBF pinout, IRS26072DSTRPBF application, or IRS26072DSTRPBF equivalent, key selection criteria include high-side floating capability, matched propagation delays between high- and low-side channels, under-voltage lockout thresholds, and thermal shutdown behavior in bridge-leg configurations.

Technical Context

This dual-channel driver implements independent high-side and low-side gate drive outputs with level-shifted high-side logic referenced to VS (floating source). It features non-overlapping logic to prevent shoot-through, internal dead-time generation via input filtering, and separate IN and SD inputs for PWM control and fault shutdown.

The device operates from a single 12–20 V VDD supply, supports bootstrap-fed high-side operation up to 600 V, and includes UVLO on both VDD and VB pins with hysteresis. Propagation delay matching between channels is ≤25 ns, critical for symmetrical switching in three-phase inverters.

Key Specifications

Pinout & Package

IRS26072DSTRPBF is housed in an 8-pin SOIC package with standard 1.27 mm pitch and exposed thermal pad (SOIC-8EP). The package supports surface-mount reflow and provides enhanced thermal dissipation over standard SOIC.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar half-bridge gate driver applications.

Compared with IR2104SPBF and UCC27211D, IRS26072DSTRPBF uniquely combines 600 V capability, integrated bootstrap diode, and sub-25 ns channel matching-enabling compact, high-efficiency half-bridge designs without external level-shifting components or timing compensation.

Availability

IRS26072DSTRPBF is available at Aetrix Electronics and suitable for brushless DC motor drives, industrial inverters, and resonant DC-DC converters requiring stable component supply and long-term production continuity.

Supply support for IRS26072DSTRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor manufacturer specializing in power semiconductors, microcontrollers, and sensor solutions for automotive, industrial, and renewable energy markets.

The IRS26072 belongs to Infineon's high-voltage gate driver product line, engineered specifically for reliable, high-efficiency motor control and power conversion in cost-sensitive industrial and appliance applications.

FAQ

What is the maximum recommended bootstrap capacitor value for IRS26072DSTRPBF?

The recommended bootstrap capacitor is 0.1 µF X7R ceramic in parallel with a 1 µF aluminum electrolytic capacitor. This combination ensures stable high-side voltage during extended high-side conduction periods and suppresses ringing caused by PCB trace inductance. Larger values increase start-up time and may cause overvoltage during rapid duty-cycle changes.

Does IRS26072DSTRPBF require external pull-down resistors on HO and LO outputs?

No external pull-down resistors are required. IRS26072DSTRPBF integrates active pulldown circuitry on both HO and LO outputs during shutdown and UVLO conditions, ensuring MOSFETs remain off during fault or power-up sequences. This eliminates risk of unintended turn-on due to floating gate nodes.

Can IRS26072DSTRPBF drive SiC MOSFETs directly?

IRS26072DSTRPBF can drive low-to-mid power SiC MOSFETs (≤30 A, Qg < 25 nC) with appropriate gate resistor selection, but its ±2 A peak current and 200 ns propagation delay are optimized for silicon devices. For high-speed SiC switching (>100 kHz), gate drive strength and propagation delay consistency may require evaluation against specific SiC FET gate charge and Miller plateau characteristics.

How does the SD pin interact with internal UVLO conditions?

The SD pin is independent of internal UVLO circuits: it forces immediate, simultaneous disable of HO and LO regardless of VDD or VB status. Internal UVLO only disables outputs when supply voltages fall below thresholds; SD provides external fault override. Both mechanisms assert the same internal disable signal, but SD has priority and responds within 100 ns of assertion.