STMicroelectronics LD29300D2M18R
- Part No.:
- LD29300D2M18R
- Manufacturer:
- STMicroelectronics
- Package:
- TO-263-4, D2PAK (3 Leads + Tab), TO-263AA
- Datasheet:
-
LD29300D2M18R.pdf
- Description:
- IC REG LINEAR 1.8V 3A D2PAK/A
- Quantity:
- Payment:

- Shipping:

Inventory:301
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LD29300D2M18R from STMicroelectronics is a 1.8 V, 3 A fixed-output low-dropout linear regulator in D2PAK package with ±1% output voltage tolerance at 25 °C, 0.4 V typical dropout at 3 A, and logic-controlled electronic shutdown. It delivers high-accuracy post-regulation for CPU core supplies in embedded computing systems requiring stable low-voltage bias under dynamic load.
For engineers reviewing the LD29300D2M18R datasheet, LD29300D2M18R pinout, LD29300D2M18R application, or LD29300D2M18R equivalent, key selection criteria include guaranteed 3 A output current, thermal/current protection, 60 µVRMS output noise (10 Hz–100 kHz), and compatibility with 10 µF ceramic output capacitors.
Technical Context
This LDO employs internal PNP pass transistor architecture with integrated thermal foldback and current limiting, enabling safe operation up to 125 °C junction temperature. Its reference voltage is trimmed during production to achieve ±1% initial accuracy, and line/load regulation remain within 0.5% across full operating conditions.
The device includes an inhibit (INH) input for logic-level ON/OFF control-low state disables output and reduces quiescent current to 130–180 µA, while high state enables regulation with 20–50 mA typical Iq at 1.5 A load. Dropout voltage is defined as the VI–VO differential at which VO drops to 99% of nominal.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output voltage | 1.8 V ±1% at 25 °C; maintains regulation across –40 to +125 °C junction range |
| Max output current | 3 A continuous; internally limited with thermal foldback above 125 °C |
| Dropout voltage | 0.4 V typ. at 3 A; enables operation with only 2.2 V input for 1.8 V output |
| Quiescent current | 20–50 mA at 1.5 A load; drops to 130–180 µA in shutdown mode |
| Supply rejection | 62–72 dB at 120 Hz; suppresses ripple from upstream switching converters |
| Noise voltage | 60 µVRMS (10 Hz–100 kHz); suitable for noise-sensitive analog/RF subsystems |
| Logic control | Inhibit pin accepts 0.8 V low / 2 V high TTL-compatible thresholds for precise power sequencing |
Pinout & Package
D2PAK (TO-263) thermally enhanced surface-mount package with exposed metal tab for PCB heatsinking; JEDEC MS-013AC compliant, ECOPACK® lead-free finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IN) | Input voltage supply | Accepts 2.5 V to 30 V DC; clamped to 14 V for automatic shutdown above threshold |
| 2 (GND) | Ground reference | Common return for output, control, and internal circuitry; must be low-impedance |
| 3 (OUT) | Regulated output | Delivers 1.8 V ±1% at up to 3 A; requires ≥10 µF ceramic capacitor for stability |
| 4 (INH) | Inhibit control input | Active-low enable: <0.8 V disables output; >2 V enables regulation |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low dropout | 0.4 V typ. at full 3 A load enables use in battery-powered systems down to 2.2 V input |
| High output accuracy | ±1% initial tolerance ensures reliable core voltage compliance for 1.8 V logic families |
| Integrated protection | Thermal shutdown and current limiting prevent damage during overload or ambient rise |
| Low-noise regulation | 60 µVRMS broadband noise supports clean power for ADCs, PLLs, and RF front-ends |
| Logic-compatible enable | TTL/CMOS-compatible INH pin simplifies integration into power sequencing controllers |
Applications
| Processor Core Supply | Industrial PLC I/O Module |
|---|---|
Use Scenario: Providing stable 1.8 V bias to ARM Cortex-A/M series CPU cores in embedded gateways. IC Role / Device Role / Timing Role: Primary post-regulator converting 3.3 V intermediate rail to precision 1.8 V core voltage with fast transient response. Use Value: 0.4 V dropout allows sustained operation during brown-out events; 60 µVRMS noise prevents digital timing jitter. | Use Scenario: Powering isolated 1.8 V digital logic in programmable logic controller backplane modules. IC Role / Device Role / Timing Role: Local point-of-load regulator delivering clean, sequenced 1.8 V to FPGA configuration banks and interface transceivers. Use Value: INH pin enables synchronized power-up/down with system watchdog; ±1% tolerance guarantees logic-level compatibility. |
| Battery-Powered Test Equipment | Medical Sensor Signal Chain |
Use Scenario: Supplying 1.8 V to microcontroller and precision DAC in handheld calibration tools. IC Role / Device Role / Timing Role: Low-quiescent LDO maintaining runtime from single-cell Li-ion (2.8–4.2 V) while supporting 3 A peak loads. Use Value: 130–180 µA shutdown current extends battery life; 0.4 V dropout maximizes usable cell voltage range. | Use Scenario: Biasing low-noise amplifiers and sigma-delta ADCs in portable ECG monitors. IC Role / Device Role / Timing Role: Ultra-low-noise 1.8 V source decoupled from noisy digital sections via separate ground plane. Use Value: 60 µVRMS noise floor preserves signal integrity; thermal protection prevents drift during extended clinical use. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TSM1083-1.8 | 0.35 V dropout at 3 A; 1.5% output tolerance; no inhibit pin | Lacks logic control; higher tolerance may require margining in tight-core-voltage designs | Preferred where minimal dropout is critical and sequencing is handled externally |
| TPS7A8300RGRT | 0.5 V dropout at 3 A; 0.75% tolerance; 5.5 µVRMS noise; adjustable output | Lower noise but requires external resistor divider; higher cost and board area | Selected when ultra-low noise dominates over fixed-voltage simplicity and cost |
Compared with TSM1083-1.8 and TPS7A8300RGRT, LD29300D2M18R offers balanced performance: tighter 1% tolerance than TSM1083-1.8, built-in shutdown control absent in that part, and lower cost than TPS7A8300RGRT while delivering adequate 60 µVRMS noise for most embedded applications.
Availability
LD29300D2M18R is available at Aetrix Electronics and suitable for industrial PLCs, battery-powered test equipment, medical sensor signal chains, and embedded processor core supplies requiring stable component supply with long-term lifecycle support.
Supply support for LD29300D2M18R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, MCU, power, and MEMS products for industrial, automotive, and consumer markets.
The LD29300 series belongs to ST's high-current LDO portfolio, engineered specifically for post-regulation in power-constrained systems where ultra-low dropout, precision output, and robust thermal behavior are mandatory.
FAQ
What is the minimum input voltage required for LD29300D2M18R to regulate 1.8 V at 3 A?
The minimum input voltage is 2.2 V - calculated as 1.8 V output plus 0.4 V typical dropout. Absolute minimum specified is 2.5 V per Table 4, ensuring reliable startup and regulation across temperature and process variation. Operation below 2.5 V is not guaranteed.
Can LD29300D2M18R be used without the INH pin connected?
Yes - the INH pin is internally pulled up; leaving it unconnected defaults the device to enabled operation. However, for deterministic power sequencing, ST recommends tying INH to VI through a 10 kΩ resistor or actively driving it to avoid floating states during reset or low-power modes.
What output capacitor value and type are required for stability?
A minimum 10 µF ceramic capacitor (X5R/X7R, 6.3 V rating) is required on the OUT pin, placed as close as possible to pins 2 (GND) and 3 (OUT). Larger values improve transient response but do not affect stability. Aluminum or tantalum capacitors are not recommended due to ESR sensitivity.
Does LD29300D2M18R support parallel operation for higher current?
No - the device lacks current-sharing capability or master/slave control. Parallel connection risks thermal imbalance and potential failure due to mismatched dropout voltages. For >3 A requirements, select a higher-current LDO or switch to a DC-DC solution with appropriate current-sharing topology.
LD29300D2M18R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- TO-263-4, D2PAK (3 Leads + Tab), TO-263AA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 14V
- Voltage - Output (Min/Fixed):
- 1.8V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.7V @ 3A
- Current - Output:
- 3A
- Current - Quiescent (Iq):
- 50 mA
- Current - Supply (Max):
- 100 mA
- PSRR:
- 72dB (120Hz)
- Control Features:
- -
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- D2PAK-3
LD29300D2M18R FAQ
1.How can I place an order for LD29300D2M18R through Aetrix?
Please submit a Request for Quotation (RFQ) for LD29300D2M18R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LD29300D2M18R reliable?
The price and inventory of LD29300D2M18R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LD29300D2M18R is usually 5 days.
3.What payment methods are accepted for LD29300D2M18R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LD29300D2M18R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LD29300D2M18R?
LD29300D2M18R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LD29300D2M18R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LD29300D2M18R?
For technical support, including LD29300D2M18R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LD29300D2M18R requirements.
6.How does Aetrix verify that LD29300D2M18R is sourced from the original manufacturer or authorized distributors?
All LD29300D2M18R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LD29300D2M18R meets industry standards.
7.What is the process for return or replacement of LD29300D2M18R?
All LD29300D2M18R units undergo pre-shipment inspection (PSI). If there is an issue with LD29300D2M18R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LD29300D2M18R part is unused and in its original packaging.
Return procedure for LD29300D2M18R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LD29300D2M18R Tags

-
MIC5504-1.8YM5-TR
Microchip Technology

-
MIC5504-3.3YM5-TR
Microchip Technology

-
MIC5365-3.0YC5-TR
Microchip Technology

-
MIC5365-1.8YC5-TR
Microchip Technology

-
MIC5365-2.5YC5-TR
Microchip Technology

-
MIC5365-3.3YC5-TR
Microchip Technology

-
MIC5365-3.3YD5-TR
Microchip Technology

-
MIC5317-3.3YM5-TR
Microchip Technology

-
TLV1117LV33DCYR
Texas Instruments

-
MIC5317-3.3YMT-TZ
Microchip Technology

-
MIC5528-3.3YMT-TR
Microchip Technology

-
TLV75801PDRVR
Texas Instruments
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

