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Home > Products > Integrated Circuits (ICs) > Memory > Memory

STMicroelectronics M95320-DRDW8TP/K

Name: M95320-DRDW8TP/K
Brand: STMicroelectronics
SKU: M95320-DRDW8TP/K
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: M95320-DRDW8TP/K

Manufacturer:: STMicroelectronics

Category:: Memory

Package:: 8-TSSOP (0.173", 4.40mm Width)

Datasheet:: M95320-DRDW8TP/K.pdf

Description:: IC EEPROM 32KBIT SPI 8TSSOP

Quantity:: RFQ Add To RFQ list

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Product details

Overview

M95320-DRDW8TP/K from STMicroelectronics is a 32-Kbit (4 Kbytes) serial SPI EEPROM with 32-byte page architecture, 20 MHz max clock (at V_CC ≥ 4.5 V), and extended industrial temperature operation up to 105 °C. It features block-level write protection (1/4, 1/2, or full memory), a dedicated lockable 32-byte Identification Page for device ID and user parameters, and embedded ECC logic for enhanced data integrity in automotive and industrial control modules.

For engineers reviewing the M95320-DRDW8TP/K datasheet, M95320-DRDW8TP/K pinout, M95320-DRDW8TP/K application, or M95320-DRDW8TP/K equivalent, this device supports high-reliability nonvolatile storage in constrained-space designs requiring AEC-Q100 Grade 2 compliance, fast byte/page writes (≤4 ms), and robust noise immunity via Schmitt-trigger inputs.

Technical Context

The M95320-DRDW8TP/K implements a true EEPROM array organized as 128 pages × 32 bytes (4096 × 8 bits), with dual-mode SPI compatibility (CPOL=0/CPHA=0 and CPOL=1/CPHA=1). Its protocol engine enforces strict command framing - requiring falling-edge chip select activation, byte-aligned instruction boundaries, and WREN/WEL latching before any write execution.

Write protection is enforced through non-volatile BP1/BP0 bits in the Status Register and hardware-level SRWD/W pin interaction, enabling configurable lock states for memory blocks and the Identification Page. The device enters Hold mode when HOLD is low and C is low, suspending communication without resetting internal state or clock phase alignment.

Key Specifications

Parameter	Value and Actual Design Meaning
Memory size	32 Kbit (4 Kbytes) EEPROM array, organized as 128 pages of 32 bytes - enables efficient firmware parameter storage with minimal bus overhead.
Max SPI clock	20 MHz at V_CC ≥ 4.5 V - supports high-throughput configuration updates in real-time control systems.
Write cycle time	≤4 ms for byte or page write - reduces system latency during critical calibration or fault-log updates.
Endurance	4 million cycles at 25 °C; 900 k cycles at 105 °C - ensures long-term reliability in under-hood automotive ECUs.
Data retention	>50 years at 105 °C - guarantees persistent storage integrity across full product lifecycle in harsh thermal environments.
Operating temp	−40 °C to +105 °C - qualified per AEC-Q100 Grade 2 for engine control, battery management, and ADAS sensor nodes.
Voltage range	1.7 V to 5.5 V - allows direct interfacing with 1.8 V, 3.3 V, and 5 V microcontrollers without level-shifting.
ESD rating	4000 V HBM - provides robustness against handling and board-level electrostatic discharge in manufacturing and field service.

Pinout & Package

Package: TSSOP8 (DW), 169 mil width, RoHS-compliant and halogen-free (ECOPACK2®).

Pin/Terminal	Circuit Role	Design Meaning
S	Chip Select	Active-low enable signal; edge- and level-sensitive - prevents spurious commands during power-up or bus contention.
C	Serial Clock	Synchronizes all data transfers; rising edge latches input (D), falling edge outputs data (Q) - supports standard SPI timing modes.
D	Serial Data Input	Accepts instructions, addresses, and write data; MSB-first - enables compact command sequences with minimal overhead.
Q	Serial Data Output	Drives read data during READ/RDSR/RDID; high-impedance otherwise - eliminates need for external tri-state logic on shared buses.
W	Write Protect	Hardware-controlled lock for Status Register; interacts with SRWD bit to freeze BP1/BP0 settings - adds physical layer security for production firmware.
HOLD	Hold Control	Pauses ongoing SPI transaction without deselecting device or losing clock phase - preserves bus arbitration in multi-master systems.
V_SS	Ground Reference	Common return for all signals and V_CC; must be low-impedance - critical for noise immunity in electrically noisy automotive harnesses.
V_CC	Supply Voltage	1.7–5.5 V operating range; powers internal charge pump for EEPROM programming - enables single-supply operation across diverse host platforms.

Key Features

Feature	Design Value
Embedded ECC logic	Corrects single-bit errors and detects double-bit errors in memory reads - improves functional safety compliance without external error-handling firmware.
Lockable Identification Page	32-byte dedicated area storing ST device ID and user-configurable parameters; permanently lockable via LID command - secures calibration data and cryptographic keys.
Schmitt-trigger inputs	On S, C, D, HOLD, and W pins - rejects noise spikes up to 30% V_CC, eliminating false triggering in high-EMI engine compartments.
Flexible write protection	Configurable via BP1/BP0 bits: no protection, upper quarter (0xC00–0xFFF), upper half (0x800–0xFFF), or full memory + ID page - supports layered security for boot code and runtime variables.
Low-power standby mode	ICC1 ≤ 1 µA at V_CC = 5.5 V, T_A = 25 °C - extends battery life in always-on telematics and sensor nodes.
Extended voltage range	Operates down to 1.7 V - maintains EEPROM functionality during brown-out conditions in 1.8 V microcontroller domains.

Applications

Automotive Engine Control Unit

Industrial PLC Configuration Storage

Use Scenario: Storing adaptive fuel trim tables and diagnostic trouble codes (DTCs) in gasoline/diesel ECUs.

IC Role / Device Role / Timing Role: Nonvolatile parameter storage with AEC-Q100 Grade 2 qualification and 105 °C operation.

Use Value: Ensures consistent engine performance across thermal cycles and supports regulatory OBD-II logging requirements without external backup power.

Use Scenario: Retaining I/O mapping, PID tuning constants, and firmware update metadata in programmable logic controllers.

IC Role / Device Role / Timing Role: SPI-accessible configuration memory with page-write efficiency and ECC-protected reads.

Use Value: Eliminates configuration loss during unexpected AC power loss and enables deterministic field-upgrade rollback.

Medical Infusion Pump Calibration

Smart Meter Firmware Parameterization

Use Scenario: Holding calibrated flow-rate coefficients and safety-critical alarm thresholds in Class II medical devices.

IC Role / Device Role / Timing Role: High-integrity data storage with >50-year retention at 105 °C and 4 million write cycles.

Use Value: Meets IEC 62304 software lifecycle requirements and avoids recalibration during device shelf life.

Use Scenario: Storing tariff schedules, metering calibration offsets, and secure key material in ANSI C12.22-compliant electricity meters.

IC Role / Device Role / Timing Role: Secure, tamper-resistant memory with hardware write-lock (W pin + SRWD) and identification page locking.

Use Value: Prevents unauthorized parameter modification and enables cryptographic binding of firmware to hardware identity.

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial SPI EEPROM applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
AT25DF041A-SSH-T	4 Mbit density, no built-in ECC, max 85 °C operation, no Identification Page	Lacks AEC-Q100 qualification and high-temp endurance - suitable only for commercial-grade consumer electronics	Select only if higher density is required and 105 °C operation is unnecessary.
BR24G32FJ-3GE2	I²C interface (not SPI), 32 Kbit, 105 °C, no hold pin or identification page	Requires different MCU peripheral configuration and lacks hardware suspend capability for multi-master arbitration	Choose only when I²C bus topology is mandated and SPI is unavailable.

Compared with AT25DF041A-SSH-T and BR24G32FJ-3GE2, the M95320-DRDW8TP/K uniquely delivers AEC-Q100 Grade 2 compliance, integrated ECC, and a lockable Identification Page - making it the only option for safety-critical automotive and industrial firmware storage where data integrity and hardware-enforced security are mandatory.

Availability

M95320-DRDW8TP/K is available at Aetrix Electronics and suitable for automotive engine control units, industrial PLCs, medical infusion pumps, and smart electricity meters requiring stable component supply across extended temperature and voltage ranges.

Supply support for M95320-DRDW8TP/K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader specializing in automotive, industrial, and power management solutions, with over 45 years of analog and mixed-signal design expertise.

The M95320-DRDW8TP/K belongs to ST's automotive-qualified serial EEPROM product line, engineered specifically for mission-critical nonvolatile storage in high-temperature, high-reliability embedded systems.

FAQ

What is the function of the HOLD pin on the M95320-DRDW8TP/K?

The HOLD pin pauses active SPI communication without deselecting the device or resetting the clock phase. When driven low while the Serial Clock (C) is low, it places Q in high-impedance and ignores D and C transitions. This allows multi-master bus arbitration or temporary MCU suspension without losing transaction context or requiring reinitialization.

How does the Identification Page differ from main memory?

The Identification Page is a dedicated 32-byte area separate from the 4 Kbyte main array. It contains factory-programmed ST device ID bytes (first 3 bytes) and 29 bytes available for user data. Unlike main memory, it can be permanently locked in read-only mode using the LID command, preventing overwrite even after WREN activation or SRWD manipulation.

Can the M95320-DRDW8TP/K operate reliably at 1.7 V?

Yes - the device is fully specified for 1.7 V to 5.5 V operation. At 1.7 V, maximum SPI clock is 5 MHz, write cycle time remains ≤4 ms, and all electrical characteristics including Schmitt-trigger thresholds and WIP flag response meet datasheet limits. This enables direct integration with 1.8 V logic families without level shifters.

What happens when the W pin is held low and SRWD = 1?

When SRWD = 1 and W is low, the Status Register becomes write-protected: WRSR commands are discarded, and BP1/BP0 bits cannot be modified. This freezes the write-protection configuration. The only way to restore write access is to drive W high - no power cycle or reset restores writability while W remains low.

M95320-DRDW8TP/K Specifications

Product attributes: Attribute value

Manufacturer:: STMicroelectronics

Series:: -

Package/Case:: 8-TSSOP (0.173", 4.40mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Memory Type:: Non-Volatile

Memory Format:: EEPROM

Technology:: EEPROM

Memory Size:: 32Kbit

Memory Organization:: 4K x 8

Memory Interface:: SPI

Clock Frequency:: 20 MHz

Write Cycle Time - Word, Page:: 4ms

Access Time:: -

Voltage - Supply:: 1.8V ~ 5.5V

Operating Temperature:: -40°C ~ 105°C (TA)

Grade:: Automotive

Qualification:: AEC-Q100

Mounting Type:: Surface Mount

Supplier Device Package:: 8-TSSOP

M95320-DRDW8TP/K FAQ

1.How can I place an order for M95320-DRDW8TP/K through Aetrix?

Please submit a Request for Quotation (RFQ) for M95320-DRDW8TP/K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for M95320-DRDW8TP/K reliable?

The price and inventory of M95320-DRDW8TP/K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for M95320-DRDW8TP/K is usually 5 days.

3.What payment methods are accepted for M95320-DRDW8TP/K?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for M95320-DRDW8TP/K transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for M95320-DRDW8TP/K?

M95320-DRDW8TP/K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your M95320-DRDW8TP/K order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for M95320-DRDW8TP/K?

For technical support, including M95320-DRDW8TP/K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your M95320-DRDW8TP/K requirements.

6.How does Aetrix verify that M95320-DRDW8TP/K is sourced from the original manufacturer or authorized distributors?

All M95320-DRDW8TP/K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that M95320-DRDW8TP/K meets industry standards.

7.What is the process for return or replacement of M95320-DRDW8TP/K?

All M95320-DRDW8TP/K units undergo pre-shipment inspection (PSI). If there is an issue with M95320-DRDW8TP/K, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The M95320-DRDW8TP/K part is unused and in its original packaging.

Return procedure for M95320-DRDW8TP/K:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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