Vishay Siliconix SI3865CDV-T1-E3
- Part No.:
- SI3865CDV-T1-E3
- Manufacturer:
- Vishay Siliconix
- Package:
- SOT-23-6 Thin, TSOT-23-6
- Datasheet:
-
SI3865CDV-T1-E3.pdf
- Description:
- IC PWR SWITCH P-CHAN 1:1 6TSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI3865CDV-T1-E3 from Vishay Siliconix is a dual-MOSFET load switch with integrated level-shift functionality, combining a P-Channel TrenchFET (RDS(on) = 60 mΩ at VIN = 4.5 V) and an N-Channel MOSFET in a single TSOP-6 package. It operates from 1.8 V to 12 V input, accepts 1.5 V to 8 V logic-level ON/OFF control, and delivers up to 2.8 A continuous load current - ideal for high-side power management in space-constrained portable devices.
For engineers reviewing the SI3865CDV-T1-E3 datasheet, SI3865CDV-T1-E3 pinout, SI3865CDV-T1-E3 application, or SI3865CDV-T1-E3 equivalent, key selection considerations include its adjustable slew-rate via external R2/C1, 3000 V HBM ESD protection on the ON/OFF terminal, and dual-channel architecture enabling compact, low-component-count load switching without external level-shifting circuitry.
Technical Context
The SI3865CDV-T1-E3 integrates two complementary MOSFETs: a low-RDS(on) P-Channel device (Q1) configured as the main high-side load switch, and an N-Channel device (Q2) with internal ESD protection, used as a level-shifter to drive Q1's gate. Its operation requires only one external pull-up resistor (R1) and optional slew-rate components (R2/C1), eliminating discrete level-shifters.
Switching behavior is externally programmable: turn-on/turn-off delays (td(on), td(off)) and rise/fall times (tr, tf) scale predictably with R2 value (0–100 kΩ) and input voltage (1.8–4.5 V), enabling precise inrush current control across varying load capacitances (e.g., 1 µF to 10 µF).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 1.8 V to 12 V - supports wide-input battery-powered systems including single-cell Li-ion (2.7–4.2 V) and multi-cell configurations. |
| RDS(on) (P-Ch) | 60 mΩ @ VIN = 4.5 V, ID = 1 A - limits conduction loss to ≤60 mV drop at 1 A, critical for efficiency in portable power rails. |
| IL Continuous | 2.8 A - enables direct switching of moderate-power subsystems (e.g., USB peripherals, display backlights, sensors). |
| VON/OFF Logic | 1.5 V to 8 V - compatible with 1.8 V, 2.5 V, 3.3 V, and 5 V microcontroller GPIOs without level translation. |
| ESD Rating | 3000 V HBM on ON/OFF pin - provides robust handling during board assembly and end-user interface exposure. |
| Slew Control | Externally adjustable via R2 (0–100 kΩ) and C1 (1000 pF) - allows tuning of dV/dt to prevent supply rail collapse or EMI during hot-plug events. |
Pinout & Package
TSOP-6 package (JEDEC MO-193C), 3.05 mm × 2.85 mm × 1.0 mm profile, surface-mount, lead (Pb)-free, halogen-free compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - S2 | P-Channel Source | Connects to system ground; forms return path for load current and intrinsic body diode conduction. |
| 2,3 - D2 / S1 | N-Channel Drain / P-Channel Source | Internal connection point between Q2 drain and Q1 source; not externally accessible - defines shared node in level-shift topology. |
| 4 - D1 | P-Channel Drain | Input voltage (VIN) connection; supplies power to load when Q1 is on. |
| 5 - G1 | P-Channel Gate | Driven by Q2's source output; voltage level-shifted from ON/OFF signal to enable high-side switching. |
| 6 - ON/OFF | N-Channel Gate Input | Logic-controlled enable terminal; 1.5 V–8 V compatible, with 3 kV HBM ESD protection. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Level-Shift Architecture | Eliminates need for external NPN/PNP or dedicated level-shifter IC, reducing BOM count and PCB area by ≥2 components. |
| TrenchFET® P-Channel Technology | Delivers 60 mΩ RDS(on) at 4.5 V while maintaining stable performance down to 1.8 V input - ensures consistent efficiency across battery discharge. |
| Adjustable Slew-Rate Control | Enables precise tuning of turn-on/turn-off timing using only R2 (0–100 kΩ) and optional C1 (1000 pF), supporting diverse capacitive loads. |
| High ESD Robustness | 3000 V HBM rating on ON/OFF pin meets IEC 61000-4-2 Level 3 requirements for handheld device interfaces. |
Applications
| Smartphone Power Rail Switching | Wearable Sensor Subsystem Enable |
|---|---|
Use Scenario: Enabling/disabling camera module or RF front-end during sleep mode to reduce standby current. IC Role / Device Role / Timing Role: High-side load switch controlling VCC to peripheral ICs; slew rate tuned to limit inrush into 10 µF decoupling caps. Use Value: Achieves <1 µA shutdown leakage and <100 µs controlled ramp, preventing brown-out of baseband processor during wake-up. | Use Scenario: Power-gating environmental sensors (e.g., accelerometer, barometer) in fitness trackers between measurement cycles. IC Role / Device Role / Timing Role: Low-voltage load switch (1.8 V input) driven directly by 1.8 V MCU GPIO, with no external level shifter required. Use Value: Reduces solution size by 2.5 mm² vs. discrete MOSFET + transistor level-shifter; maintains 1.9 A capability at 1.8 V input. |
| USB-C Port Power Delivery Sequencing | Industrial Handheld Display Backlight Control |
Use Scenario: Managing VBUS enable sequencing for USB-C sink ports with strict inrush limits per USB PD spec. IC Role / Device Role / Timing Role: Programmable slew-rate load switch ensuring dV/dt ≤ 1 V/ms into 100 µF port capacitance. Use Value: Meets USB PD 3.1 inrush current requirement (<100 mA over first 1 ms) using R2 = 47 kΩ, without custom ASIC. | Use Scenario: Controlling 5 V backlight LED string in ruggedized medical handhelds requiring hot-swap immunity. IC Role / Device Role / Timing Role: High-side switch with 12 V max VIN tolerance and 2.8 A continuous rating, driven by isolated 3.3 V controller. Use Value: Withstands 12 V transients and delivers full brightness at 2.2 A, while RDS(on) drift remains <15% from –40 °C to 85 °C. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar load-switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS22965DSGR | Single-channel, 5.5 V max VIN, fixed 1.5 ms slew, no level-shift - requires external logic for >3.3 V systems. | Limited to low-voltage domains; lacks dual-MOSFET architecture for self-contained level shifting. | Choose when only 1.2–5.5 V operation is needed and board space permits separate level-shifter. |
| AP22652WU-7 | Single-channel, 5.5 V max VIN, 45 mΩ RDS(on), integrated slew control - no N-ch driver for P-ch gate. | No internal level-shift; requires 3.3 V or 5 V logic drive, incompatible with 1.8 V MCUs without buffer. | Select for higher efficiency at 5 V but accept added complexity for sub-3 V control signals. |
Compared with TPS22965DSGR and AP22652WU-7, the SI3865CDV-T1-E3 uniquely combines wide-input voltage (1.8–12 V), true 1.5 V logic compatibility, and integrated level-shift in TSOP-6 - enabling single-component, zero-external-transistor load switching where voltage domain bridging is essential.
Availability
SI3865CDV-T1-E3 is available at Aetrix Electronics and suitable for smartphone power rail switching, wearable sensor subsystem enable, and industrial handheld display backlight control requiring stable component supply, long-term lifecycle support, and Pb-free/halogen-free compliance.
Supply support for SI3865CDV-T1-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in MOSFETs, diodes, optoelectronics, and passive components with emphasis on power efficiency, reliability, and miniaturization.
The Si3865CDV product line targets space-constrained portable electronics requiring integrated, low-component-count load switching - specifically engineered to replace discrete P-MOS + N-MOS + resistor solutions with a single TSOP-6 device.
FAQ
What is the maximum continuous load current supported by SI3865CDV-T1-E3?
The SI3865CDV-T1-E3 supports 2.8 A continuous load current at TA = 25 °C with proper PCB copper area (≥1 in², 2 oz Cu). Derating applies above 25 °C ambient: at 85 °C, max continuous current drops to ~1.9 A due to thermal resistance (RthJA = 130 °C/W). The SI3865CDV-T1-E3 must be used with adequate heatsinking in high-power or high-ambient applications.
Can SI3865CDV-T1-E3 operate with a 1.8 V microcontroller GPIO driving the ON/OFF pin?
Yes, the SI3865CDV-T1-E3 accepts logic-level inputs from 1.5 V to 8 V, making it fully compatible with 1.8 V GPIOs without level-shifting circuitry. At VON/OFF = 1.8 V, the N-Channel MOSFET turns on sufficiently to drive the P-Channel gate, enabling full 2.8 A load current at VIN = 1.8 V. This capability is verified in the datasheet's "ON Characteristics" table under VON/OFF = 1.5 V test conditions.
How is slew rate adjusted on SI3865CDV-T1-E3, and what components are required?
Slew rate on the SI3865CDV-T1-E3 is adjusted using external resistor R2 (0–100 kΩ) between pins 2/3 and 6, and optionally capacitor C1 (1000 pF) from pin 6 to ground. R2 sets turn-on/turn-off timing: e.g., R2 = 22 kΩ yields ~15 µs tr at VIN = 2.5 V. No additional active components are needed - the SI3865CDV-T1-E3's internal N-MOSFET and gate drive topology enable this fully passive control.
Does SI3865CDV-T1-E3 include reverse-current blocking capability?
Yes, the SI3865CDV-T1-E3 provides reverse-current blocking via its integrated P-Channel MOSFET's body diode orientation. When the load voltage exceeds VIN (e.g., during hot-swap or backup battery scenarios), the P-Channel remains off and blocks reverse conduction. Reverse leakage is limited to 1 µA at VIN = 12 V and VON/OFF = 0 V, as specified in the "OFF Characteristics" section of the SI3865CDV-T1-E3 datasheet.
What is the package type and footprint compatibility of SI3865CDV-T1-E3?
The SI3865CDV-T1-E3 uses the standard 6-lead TSOP package (JEDEC MO-193C), measuring 3.05 mm × 2.85 mm × 1.0 mm. Its pinout matches industry-standard TSOP-6 layouts, and Vishay provides recommended land patterns (Document 72610) for solder mask-defined pads. The SI3865CDV-T1-E3 is pin-compatible with other TSOP-6 dual-MOSFET load switches sharing identical pin 1–6 assignments (e.g., source-drain-gate-source-gate-drain topology).
SI3865CDV-T1-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Package/Case:
- SOT-23-6 Thin, TSOT-23-6
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Switch Type:
- General Purpose
- Number of Outputs:
- 1
- Ratio - Input:Output:
- 1:1
- Output Configuration:
- High Side
- Output Type:
- P-Channel
- Interface:
- On/Off
- Voltage - Load:
- 1.8V ~ 12V
- Voltage - Supply (Vcc/Vdd):
- -
- Current - Output (Max):
- 2.8A
- Rds On (Typ):
- 50mOhm
- Input Type:
- -
- Features:
- Slew Rate Controlled
- Fault Protection:
- -
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSOP
SI3865CDV-T1-E3 FAQ
1.How can I place an order for SI3865CDV-T1-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI3865CDV-T1-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI3865CDV-T1-E3 reliable?
The price and inventory of SI3865CDV-T1-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI3865CDV-T1-E3 is usually 5 days.
3.What payment methods are accepted for SI3865CDV-T1-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI3865CDV-T1-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI3865CDV-T1-E3?
SI3865CDV-T1-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI3865CDV-T1-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI3865CDV-T1-E3?
For technical support, including SI3865CDV-T1-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI3865CDV-T1-E3 requirements.
6.How does Aetrix verify that SI3865CDV-T1-E3 is sourced from the original manufacturer or authorized distributors?
All SI3865CDV-T1-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI3865CDV-T1-E3 meets industry standards.
7.What is the process for return or replacement of SI3865CDV-T1-E3?
All SI3865CDV-T1-E3 units undergo pre-shipment inspection (PSI). If there is an issue with SI3865CDV-T1-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI3865CDV-T1-E3 part is unused and in its original packaging.
Return procedure for SI3865CDV-T1-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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