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Vishay Siliconix SIC403BCD-T1-GE3
- Part No.:
- SIC403BCD-T1-GE3
- Manufacturer:
- Vishay Siliconix
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 32-PowerWFQFN
- Datasheet:
-
SIC403BCD-T1-GE3.pdf
- Description:
- IC REG DL BUCK/LNR SYNC MLP55-32
- Quantity:
- Payment:
- Shipping:
Inventory:3,039
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Product details
Overview
SIC403BCD-T1-GE3 from Vishay Siliconix is a 6 A synchronous buck regulator with integrated power MOSFETs, bootstrap switch, and a programmable 200 mA LDO in a PowerPAK® MLP32-55G (5 mm × 5 mm) package. It operates from 3 V to 28 V input, delivers 0.6 V to VIN × 0.75 output, supports 200 kHz–1 MHz switching, and achieves up to 93 % peak efficiency - used in point-of-load regulation for notebook and server CPUs.
For engineers reviewing the SIC403BCD-T1-GE3 datasheet, SIC403BCD-T1-GE3 pinout, SIC403BCD-T1-GE3 application, or SIC403BCD-T1-GE3 equivalent, key selection considerations include its adaptive on-time control architecture, independent enable logic for switcher and LDO, programmable current limit via ILIM resistor, soft-start timing via external capacitor on SS pin, and PGOOD open-drain status signaling with ±10 % threshold accuracy.
Technical Context
The SIC403BCD-T1-GE3 implements pseudo-fixed-frequency adaptive on-time control using output ripple as the PWM ramp signal, eliminating need for error amplifier or compensation network. Its one-shot timer generates on-time proportional to VOUT/VIN, enabling fast transient response and stable operation with all-ceramic output capacitors.
It integrates dual enable paths: EN/PSV controls buck switching mode (forced continuous, power-save, or disable), while ENL independently enables/disables the internal LDO. The LDO supports bypass logic and switchover between VDD and VOUT based on differential voltage thresholds of ±130 mV.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3 V to 28 V - supports wide-input industrial and computing rails including 5 V, 12 V, and 24 V systems. |
| Output Current | 6 A continuous - sufficient for CPU core, GPU, or FPGA I/O rail regulation without external current sharing. |
| Switching Frequency | 200 kHz to 1 MHz - programmable via external resistor on tON pin; enables optimization of size vs. EMI vs. light-load efficiency. |
| Peak Efficiency | 93 % - achieved at mid-load under typical 12 VIN/1.2 VOUT conditions, reducing thermal load in dense PCB layouts. |
| LDO Output | Programmable 200 mA - configurable via FBL resistor divider; can supply gate drive bias or be bypassed for external 5 V source. |
| Package | PowerPAK MLP32-55G (5 mm × 5 mm, 32-pin) - thermally enhanced QFN with exposed PGND pads for low RθJA (50 °C/W). |
| Protection Features | Cycle-by-cycle valley current limit, UVLO (programmable via ENL), over-voltage, under-voltage, and thermal shutdown at 150 °C - ensures robust operation in unregulated input environments. |
Pinout & Package
Package: PowerPAK® MLP32-55G - 5 mm × 5 mm, 32-pin, thermally optimized QFN with three large exposed PGND pads (Pads 1, 2, 3) and integrated LX node routing for low-inductance power loop.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FB (Pin 1) | Feedback input | Connects to resistor divider from VOUT to AGND; regulates output by comparing to 600 mV internal reference - sets DC output voltage including ripple offset. |
| VOUT (Pin 2) | Voltage sense & LDO switchover input | Senses switcher output; feeds internal mux that selects between VDD and VOUT for LDO bias - must be ≤ VDD voltage. |
| VDD (Pin 3) | Bias supply input/output | Accepts external 3–5.5 V supply or outputs LDO-regulated voltage; powers internal circuitry and gate drivers. |
| AGND (Pins 4, 30, Pad 1) | Analog ground reference | Low-noise return for FB, FBL, SS, and reference circuits - must be separated from PGND except at single-point connection. |
| FBL (Pin 5) | LDO feedback input | Connects to resistor divider from VDD to AGND; programs LDO output voltage - enables precise 3.3 V or 5 V bias generation. |
| VIN (Pins 6, 9–11, Pad 2) | Main input supply | High-current input path for buck converter; connects directly to input capacitor and high-side MOSFET source - requires low-ESR bulk capacitance. |
| SS (Pin 7) | Soft-start timing | Internal 3 μA current source charges external capacitor; sets output voltage ramp time - prevents inrush current during startup. |
| BST (Pin 8) | Bootstrap supply | Connects 100 nF+ capacitor to LX; generates floating gate drive voltage for high-side MOSFET - critical for reliable high-side conduction. |
| NC (Pins 12, 14) | No connection | Unbonded pins - must remain unconnected and unpopulated on PCB. |
| LXBST (Pin 13) | LX boost node | Internal connection to BST capacitor - not user-accessible; enhances bootstrap charge retention during high-duty-cycle operation. |
| LX (Pins 23–25, Pad 3) | Switching node | Drives external inductor; carries high di/dt pulsed current - requires short, wide copper pour and tight layout to minimize EMI and ringing. |
| PGND (Pins 15–22) | Power ground | High-current return for MOSFETs and inductor - ties to exposed thermal pad; must be solid plane with multiple vias to inner ground layers. |
| PGOOD (Pin 26) | Open-drain status output | Asserts high-impedance when VOUT is within ±10 % of target; requires external pull-up - used for system power sequencing and fault monitoring. |
| ILIM (Pin 27) | Current limit programming | Connects resistor to LXS (Pin 28); sets valley current limit threshold - enables precise 4.8–7.2 A overcurrent protection scaling. |
| EN/PSV (Pin 29) | Switcher enable & power-save control | Tri-state logic: grounded = disable, floated = forced continuous, ≥44 % VDD = power-save mode - configures light-load behavior without external logic. |
| tON (Pin 31) | On-time programming | Resistor-to-AGND sets switching frequency; supports 200 kHz–1 MHz range - determines trade-off between size, efficiency, and EMI performance. |
| ENL (Pin 32) | LDO enable input | Logic-controlled or resistor-divider-programmed; disables LDO when pulled to AGND - allows independent bias sourcing for optimal system efficiency. |
Key Features
| Feature | Design Value |
|---|---|
| All-ceramic solution enabled | Eliminates need for electrolytic or tantalum output capacitors - reduces board area, improves reliability, and avoids aging-related capacitance drift. |
| Pseudo fixed-frequency adaptive on-time control | Delivers predictable switching frequency with <10 µs transient response - enables smaller output capacitance and eliminates compensation design effort. |
| Independent enable for switcher and LDO | Allows separate power sequencing: e.g., enable LDO first to bias control logic, then enable buck regulator - prevents brown-out during startup. |
| Programmable soft-start | External capacitor on SS pin sets monotonic VOUT ramp - prevents overshoot and inrush into downstream loads like ASICs or memory arrays. |
| Temperature-compensated current limit | Maintains consistent 6 A overcurrent threshold across -40 °C to +125 °C junction - avoids false trips in thermally stressed environments. |
| Power good output with ±10 % accuracy | Provides deterministic system-level power sequencing signal - compatible with FPGA, microprocessor, or PMIC reset inputs requiring precise voltage validation. |
Applications
| Server CPU Core Rail | Notebook SoC Power |
|---|---|
Use Scenario: Regulating 1.0–1.3 V core voltage for dual-socket Xeon processors with dynamic load steps up to 6 A. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering tightly regulated core power; PGOOD synchronizes processor reset release. Use Value: Adaptive on-time control ensures <15 µs transient recovery, minimizing voltage droop below ±30 mV during 4 A/µs load steps - maintains CPU stability under Turbo Boost. | Use Scenario: Supplying 1.2 V I/O and 3.3 V auxiliary rails in ultrabook platforms with strict thermal envelope limits. IC Role / Device Role / Timing Role: Dual-rail power solution: buck regulates main I/O, while internal LDO supplies clean 3.3 V for USB PHY and display interface. Use Value: Programmable power-save mode reduces no-load quiescent current to 0.7 mA - extends battery life by >12 minutes per charge cycle in standby. |
| Networking ASIC Bias | Industrial PLC I/O Module |
Use Scenario: Powering 1.8 V SerDes and 1.0 V logic rails in 10 GbE switch fabric ASICs operating at ambient up to 85 °C. IC Role / Device Role / Timing Role: High-efficiency point-of-load regulator with thermal shutdown at 150 °C - protects against fan failure or airflow blockage. Use Value: 93 % peak efficiency at 12 VIN/1.0 VOUT cuts power loss by 1.8 W vs. legacy controllers - lowers heatsink requirement from 12 °C/W to 25 °C/W. | Use Scenario: Generating isolated 5 V and 3.3 V rails from 24 V DC field bus in DIN-rail mounted PLC modules. IC Role / Device Role / Timing Role: Input-stage buck regulator feeding downstream isolated DC/DC converters; VIN UVLO programmed to 20.5 V to prevent brownout during line sag. Use Value: Programmable VIN UVLO threshold (2.4–2.95 V at ENL) enables precise 24 V system undervoltage lockout - avoids erratic operation during 18–22 V brownout events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar buck regulator with integrated LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2451DT-LF-Z | 3 A output, no integrated LDO, fixed 2.2 MHz frequency, requires external compensation. | Suitable only for lower-current, fixed-frequency designs without bias supply needs. | Select when board space is constrained and LDO functionality is provided elsewhere; not drop-in due to current and feature mismatch. |
| TPS54332DR | 3.5 A output, external MOSFETs required, adjustable frequency 200 kHz–2.5 MHz, no LDO. | Used where thermal management favors discrete FETs or higher VIN (>28 V) is needed. | Choose for designs needing >28 V input or discrete FET optimization; lacks integrated LDO and current capability of SIC403BCD-T1-GE3. |
Compared with MP2451DT-LF-Z and TPS54332DR, the SIC403BCD-T1-GE3 provides 71 % higher output current, integrated LDO biasing, and adaptive on-time control - eliminating compensation components and enabling faster transient response in compact 5 mm × 5 mm footprint.
Availability
SIC403BCD-T1-GE3 is available at Aetrix Electronics and suitable for notebook, server, and networking applications requiring stable component supply, high-efficiency point-of-load conversion, and integrated bias generation.
Supply support for SIC403BCD-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-reliability power management solutions for computing, industrial, and automotive markets.
The SiC403 family targets high-density DC/DC conversion in space-constrained computing and communications equipment, integrating buck regulation and LDO functionality to reduce bill-of-materials and simplify power tree architecture.
FAQ
What is the maximum input voltage rating for the SIC403BCD-T1-GE3?
The SIC403BCD-T1-GE3 has an absolute maximum VIN rating of 30 V referenced to PGND, with recommended operating range from 3 V to 28 V. Exceeding 30 V may cause permanent damage. The device includes input overvoltage protection that triggers at VIN > 30 V transiently (<100 ns) or sustained >28 V, ensuring safe operation in 24 V industrial systems with line surges.
How does the SIC403BCD-T1-GE3 implement power-save mode?
The SIC403BCD-T1-GE3 enters power-save mode when EN/PSV is driven high (≥44 % of VDD). In this mode, switching frequency scales inversely with load current - dropping below 200 kHz at light loads - reducing switching losses. Unlike SiC403A, it does not enforce ultrasonic operation; minimum frequency is not clamped, enabling deeper efficiency gains at microamp loads.
Can the internal LDO of the SIC403BCD-T1-GE3 be disabled?
Yes, the internal LDO of the SIC403BCD-T1-GE3 is fully controllable via ENL (Pin 32). Driving ENL to AGND disables the LDO, allowing external 3–5.5 V bias to power VDD. This configuration bypasses LDO dropout loss and improves full-load efficiency by ~1.2 % compared to self-biased operation at 6 A output.
What is the purpose of the tON pin on the SIC403BCD-T1-GE3?
Pin 31 (tON) on the SIC403BCD-T1-GE3 programs the on-time duration via an external resistor to AGND, which directly sets the operating frequency from 200 kHz to 1 MHz. The relationship is RtON = 25 pF × fSW / k, where k = 1 for VDD > 3.6 V. This enables precise EMI tuning and optimization of inductor size versus light-load efficiency.
Does the SIC403BCD-T1-GE3 support ceramic output capacitors exclusively?
Yes, the SIC403BCD-T1-GE3 is specifically designed for all-ceramic output capacitor solutions. Its adaptive on-time control architecture uses output ripple voltage across capacitor ESR as the PWM ramp signal - eliminating dependency on inductor DCR sensing or external compensation networks required by traditional voltage-mode controllers.
SIC403BCD-T1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- microBUCK®
- Package/Case:
- 32-PowerWFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 200kHz ~ 1MHz
- Voltage/Current - Output 1:
- 0.6V ~ 5.5V, 6A
- Voltage/Current - Output 2:
- Adj to 0.75V, 200mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 3V ~ 28V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® MLP55-32
SIC403BCD-T1-GE3 FAQ
1.How can I place an order for SIC403BCD-T1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIC403BCD-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIC403BCD-T1-GE3 reliable?
The price and inventory of SIC403BCD-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIC403BCD-T1-GE3 is usually 5 days.
3.What payment methods are accepted for SIC403BCD-T1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIC403BCD-T1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIC403BCD-T1-GE3?
SIC403BCD-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIC403BCD-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIC403BCD-T1-GE3?
For technical support, including SIC403BCD-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIC403BCD-T1-GE3 requirements.
6.How does Aetrix verify that SIC403BCD-T1-GE3 is sourced from the original manufacturer or authorized distributors?
All SIC403BCD-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIC403BCD-T1-GE3 meets industry standards.
7.What is the process for return or replacement of SIC403BCD-T1-GE3?
All SIC403BCD-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIC403BCD-T1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIC403BCD-T1-GE3 part is unused and in its original packaging.
Return procedure for SIC403BCD-T1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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