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Vishay Siliconix SIC403CD-T1-GE3
- Part No.:
- SIC403CD-T1-GE3
- Manufacturer:
- Vishay Siliconix
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 32-PowerVFQFN
- Datasheet:
-
SIC403CD-T1-GE3.pdf
- Description:
- IC REG DL BUCK/LNR SYNC MLP55-32
- Quantity:
- Payment:
- Shipping:
Inventory:2,925
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Product details
Overview
SIC403CD-T1-GE3 from Vishay Siliconix is a 6 A, 28 V integrated synchronous buck regulator with programmable 200 mA LDO, housed in an MLPQ 5 × 5–32 pin package. It delivers up to 95 % peak efficiency at 300 kHz, supports 0.75 V–5.5 V output voltage, operates from 3 V–28 V input, and enables all-ceramic designs for notebook CPU core power and point-of-load applications.
For engineers reviewing the SIC403CD-T1-GE3 datasheet, SIC403CD-T1-GE3 pinout, SIC403CD-T1-GE3 application, or SIC403CD-T1-GE3 equivalent, key selection criteria include its pseudo-fixed-frequency adaptive on-time control, independent enable logic for switcher/LDO, programmable valley current limit via ILIM resistor, ultra-sonic power-save mode (≥25 kHz), and integrated bootstrap switch - all critical for high-density, low-noise DC/DC conversion in space-constrained systems.
Technical Context
The SIC403CD-T1-GE3 implements pseudo-fixed-frequency adaptive on-time control using output ripple as the PWM ramp signal, eliminating need for external current-sense resistors or error amplifiers. Its on-time is dynamically set by VIN and VOUT, with external RTON programming frequency from 200 kHz to 1 MHz.
It integrates dual power MOSFETs, bootstrap switch, and a temperature-compensated valley current limit circuit referenced to the LX node. The 200 mA LDO is independently enabled via ENL and can be bypassed by applying external 5 V to VOUT, allowing direct gate drive or powering external n-channel MOSFETs without LDO dropout penalty.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3 V to 28 V - supports wide-input industrial and computing rails including 5 V, 12 V, and 24 V bus systems. |
| Output Voltage Range | 0.75 V to 5.5 V - programmable via FB resistor divider; enables core voltage regulation down to sub-1 V for modern processors. |
| Continuous Output Current | 6 A - delivered with integrated high-side and low-side MOSFETs; no external power stage required. |
| Peak Efficiency | 95 % at 300 kHz - achieved with synchronous rectification and low-RDS(on) internal FETs, reducing conduction losses. |
| Switching Frequency | 200 kHz to 1 MHz - externally programmable via RTON; higher frequencies shrink inductor/capacitor size; lower frequencies improve light-load efficiency. |
| LDO Output | Programmable 200 mA - adjustable via FBL resistor divider; can be bypassed to supply VDD directly from external 5 V source. |
| Protection Features | Cycle-by-cycle current limit, soft-start, soft-shutdown, UVLO (VIN & VDD), over-voltage, under-voltage, and over-temperature shutdown - ensures robust operation across load transients and fault conditions. |
Pinout & Package
Package: MLPQ 5 mm × 5 mm, 32-pin, thermally enhanced exposed pad (PGND-connected). Pin count and layout match Vishay's MLPQ55-32 footprint standard.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FB (Pin 1) | Feedback input | Connects to resistor divider from VOUT; regulates output by comparing to 750 mV internal reference. |
| VOUT (Pin 2) | LDO bypass / VDD supply path | Accepts external 5 V to bypass internal LDO; also supplies VDD when LDO is disabled. |
| VDD (Pin 3) | Bias supply | Provides 3–5.5 V bias for controller logic and gate drivers; sourced from internal LDO or external supply. |
| AGND (Pins 4, 30, PAD 1) | Analog ground | Reference for FB, FBL, SS, TON, ILIM; must be separated from PGND for noise immunity. |
| VIN (Pins 6, 9–11, PAD 2) | Power stage input | HS FET drain connection; accepts full 3–28 V input; multiple pins reduce trace resistance and thermal stress. |
| LX (Pins 13, 23–25, 28, PAD 3) | Switching node | HS FET source / LS FET drain node; connects to inductor; requires low-inductance layout for EMI control. |
| PGND (Pins 15–22) | Power ground | LS FET source return; 8 dedicated pins + exposed pad ensure low-impedance path for high di/dt currents. |
| EN/PSV (Pin 29) | Tri-state enable/power-save | Pull low → disable; float → forced continuous mode; pull high → ultra-sonic power-save (≥25 kHz). |
| PGOOD (Pin 26) | Open-drain status indicator | Asserts after soft-start completes and VOUT is within ±10 % of target; requires external pull-up. |
| ILIM (Pin 27) | Current limit programming | Resistor from ILIM to LX sets valley current limit (4.5–7.2 A typical); enables precise OCP tuning. |
Key Features
| Feature | Design Value |
|---|---|
| Pseudo-fixed-frequency adaptive on-time control | Eliminates need for external compensation network and current-sense resistor; achieves fast transient response (<5 µs) with minimal output capacitance. |
| Independent enable logic for buck regulator and LDO | EN/PSV controls switching regulator; ENL controls LDO and serves as VIN UVLO sensor - enabling flexible power sequencing and fault isolation. |
| Ultra-sonic power-save mode | Maintains minimum 25 kHz switching frequency at light loads to avoid audible noise while retaining >85 % efficiency at 100 mA output. |
| Programmable soft-start and soft-shutdown | SS pin capacitor sets ramp time; soft-shutdown discharges VOUT through internal 15 Ω resistor - preventing output overshoot and inrush during startup/shutdown. |
| Temperature-compensated valley current limit | Uses LS FET RDS(on) for sensing; eliminates external sense resistor and maintains accurate OCP across -40 °C to +125 °C junction range. |
Applications
| Notebook CPU Core Power | Server Point-of-Load Regulation |
|---|---|
Use Scenario: Regulating 0.85 V @ 6 A for Intel/AMD mobile processor cores in ultrabooks with strict thermal and acoustic constraints. IC Role / Device Role / Timing Role: Primary synchronous buck controller with integrated power stage and programmable LDO for gate driver bias. Use Value: 95 % peak efficiency at 300 kHz reduces heat generation; ultra-sonic power-save avoids audible coil whine during idle states. | Use Scenario: Delivering 1.2 V @ 6 A to FPGA or ASIC I/O banks in 1U rack servers where board area and thermal density are critical. IC Role / Device Role / Timing Role: High-current, compact DC/DC converter with fast transient response for dynamic load steps up to 4 A/µs. Use Value: Adaptive on-time control enables <5 µs recovery from 6 A → 0.2 A load step; all-ceramic solution saves PCB area vs. electrolytic alternatives. |
| Digital HDTV SoC Power | Networking ASIC Bias Supply |
Use Scenario: Generating 1.1 V @ 4 A for video processing SoCs in 4K smart TVs requiring low EMI and zero audible noise. IC Role / Device Role / Timing Role: Main SoC core regulator with programmable frequency (500 kHz) to avoid AM radio band interference. Use Value: 200 kHz–1 MHz frequency range allows EMI optimization; PGOOD output synchronizes system reset sequencing. | Use Scenario: Providing clean 3.3 V @ 200 mA bias to high-speed SerDes lanes in 10G Ethernet switches. IC Role / Device Role / Timing Role: Programmable LDO subsystem powered from main 5 V rail, with independent ENL control for power domain isolation. Use Value: 200 mA LDO supports precise 1 % output accuracy; bypass capability enables optimal efficiency when external 5 V is available. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator with integrated LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2451DT-LF-Z | 3 A output, no integrated LDO, fixed 2 MHz frequency, smaller 8-pin SOIC package | Lacks LDO and programmable frequency; suitable only for simpler, lower-current applications without auxiliary bias needs | Select when board space is extremely limited and LDO functionality is provided externally. |
| TPS54620RGYR | 6 A output, no integrated LDO, 2.5 V–17 V input, 300 kHz–2 MHz frequency, 16-pin QFN | Requires external LDO or bias supply; offers higher max frequency but no LDO bypass option or ultra-sonic power-save | Choose when design requires >1 MHz operation and external bias is already available; not drop-in for LDO-dependent layouts. |
Compared with MP2451DT-LF-Z and TPS54620RGYR, the SIC403CD-T1-GE3 uniquely integrates both 6 A buck regulation and a programmable 200 mA LDO in one MLPQ55-32 package, enabling single-chip solutions for systems needing gate-drive bias or auxiliary 5 V rails - reducing BOM count, layout complexity, and thermal footprint without sacrificing efficiency or acoustic performance.
Availability
SIC403CD-T1-GE3 is available at Aetrix Electronics and suitable for notebook CPU core power, server point-of-load regulation, and digital HDTV SoC power applications requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for SIC403CD-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-efficiency power management ICs and advanced MOSFET technologies for demanding industrial and computing applications.
The SiC403 product line was designed specifically for high-current, space-constrained point-of-load conversion in computing and consumer electronics, integrating synchronous buck regulation and auxiliary LDO functionality to eliminate secondary regulators and simplify power architecture.
FAQ
What is the maximum recommended junction temperature for the SIC403CD-T1-GE3?
The SIC403CD-T1-GE3 has a maximum junction temperature rating of 150 °C, with recommended continuous operation limited to +125 °C. Thermal resistance from junction to ambient is 25 °C/W for the high-side MOSFET and 20 °C/W for the low-side MOSFET when mounted on a 4-layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards. Exceeding 125 °C continuously may impact reliability and current-limit accuracy.
How is the switching frequency programmed on the SIC403CD-T1-GE3?
The SIC403CD-T1-GE3 switching frequency is programmed using an external resistor (RTON) connected between the TON pin (Pin 31) and AGND. The on-time is proportional to RTON × (VOUT/VIN), enabling frequency adjustment from 200 kHz to 1 MHz. For example, with VIN = 15 V and VOUT = 5 V, a 300 kΩ resistor yields ~2650 ns on-time and ~500 kHz operation. The maximum allowed RTON is calculated as RTON_MAX = VIN_MIN / (15 µA × VOUT).
Can the internal LDO of the SIC403CD-T1-GE3 be disabled while keeping the buck regulator active?
Yes, the internal LDO of the SIC403CD-T1-GE3 can be disabled independently while the buck regulator remains active by pulling the ENL pin (Pin 32) low to AGND. When ENL is grounded, the LDO shuts off, but the buck regulator continues operating if EN/PSV (Pin 29) is not low. This allows external 5 V to be applied to VOUT (Pin 2) to power VDD, bypassing the LDO entirely for improved efficiency in systems with existing bias rails.
What protection features does the SIC403CD-T1-GE3 include for over-current conditions?
The SIC403CD-T1-GE3 includes cycle-by-cycle valley current limiting, programmable via an external resistor from ILIM (Pin 27) to LX. At typical conditions (VDD = 5 V), a 6 kΩ resistor sets the current limit to 4.5–7.2 A. It also provides smart power-save protection that disables power-save mode if FB exceeds 825 mV (10 % above nominal), preventing false OVP shutdown due to leakage currents. Additional protections include over-voltage, under-voltage, and over-temperature shutdown.
Does the SIC403CD-T1-GE3 support forced continuous conduction mode (FCCM)?
Yes, the SIC403CD-T1-GE3 supports forced continuous conduction mode (FCCM) by floating the EN/PSV pin (Pin 29). In this state, the pin rises to ~1.5 V, enabling the buck regulator with power-save disabled - ensuring constant switching frequency across all load conditions. FCCM is useful for noise-sensitive applications requiring predictable EMI spectra, though it trades off light-load efficiency due to continuous high-frequency switching of both MOSFETs.
SIC403CD-T1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- microBUCK®
- Package/Case:
- 32-PowerVFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 200kHz ~ 1MHz
- Voltage/Current - Output 1:
- 0.75V ~ 5.5V, 6A
- Voltage/Current - Output 2:
- Adj to 0.75V, 200mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 3V ~ 28V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® MLP55-32
SIC403CD-T1-GE3 FAQ
1.How can I place an order for SIC403CD-T1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIC403CD-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIC403CD-T1-GE3 reliable?
The price and inventory of SIC403CD-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIC403CD-T1-GE3 is usually 5 days.
3.What payment methods are accepted for SIC403CD-T1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIC403CD-T1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIC403CD-T1-GE3?
SIC403CD-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIC403CD-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIC403CD-T1-GE3?
For technical support, including SIC403CD-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIC403CD-T1-GE3 requirements.
6.How does Aetrix verify that SIC403CD-T1-GE3 is sourced from the original manufacturer or authorized distributors?
All SIC403CD-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIC403CD-T1-GE3 meets industry standards.
7.What is the process for return or replacement of SIC403CD-T1-GE3?
All SIC403CD-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIC403CD-T1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIC403CD-T1-GE3 part is unused and in its original packaging.
Return procedure for SIC403CD-T1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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