Vishay Siliconix SIC931BED-T1-GE3
- Part No.:
- SIC931BED-T1-GE3
- Manufacturer:
- Vishay Siliconix
- Package:
- 60-PowerBFQFN
- Datasheet:
-
SIC931BED-T1-GE3.pdf
- Description:
- IC REG BUCK ADJ PWRPAK MLP60-A6C
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SiC931BED-T1-GE3 from Vishay Siliconix is a 20 A synchronous buck DC/DC regulator module with integrated power MOSFETs and 220 nH inductor, operating from 4.5 V to 18 V input and delivering adjustable output down to 0.6 V with ±1 % accuracy across –40 °C to +125 °C. It supports up to 2 MHz switching frequency, delivers 95 % peak efficiency, and integrates full protection including OVP, OCP, UVP, OTP, and PGOOD - deployed in high-density computing power delivery.
For engineers reviewing the SiC931BED-T1-GE3 datasheet, SiC931BED-T1-GE3 pinout, SiC931BED-T1-GE3 application, or SiC931BED-T1-GE3 equivalent, key selection considerations include its microBRICK® PowerPAK MLP60-A6C package (10.6 mm × 6.5 mm × 3 mm), programmable soft start (3–8.4 ms), selectable switching frequencies (600 kHz–2 MHz), and light-load power-save mode enabling diode emulation and frequency foldback.
Technical Context
The SiC931BED-T1-GE3 implements voltage-mode constant-on-time (VM-COT) control with internal ramp generation and error amplifier compensation - eliminating need for external ESR networks or loop compensation components. Its architecture enables ultrafast transient response with minimal output capacitance and tight ripple regulation even at light load.
It integrates both high-side and low-side silicon MOSFETs, a 220 nH output inductor, and an internal 5 V LDO (fed from VCIN), allowing single-rail operation without external bias. Protection logic includes cycle-by-cycle OCP via RDS(on) sensing, FB-monitored OVP/UVP with auto-retry, and thermal shutdown with 35 °C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output current | 20 A continuous - supports high-current POL applications without external current sharing. |
| Input voltage range | 4.5 V to 18 V - compatible with standard 5 V and 12 V intermediate bus rails. |
| Output voltage range | 0.6 V to 5.5 V, adjustable via resistor divider - enables core voltage regulation for CPUs, FPGAs, and ASICs. |
| Feedback accuracy | ±1 % from –40 °C to +125 °C - ensures stable output under wide thermal operating conditions. |
| Switching frequency | 600 kHz / 1 MHz / 1.5 MHz / 2 MHz, user-selectable via MODE1 resistor - balances efficiency, size, and EMI performance. |
| Efficiency | 95 % peak at 12 VIN/1.8 VOUT/1.5 MHz - reduces thermal load and improves system power density. |
| Light-load behavior | Power-save mode with diode emulation and frequency foldback - maintains <10 mV ripple while achieving <50 μA operating current. |
| Thermal protection | OTP trigger at 150 °C with 35 °C hysteresis - prevents permanent damage during sustained overload or poor airflow. |
Pinout & Package
SiC931BED-T1-GE3 is housed in a lead-free PowerPAK® MLP60-A6C package (10.6 mm × 6.5 mm × 3 mm), optimized for high thermal conductivity and low-inductance power delivery. The 60-pin layout features multiple parallel SW, VIN, PGND, and VOUT terminals to minimize parasitic resistance and inductance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SW (Pins 1–3, 9, 44, 45, 48–60) | Switching node | High-frequency connection point between integrated high-side and low-side MOSFETs - requires low-inductance layout to minimize ringing and EMI. |
| VIN (Pins 4, 43, 46, 47, 63) | Power input | Main input rail connection - distributed across 5 pins to reduce current density and PCB trace heating. |
| PGND (Pins 5–8, 11, 37, 62) | Power ground | Return path for high-current switching loops - must be tied directly to thermal pad and solid copper plane. |
| VOUT (Pins 16, 19–32) | Output voltage sense | Direct connection to output capacitor bank - 14 dedicated pins ensure accurate remote sensing and low impedance feedback path. |
| FB (Pin 15) | Feedback input | Monitors divided output voltage - connects to resistor divider (RFB_H/RFB_L) to set VOUT; 2 nA bias current minimizes divider error. |
| MODE1 / MODE2 (Pins 36 / 35) | Configuration inputs | Resistor-programmable pins selecting switching frequency (MODE1) and soft-start time/current limit (MODE2) - enable flexible BOM optimization. |
| PGOOD (Pin 39) | Open-drain status flag | Asserts high when VFB is within ±20 % of 0.6 V reference - used for power sequencing and system fault detection. |
| EN (Pin 38) | Enable control | Active-high logic input with 5 MΩ internal pull-down - allows clean startup/shutdown coordination with host controller. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated power stage | High-side + low-side MOSFETs + 220 nH inductor in single MLP60-A6C package - eliminates discrete layout complexity and reduces footprint by >40 % vs. discrete solutions. |
| Internally compensated VM-COT control | No external compensation required - achieves stable regulation with all-ceramic output capacitors and eliminates ESR-dependent loop tuning. |
| Programmable soft start | 3 ms or 6 ms duration (via MODE2 resistor) - prevents inrush current and ensures controlled ramp-up of downstream loads. |
| Pre-bias start-up support | Detects pre-charged output via FB pin and inhibits switching until safe - avoids reverse current flow and negative voltage spikes on powered-backplane systems. |
| Output voltage tracking & sequencing | Supports multi-rail sequencing using external resistive networks - enables coordinated startup of core, I/O, and memory supplies in SoC/FPGA platforms. |
| Ultra-low shutdown current | ≤3 μA total shutdown current - critical for battery-backed or always-on subsystems requiring minimal quiescent drain. |
Applications
| Server CPU Core Supply | Industrial PLC I/O Module |
|---|---|
|
Use Scenario: Regulating 0.8 V–1.2 V core voltage for dual-socket Xeon processors with dynamic load steps up to 20 A/μs. IC Role / Device Role / Timing Role: Primary POL regulator delivering 20 A continuous current with sub-10 μs transient response and <15 mV undershoot. Use Value: Integrated inductor and VM-COT control eliminate need for external compensation, reducing design cycle time and board area by 35 %. |
Use Scenario: Providing isolated 3.3 V/5 V auxiliary rails in DIN-rail mounted programmable logic controllers exposed to –40 °C to +85 °C ambient. IC Role / Device Role / Timing Role: High-reliability buck converter with OTP, OVP, and UVP protection ensuring uninterrupted operation during voltage sags or overloads. Use Value: ±1 % output accuracy over temperature and 150 °C thermal shutdown prevent field failures in unventilated enclosures. |
| Notebook GPU VRM | 5G Baseband Radio Card |
|
Use Scenario: Delivering 0.95 V @ 15 A to discrete graphics processing units with aggressive power-state transitions (G0→G3). IC Role / Device Role / Timing Role: Fast-transient buck module supporting forced CCM or power-save mode to maintain low noise during video rendering and silence during idle. Use Value: Programmable 1.5 MHz switching frequency enables optimal trade-off between efficiency (94.2 %) and EMI filtering component count. |
Use Scenario: Generating 1.8 V/2.5 V bias for RF transceivers and ADC/DACs in compact 5G small-cell radio units with strict thermal limits. IC Role / Device Role / Timing Role: High-power-density microBRICK® module operating at 12 VIN, minimizing heatsink requirements in air-cooled modules. Use Value: 10.6 mm × 6.5 mm footprint and 3 mm height allow placement beneath FPGA or RF front-end ICs, saving >200 mm² PCB area. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-current synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPM3695-25 from Monolithic Power Systems | 25 A rated, 4.5–18 V input, but uses different control scheme (adaptive COT); 7 mm × 7 mm QFN vs. 10.6 mm × 6.5 mm MLP; no pre-bias start-up support. | Higher current rating suits heavier loads, but lacks pre-bias capability needed for hot-swap backplanes. | Select when max output current >20 A is required and pre-bias operation is not needed. |
| TPS546D24A from Texas Instruments | 20 A, 4.5–18 V input, PMBus-enabled with telemetry; larger 10 mm × 10 mm HotRod™ QFN; requires external compensation network. | Supports digital monitoring and margining - suitable for data center servers requiring real-time health reporting. | Select when PMBus interface, telemetry, or margining capability is mandatory for system management. |
Compared with MPM3695-25 and TPS546D24A, SiC931BED-T1-GE3 offers superior thermal performance (RθJC = 2 °C/W), simpler analog configuration (no PMBus firmware or external compensation), and guaranteed pre-bias start-up - making it ideal for cost-sensitive, space-constrained industrial and embedded designs where robustness and ease-of-use outweigh digital control needs.
Availability
SiC931BED-T1-GE3 is available at Aetrix Electronics and suitable for server CPU core supplies, industrial PLC I/O modules, notebook GPU VRMs, and 5G baseband radio cards requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for SiC931BED-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-efficiency power management solutions with emphasis on ruggedness, thermal performance, and integration density.
The SiC931BED-T1-GE3 belongs to Vishay's microBRICK® family of fully integrated DC/DC modules, designed specifically for high-current, low-voltage POL applications in computing, telecom, and industrial systems where board space, thermal headroom, and reliability are critical constraints.
FAQ
What is the maximum recommended output current for SiC931BED-T1-GE3 under continuous operation?
The SiC931BED-T1-GE3 is rated for 20 A continuous output current at ambient temperatures up to +105 °C with adequate PCB copper area and airflow. Derating applies above this temperature per the thermal characteristics in the datasheet - junction temperature must remain ≤+125 °C. At full 20 A load with 12 VIN/1.2 VOUT, typical power dissipation is ~1.8 W, manageable with the device's 2 °C/W junction-to-case thermal resistance.
Does SiC931BED-T1-GE3 support pre-bias start-up, and how does it behave when the output is already charged?
Yes, SiC931BED-T1-GE3 supports pre-bias start-up. When the FB pin senses voltage higher than the internal reference ramp at startup, the control logic disables both high-side and low-side MOSFETs to prevent reverse current flow and negative voltage spikes. This protects downstream loads and avoids excessive current sinking through the low-side MOSFET - essential for hot-plug and backplane-powered systems.
How is the switching frequency selected on SiC931BED-T1-GE3, and what resistor values are required for 1.5 MHz operation?
Switching frequency is set by connecting a resistor between MODE1 pin and either AGND or VDD. For 1.5 MHz operation in skip mode, a 200 kΩ resistor is connected from MODE1 to AGND (per Table 1). In forced CCM mode, the same resistor value yields identical frequency. Resistor tolerance should be ≤1 % to maintain timing accuracy within ±10 %.
What protection features are integrated into SiC931BED-T1-GE3, and are they latched or auto-recovering?
SiC931BED-T1-GE3 integrates output overvoltage protection (OVP), cycle-by-cycle overcurrent protection (OCP), output undervoltage/short-circuit protection (UVP) with auto-retry, overtemperature protection (OTP) with hysteresis, and input UVLO. OVP and OTP are auto-recovering after fault clearance; UVP initiates a 20-soft-start-period retry cycle; OCP is pulse-by-pulse and non-latching during normal operation.
Can SiC931BED-T1-GE3 operate with all-ceramic output capacitors, and is external compensation required?
Yes, SiC931BED-T1-GE3 is designed to operate stably with all-ceramic output capacitors and requires no external compensation network. Its internally compensated VM-COT control architecture eliminates dependency on capacitor ESR for loop stability - simplifying design, reducing BOM count, and improving reliability compared to traditional voltage-mode or current-mode controllers.
SIC931BED-T1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- microBUCK®
- Package/Case:
- 60-PowerBFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 20A
- Frequency - Switching:
- 600kHz, 1MHz, 1.5MHz, 2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® MLP60-A6C
SIC931BED-T1-GE3 FAQ
1.How can I place an order for SIC931BED-T1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIC931BED-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIC931BED-T1-GE3 reliable?
The price and inventory of SIC931BED-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIC931BED-T1-GE3 is usually 5 days.
3.What payment methods are accepted for SIC931BED-T1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIC931BED-T1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIC931BED-T1-GE3?
SIC931BED-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIC931BED-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIC931BED-T1-GE3?
For technical support, including SIC931BED-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIC931BED-T1-GE3 requirements.
6.How does Aetrix verify that SIC931BED-T1-GE3 is sourced from the original manufacturer or authorized distributors?
All SIC931BED-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIC931BED-T1-GE3 meets industry standards.
7.What is the process for return or replacement of SIC931BED-T1-GE3?
All SIC931BED-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIC931BED-T1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIC931BED-T1-GE3 part is unused and in its original packaging.
Return procedure for SIC931BED-T1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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