My Inquiry
My Account
Vishay Siliconix SIC931BED-Y1-GE3
- Part No.:
- SIC931BED-Y1-GE3
- Manufacturer:
- Vishay Siliconix
- Package:
- 60-PowerBFQFN
- Datasheet:
-
SIC931BED-Y1-GE3.pdf
- Description:
- IC REG BUCK ADJ PWRPAK MLP60-A6C
- Quantity:
- Payment:
- Shipping:
Inventory:403
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SIC931BED-Y1-GE3 from Vishay Siliconix is a 20 A synchronous buck DC/DC regulator module with integrated power MOSFETs and 220 nH inductor, operating from 4.5 V to 18 V input and delivering adjustable output down to 0.6 V with ±1 % accuracy across –40 °C to +125 °C. It supports programmable switching frequencies up to 2 MHz and delivers 95 % peak efficiency in server point-of-load (POL) applications.
For engineers reviewing the SIC931BED-Y1-GE3 datasheet, SIC931BED-Y1-GE3 pinout, SIC931BED-Y1-GE3 application, or SIC931BED-Y1-GE3 equivalent, key selection criteria include its internal compensation, power-saving diode emulation mode at light load, 60-pin PowerPAK® MLP60-A6C package, and full protection suite including OVP, UVP, OCP, and OTP.
Technical Context
The SIC931BED-Y1-GE3 employs voltage-mode constant-on-time (VM-COT) control with internally generated ramp signal and dual-path feedback-fast ripple-based correction and slow error-amplifier DC regulation-to achieve ultrafast transient response without external ESR networks. Its internal RAMP components (RX, CX, CY) auto-select based on VOUT and fSW to maintain constant amplitude and low jitter.
It integrates high-side and low-side MOSFETs with gate drive signals (GH/GL), uses VCIN-to-VDD LDO for self-biasing, and implements zero-crossing detection for diode emulation during light-load operation. Protection logic includes pulse-by-pulse OCP via RDS(on) sensing, FB-monitored OVP/UVP with 25 μs blanking, and thermal shutdown with 35 °C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 18 V - supports standard 5 V and 12 V POL rails without external bias supply. |
| Output Current | 20 A continuous - enables single-module replacement of multi-phase controllers in compact computing designs. |
| Output Voltage Accuracy | ±1 % from –40 °C to +125 °C - ensures stable core voltage regulation under full industrial temperature range. |
| Peak Efficiency | 95 % at 1.5 MHz - minimizes thermal stress and improves system-level power density in high-current POLs. |
| Switching Frequency | 600 kHz / 1 MHz / 1.5 MHz / 2 MHz - selectable via MODE1 resistor to balance EMI, size, and efficiency. |
| Feedback Reference | 600 mV ±3 mV - enables precise output setting down to 0.6 V using standard resistor dividers. |
| Light-Load Current | 50 μA non-switching, 1 μA shutdown - extends battery life in always-on subsystems and reduces standby losses. |
Pinout & Package
The SIC931BED-Y1-GE3 is housed in a lead-free PowerPAK® MLP60-A6C package measuring 10.6 mm × 6.5 mm × 3 mm, optimized for high-power-density PCB layouts with exposed thermal pad on bottom side.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1–3, 9, 44, 45, 48–60 | SW | Switching node - connects to internal high-side/low-side MOSFET drains and external bootstrap capacitor. |
| 4, 43, 46, 47, 63 | VIN | Main power input - distributed across 5 pins to reduce IR drop and improve current sharing. |
| 5–8, 11, 37, 62 | PGND | Power ground - dedicated low-impedance return path for high di/dt currents and thermal dissipation. |
| 10 | GL | Low-side gate driver output - directly drives internal LS MOSFET; not user-accessible. |
| 12 | VDRV | Internal gate driver supply - requires 2.2 μF decoupling to PGND for stable high-side switching. |
| 13 | VDD | Internal logic supply - derived from VCIN via internal LDO; requires 1 μF decoupling to AGND. |
| 14, 61 | AGND | Analog reference ground - separate from PGND to minimize noise coupling into feedback loop. |
| 15 | FB | Feedback input - senses output via resistor divider; sets VOUT = 0.6 V × (1 + RFB_H/RFB_L). |
| 16, 19–32 | VOUT | Output voltage sense - 14 pins provide low-impedance Kelvin sensing for accurate regulation under load. |
| 35 | MODE2 | Soft-start and current-limit configuration - resistor to VDD/AGND selects tSS (3/6 ms) and IOCP (9.6–32 A). |
| 36 | MODE1 | Frequency and conduction mode selection - resistor to VDD/AGND sets fSW and forces CCM or PS mode. |
| 38 | EN | Enable input - active-high with 5 MΩ internal pull-down; supports precise power sequencing. |
| 39 | PGOOD | Open-drain power-good flag - asserts after soft-start when VFB is within ±20 % of 0.6 V reference. |
| 40 | VCIN | Internal LDO input - recommended to tie directly to VIN pins for robust 5 V logic supply generation. |
| 41 | BOOT | Bootstrap supply - connects 100 nF capacitor to SW to bias high-side gate driver above VIN. |
| 42 | GH | High-side gate driver output - drives internal HS MOSFET; not user-accessible. |
Key Features
| Feature | Design Value |
|---|---|
| Internally compensated VM-COT control | Eliminates need for external ESR network or compensation components - reduces BOM count and layout sensitivity. |
| Programmable soft start (3 ms or 6 ms) | Prevents inrush current and output overshoot during power-up - configurable via MODE2 resistor without extra ICs. |
| Diode emulation + frequency foldback | Reduces light-load switching losses and recirculation current - achieves 50 μA quiescent current at no load. |
| Full fault protection suite | OVP/UVP/OCP/OTP with auto-retry on UVP and hysteresis on OTP - enables robust unattended operation in industrial systems. |
| Pre-bias start-up support | Prevents negative voltage spikes and excessive sinking current when output is pre-charged - critical for hot-swap applications. |
| Output voltage tracking & sequencing | Enables coordinated startup/shutdown with other rails using external resistive networks - simplifies multi-rail system design. |
Applications
| Server Point-of-Load Regulation | Industrial PLC I/O Power |
|---|---|
|
Use Scenario: Supplies 1.2 V/20 A core voltage to Xeon or AMD EPYC processors in 1U rack servers with strict thermal and space constraints. IC Role / Device Role / Timing Role: Primary POL regulator with fast transient response to handle CPU burst loads up to 24 A/μs. Use Value: Integrated inductor and 95 % efficiency reduce board area by >40 % vs. discrete solutions while maintaining <15 mV output ripple. |
Use Scenario: Powers isolated analog I/O modules in programmable logic controllers requiring stable 3.3 V/10 A under wide ambient temperature swings. IC Role / Device Role / Timing Role: Main DC/DC converter with ±1 % output accuracy over –40 °C to +105 °C ambient. Use Value: Internal UVLO, OTP, and OVP eliminate need for external supervisors - improves system reliability in harsh factory environments. |
| Notebook GPU Core Supply | Telecom Baseband ASIC Power |
|
Use Scenario: Delivers 0.85 V/15 A to discrete GPU in ultrabook platforms where height (<3 mm) and light-load efficiency are critical. IC Role / Device Role / Timing Role: Compact, low-profile POL with diode emulation mode enabling >85 % efficiency at 100 mA load. Use Value: 3 mm profile and 10.6 mm × 6.5 mm footprint meet notebook mechanical constraints while supporting dynamic voltage scaling. |
Use Scenario: Generates 1.8 V/12 A for 5G baseband processors in outdoor small cells with extended temperature and vibration requirements. IC Role / Device Role / Timing Role: High-reliability POL with pre-bias start-up and output voltage tracking for multi-rail ASIC sequencing. Use Value: 60-pin MLP package provides superior thermal performance (RθJC = 2 °C/W) and mechanical robustness vs. QFN alternatives. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator module applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPM3695-25 from Monolithic Power Systems | 25 A rating, 2.5 MHz max fSW, smaller 8 mm × 8 mm × 4 mm package, but only ±1.5 % VOUT accuracy over temperature. | Better suited for space-constrained telecom modules needing higher current, less ideal for precision computing rails. | Select MPM3695-25 when peak current >20 A is required and ±1 % accuracy is not mandatory. |
| TPS546D24 from Texas Instruments | 24 A, supports PMBus interface and digital telemetry, larger 10 mm × 10 mm × 4.2 mm package, requires external compensation. | Preferred for systems needing real-time monitoring, margining, or adaptive loop tuning via digital interface. | Choose TPS546D24 when digital control, telemetry, or multi-device synchronization is required. |
Compared with MPM3695-25 and TPS546D24, the SIC931BED-Y1-GE3 offers tighter output accuracy (±1 %), lower profile (3 mm), and fully internal compensation - making it optimal for thermally constrained, analog-controlled POLs where minimal external components and guaranteed stability are priorities.
Availability
SIC931BED-Y1-GE3 is available at Aetrix Electronics and suitable for server point-of-load regulation, industrial PLC I/O power, and notebook GPU core supply requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for SIC931BED-Y1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-efficiency power management solutions for demanding industrial and computing applications.
The SiC931 product line delivers microBRICK® DC/DC modules targeting high-current, low-voltage POL conversion in space- and thermally-constrained systems such as servers, networking gear, and embedded controllers.
FAQ
What is the maximum output current capability of the SIC931BED-Y1-GE3?
The SIC931BED-Y1-GE3 delivers 20 A continuous output current with thermal derating above +105 °C ambient. Its internal 220 nH inductor and optimized MOSFETs sustain this rating at up to 2 MHz switching frequency, verified per Vishay's S23-0880-Rev. G datasheet under forced-air cooling conditions. The device also supports peak currents up to 32 A via MODE2 configuration for short-duration transients.
Does the SIC931BED-Y1-GE3 require external compensation components?
No, the SIC931BED-Y1-GE3 features fully internal compensation for its VM-COT control loop. All ramp generation, error amplifier compensation (RCOMP/CCOMP), and frequency-dependent component selection are implemented on-die - eliminating external RC networks, ESR requirements, or stability tuning. This is confirmed in Section 6 of the datasheet under "Control Mechanism" and Fig. 6 block diagram.
How is the output voltage set on the SIC931BED-Y1-GE3?
The SIC931BED-Y1-GE3 uses a resistor divider from VOUT to AGND, connected to the FB pin, to set output voltage per VOUT = 0.6 V × (1 + RFB_H/RFB_L). The internal 600 mV reference has ±3 mV tolerance at 25 °C and ±6 mV over –40 °C to +125 °C. RFB_L must be ≤10 kΩ to prevent no-load drift, as specified in the "External Component Selection" section of the datasheet.
What protection features does the SIC931BED-Y1-GE3 include?
The SIC931BED-Y1-GE3 integrates cycle-by-cycle overcurrent protection (OCP), output overvoltage (OVP) and undervoltage (UVP) protection with auto-retry, overtemperature protection (OTP) with 35 °C hysteresis, input UVLO, and power-good flag monitoring. All protections are hardware-based and active without firmware - detailed in Sections 7 and 8 of the datasheet, including trip thresholds and recovery behavior.
Is the SIC931BED-Y1-GE3 compatible with pre-biased outputs?
Yes, the SIC931BED-Y1-GE3 supports pre-bias start-up: if the FB voltage exceeds the internal reference ramp at power-on, the control logic inhibits switching to prevent negative voltage spikes and excessive current sinking through the low-side MOSFET. This behavior is explicitly documented in Section 8 ("Pre-Bias Start-Up") and illustrated in Fig. 9 of the datasheet.
SIC931BED-Y1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- microBUCK®
- Package/Case:
- 60-PowerBFQFN
- Packaging:
- Tray
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 20A
- Frequency - Switching:
- 600kHz, 1MHz, 1.5MHz, 2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® MLP60-A6C
SIC931BED-Y1-GE3 FAQ
1.How can I place an order for SIC931BED-Y1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIC931BED-Y1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIC931BED-Y1-GE3 reliable?
The price and inventory of SIC931BED-Y1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIC931BED-Y1-GE3 is usually 5 days.
3.What payment methods are accepted for SIC931BED-Y1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIC931BED-Y1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIC931BED-Y1-GE3?
SIC931BED-Y1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIC931BED-Y1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIC931BED-Y1-GE3?
For technical support, including SIC931BED-Y1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIC931BED-Y1-GE3 requirements.
6.How does Aetrix verify that SIC931BED-Y1-GE3 is sourced from the original manufacturer or authorized distributors?
All SIC931BED-Y1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIC931BED-Y1-GE3 meets industry standards.
7.What is the process for return or replacement of SIC931BED-Y1-GE3?
All SIC931BED-Y1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIC931BED-Y1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIC931BED-Y1-GE3 part is unused and in its original packaging.
Return procedure for SIC931BED-Y1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SIC931BED-Y1-GE3 Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
