Vishay Siliconix SIP21107DT-26-E3
- Part No.:
- SIP21107DT-26-E3
- Manufacturer:
- Vishay Siliconix
- Package:
- SOT-23-5 Thin, TSOT-23-5
- Datasheet:
-
SIP21107DT-26-E3.pdf
- Description:
- IC REG LIN 2.6V 150MA TSOT23-5
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SIP21107DT-26-E3 from Vishay Siliconix is a 2.6 V fixed-output, 150 mA low-noise LDO voltage regulator with Power-OK (POK) error flag and no external bypass capacitor requirement. It features 135 mV dropout at 150 mA, 1.0 % output voltage accuracy at 25 °C, and operates across -40 °C to +85 °C ambient. Designed for RF-sensitive portable electronics, it delivers stable regulation using only 1 µF ceramic output capacitance.
For engineers reviewing the SIP21107DT-26-E3 datasheet, SIP21107DT-26-E3 pinout, SIP21107DT-26-E3 application, or SIP21107DT-26-E3 equivalent, key selection criteria include POK functionality, ultra-low ground current (35 µA typ. at 1 mA), shutdown current ≤1 µA, auto-discharge resistance (100 Ω), and compatibility with TSOT23-5L package layout constraints.
Technical Context
The SIP21107DT-26-E3 integrates a P-channel MOSFET pass transistor (0.9 Ω typical RDS(on)) and bandgap reference-based error amplifier to maintain precise 2.6 V output under varying load and input conditions. Its internal POK comparator monitors VOUT against VIN-derived threshold (90–96 % of VOUT) and asserts open-drain low on under-voltage fault.
Startup behavior includes active pull-down for fast transient response and pre-charged EN logic enabling 70 µs turn-on time. Thermal protection activates at 160 °C junction temperature with 20 °C hysteresis, while short-circuit current limit is 330 mA typical.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 2.6 V ±2.5 % over full temperature range (-40 °C to +85 °C); enables direct replacement of 2.6 V logic rails without resistor network. |
| Dropout Voltage | 135 mV at 150 mA load; allows operation down to VIN = 2.73 V while maintaining regulation - critical for single-cell Li-ion or alkaline battery systems. |
| Ground Current | 35 µA typical at 1 mA load; minimizes standby power loss in always-on subsystems like real-time clocks or sensor wake-up circuits. |
| POK Threshold | 90–96 % of VOUT (2.34–2.496 V at 2.6 V); provides reliable power-good signaling before downstream logic initialization. |
| Shutdown Current | ≤1 µA maximum at 85 °C; ensures negligible battery drain during deep sleep modes in portable devices. |
| Auto-Discharge Resistance | 100 Ω typical; discharges 1 µF output capacitor to <10 % VOUT in <1 ms upon shutdown - prevents residual voltage from interfering with system reset sequencing. |
| Thermal Shutdown | 160 °C junction temperature with 20 °C hysteresis; protects against sustained overload while permitting brief peak-current events (e.g., RF transmit bursts). |
Pinout & Package
TSOT23-5L package (3.05 mm × 2.85 mm × 1.0 mm), RoHS-compliant, rated for industrial temperature range (-40 °C to +85 °C).
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 (EN) | Enable control input | Active-high logic: ≥1.2 V enables regulator; ≤0.4 V disables. Must not float - tie to VIN if unused. |
| 2 (GND) | Power ground reference | Primary thermal path; requires direct connection to large PCB ground plane for thermal management and noise immunity. |
| 3 (VIN) | Input supply | Accepts 2.2–6.0 V; bypassed with 1 µF ceramic capacitor to GND near pin for line-transient suppression. |
| 4 (VOUT) | Regulated output | Delivers 2.6 V ±2.5 %; supports 150 mA continuous, 330 mA peak; stable with ≥1 µF ceramic output capacitor. |
| 5 (POK) | Open-drain Power-OK flag | Requires external pull-up to VIN or VOUT; sinks ≤0.5 mA; goes low when VOUT drops below POK threshold - used for microcontroller reset or power sequencing. |
Key Features
| Feature | Design Value |
|---|---|
| No external noise bypass capacitor required | Eliminates 10 nF BP capacitor needed by SiP21106, reducing BOM count and board area in space-constrained designs. |
| Integrated Power-OK (POK) output | Provides system-level power monitoring without external comparators or voltage dividers - simplifies reset circuitry for microcontrollers and FPGAs. |
| Output auto-discharge on shutdown | 100 Ω internal NMOS discharge path ensures rapid VOUT collapse, preventing latch-up or false wake-up in multi-rail systems. |
| Ultra-low ground current | 35 µA typical at 1 mA load extends battery life in low-duty-cycle applications such as wireless sensors or wearable health monitors. |
| Short-circuit and thermal protection | 330 mA current limit and 160 °C thermal shutdown enable robust operation in unregulated input environments without external protection components. |
Applications
| Cellular Radio Subsystem | Low-Power MCU Core Supply |
|---|---|
Use Scenario: Powering RF transceiver ICs (e.g., Bluetooth/Wi-Fi SoCs) requiring clean, stable 2.6 V supply with fast transient response. IC Role / Device Role / Timing Role: Low-noise LDO providing regulated bias for VCOs, PLLs, and analog front-ends - maintains EVM and receiver sensitivity. Use Value: 350 µV(rms) output noise (10 Hz–100 kHz) avoids phase noise degradation; POK signal synchronizes RF initialization sequence. | Use Scenario: Supplying core voltage to ARM Cortex-M0/M3 microcontrollers operating in active and deep-sleep modes. IC Role / Device Role / Timing Role: Primary power source delivering 2.6 V at up to 150 mA, with controlled startup and shutdown sequencing. Use Value: 70 µs turn-on time meets MCU reset timing requirements; ≤1 µA shutdown current preserves battery during multi-day sleep cycles. |
| Digital Camera Image Sensor Bias | Portable Medical Diagnostic Module |
Use Scenario: Providing clean bias to CMOS image sensors where supply ripple induces fixed-pattern noise or banding artifacts. IC Role / Device Role / Timing Role: Dedicated LDO for analog sensor rail, decoupled from noisy digital domains via POK-controlled power gating. Use Value: Stable 1.0 % output accuracy ensures consistent ADC reference scaling; auto-discharge prevents sensor latch-up during mode transitions. | Use Scenario: Powering analog front-end (AFE) and signal chain components in handheld ECG or pulse oximeter devices. IC Role / Device Role / Timing Role: Safety-critical power element ensuring regulated 2.6 V supply with fault reporting via POK to host processor. Use Value: Thermal and short-circuit protection meet IEC 60601-1 reliability requirements; POK flag enables diagnostic self-test confirmation at boot. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCP1700T-2602E/MB | 2.6 V fixed output, 250 mA rating, 600 mV dropout at 250 mA, no POK pin, SC70-5 package | Lacks power-good signaling; higher dropout limits usable input range in low-VIN battery apps | Select when POK is unnecessary and higher output current is required; verify thermal derating in TSOT23 footprint. |
| Torex XC6206P262MR-G | 2.6 V fixed output, 150 mA rating, 160 mV dropout at 150 mA, no POK, SOT23-5 package | Higher dropout reduces headroom margin; no fault reporting capability | Choose for cost-sensitive designs where POK is handled externally; confirm stability with 1 µF ceramic output cap per datasheet. |
Compared with MCP1700T-2602E/MB and XC6206P262MR-G, SIP21107DT-26-E3 uniquely combines POK functionality, ultra-low ground current, and 135 mV dropout in TSOT23-5L - making it optimal for RF-critical, battery-powered systems requiring integrated power monitoring and minimal quiescent loss.
Availability
SIP21107DT-26-E3 is available at Aetrix Electronics and suitable for cellular handsets, portable medical diagnostics, and digital camera modules requiring stable component supply despite end-of-life status.
Supply support for SIP21107DT-26-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global semiconductor manufacturer specializing in discrete semiconductors and passive components, with expertise in power management ICs and high-reliability packaging.
The SiP21106/7/8 product line was engineered specifically for ultra-low-noise, low-quiescent-current LDO regulation in battery-powered portable electronics - emphasizing POK integration, small-footprint packaging, and robust thermal performance.
FAQ
What is the minimum input voltage required for SIP21107DT-26-E3 to regulate at 2.6 V?
The SIP21107DT-26-E3 requires a minimum input voltage of 2.73 V to maintain regulation at 2.6 V output under full 150 mA load, based on its 135 mV dropout specification. At lighter loads, VIN may be reduced further - e.g., 2.645 V at 50 mA (90 mV dropout). Input must remain ≥2.2 V per absolute maximum ratings.
Does SIP21107DT-26-E3 require an external pull-up resistor on the POK pin?
Yes, SIP21107DT-26-E3 requires an external pull-up resistor on the POK pin because it is an open-drain output. The datasheet specifies that POK sinks up to 0.5 mA and must be pulled to either VIN or VOUT. Typical values range from 10 kΩ to 100 kΩ depending on rise-time and bus loading requirements.
Can SIP21107DT-26-E3 operate with only a 1 µF output capacitor?
Yes, SIP21107DT-26-E3 is explicitly designed to be stable with a minimum 1 µF ceramic output capacitor, as confirmed in the datasheet's APPLICATION INFORMATION section. This eliminates need for larger or specialized capacitors, reducing cost and board area while maintaining PSRR and load-transient performance.
What is the purpose of the auto-discharge function in SIP21107DT-26-E3?
The auto-discharge function in SIP21107DT-26-E3 uses a 100 Ω internal NMOS switch between VOUT and GND during shutdown (EN = low) to rapidly discharge output capacitance. This ensures VOUT collapses within 1 ms for a 1 µF capacitor, preventing unintended operation of downstream circuitry and enabling clean system reset sequencing.
Is SIP21107DT-26-E3 still in production or available for new designs?
SIP21107DT-26-E3 is End of Life per Vishay documentation (Last Available Purchase Date: 31-Dec-2014). However, Aetrix Electronics maintains legacy inventory and offers traceable, tested units for repair, maintenance, and legacy production continuity - subject to remaining stock levels and qualification testing per customer requirements.
SIP21107DT-26-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Package/Case:
- SOT-23-5 Thin, TSOT-23-5
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 2.6V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.22V @ 150mA
- Current - Output:
- 150mA
- Current - Quiescent (Iq):
- 85 µA
- Current - Supply (Max):
- -
- PSRR:
- 72dB ~ 38dB (1kHz ~ 100kHz)
- Control Features:
- Enable, Power Good
- Protection Features:
- Over Temperature, Short Circuit
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- TSOT-23-5
SIP21107DT-26-E3 FAQ
1.How can I place an order for SIP21107DT-26-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIP21107DT-26-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIP21107DT-26-E3 reliable?
The price and inventory of SIP21107DT-26-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIP21107DT-26-E3 is usually 5 days.
3.What payment methods are accepted for SIP21107DT-26-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIP21107DT-26-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIP21107DT-26-E3?
SIP21107DT-26-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIP21107DT-26-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIP21107DT-26-E3?
For technical support, including SIP21107DT-26-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIP21107DT-26-E3 requirements.
6.How does Aetrix verify that SIP21107DT-26-E3 is sourced from the original manufacturer or authorized distributors?
All SIP21107DT-26-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIP21107DT-26-E3 meets industry standards.
7.What is the process for return or replacement of SIP21107DT-26-E3?
All SIP21107DT-26-E3 units undergo pre-shipment inspection (PSI). If there is an issue with SIP21107DT-26-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIP21107DT-26-E3 part is unused and in its original packaging.
Return procedure for SIP21107DT-26-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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