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Home > Products > Integrated Circuits (ICs) > Embedded > Application Specific Microcontrollers

Infineon Technologies SLB9670VQ20FW785XUMA1

Name: SLB9670VQ20FW785XUMA1
Brand: Infineon Technologies
SKU: SLB9670VQ20FW785XUMA1
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SLB9670VQ20FW785XUMA1

Manufacturer:: Infineon Technologies

Category:: Application Specific Microcontrollers

Package:: 32-VFQFN Exposed Pad

Datasheet:: SLB9670VQ20FW785XUMA1.pdf

Description:: TPM

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SLB9670VQ20FW785XUMA1 from Infineon is a TPM 2.0 Trusted Platform Module implementing TCG Family 2.0 specifications, featuring SPI interface (up to 43 MHz), FIPS 140-2 Level 2 validation (Certificate #3492), and 24 PCRs supporting SHA-1/SHA-256. It delivers hardware-rooted security for platform integrity verification in client computing systems.

For engineers reviewing the SLB9670VQ20FW785XUMA1 datasheet, SLB9670VQ20FW785XUMA1 pinout, SLB9670VQ20FW785XUMA1 application, or SLB9670VQ20FW785XUMA1 equivalent, key selection factors include SPI timing compliance, low standby current (110 µA), NV memory capacity (≥6962 bytes), PCR configuration flexibility, and Linux kernel integration support.

Technical Context

The SLB9670VQ20FW785XUMA1 implements a dedicated cryptographic co-processor with integrated RNG compliant to NIST SP800-90A, secure boot attestation via Endorsement Key personalization, and hardware-enforced isolation of sensitive operations. Its architecture supports up to 64 active sessions and 7 persistent objects, enabling concurrent secure operations in multi-tenant environments.

Power management is fully autonomous: the device transitions to low-power state after each SPI transaction and wakes instantly on SCLK/CS# activity. All VDD pins (8, 22, 1, 14) must be externally bypassed with 100 nF capacitors, and GND connections (2, 9, 23, 32, 16) are mandatory per TCG specification compliance.

Key Specifications

Parameter	Value and Actual Design Meaning
SPI Clock Max	43 MHz - Enables high-throughput command/response exchange with host CPU without bottlenecking secure boot or attestation latency.
Standby Current	110 µA typical - Minimizes battery drain in always-on security contexts such as Chromebook firmware verification.
NV Memory Size	≥6962 bytes free - Supports storage of multiple keys, certificates, and policy objects without external flash dependency.
PCR Count	24 registers - Allows granular measurement of boot components (UEFI, OS loader, hypervisor) across complex platform configurations.
I/O Buffer Size	1420 bytes - Accommodates full TPM2_Commit or TPM2_PolicySecret command structures including signatures and nonces.
Operating Temp	−20 °C to +85 °C - Validated for standard client computing thermal envelopes including thin-and-light laptops and embedded edge gateways.
RNG Standard	NIST SP800-90A compliant - Provides cryptographically secure entropy for key generation and nonce derivation required by FIPS 140-2 Level 2.

Pinout & Package

SLB9670VQ20FW785XUMA1 uses PG-VQFN-32-13 package (5 mm × 5 mm, 0.5 mm pitch, exposed thermal pad). Pin layout follows TCG-compliant mapping with dedicated SPI, reset, interrupt, and optional GPIO/PP signals.

Pin/Terminal	Circuit Role	Design Meaning
20 (CS#)	Chip Select Input	Active-low SPI slave select; requires Schmitt-trigger input for noise immunity in shared bus environments.
19 (SCLK)	SPI Clock Input	Master-provided clock; only Mode 0 (CPOL=0, CPHA=0) supported - constrains host controller configuration.
21 (MOSI)	SPI Data Input	Receives TPM commands and parameters; tri-state buffer allows safe sharing with other SPI peripherals.
24 (MISO)	SPI Data Output	Tri-state output delivers responses; requires external pull-up if shared bus used during idle periods.
18 (PIRQ#)	Interrupt Output	Open-drain active-low signal alerts host of asynchronous events (e.g., policy violation, command completion).
17 (RST#)	Reset Input	Hardware reset with weak internal pull-up; must connect to platform PCIRST# for coordinated cold boot recovery.
6 (GPIO)	General Purpose I/O	Unused in TPM2.0 mode; internally pulled up - may remain unconnected without affecting security functionality.
7 (PP)	Physical Presence	Unused in TPM2.0 mode; internally pulled down - left floating per TCG spec; no host-side logic required.
8, 22, 1, 14 (VDD)	Power Supply	Four dedicated VDD pins require individual 100 nF ceramic decoupling to ensure stable core voltage during cryptographic operations.
2, 9, 23, 32, 16 (GND)	Ground	Five GND connections provide low-impedance return path; pin 16 is TCG-mandated GND for future compatibility.

Key Features

Feature	Design Value
FIPS 140-2 Level 2 Validation	Certificate #3492 (16 July 2019) - Enables use in U.S. federal systems requiring validated cryptographic modules.
Endorsement Key Personalization	Factory-programmed EK with X.509 certificate - Eliminates need for post-silicon key injection, reducing supply chain risk.
Linux Kernel Integration	Built-in support via tpm_tis_spi driver - Enables out-of-box TPM2.0 functionality on mainline kernels without vendor-specific patches.
TCG Compliance	Full TPM Main Specification 2.0 implementation - Ensures interoperability with Windows Hello, Intel TXT, and Chrome OS Verified Boot stacks.
Low-Power Transaction Handling	Automatic wake/sleep on SPI activity - Removes software power management overhead while maintaining sub-120 µA quiescent draw.

Applications

Client Computing Platform Security

Enterprise Laptop Firmware Integrity

Use Scenario: Secure boot chain verification in Windows 11 laptops with BitLocker encryption enabled.

IC Role / Device Role / Timing Role: Root-of-trust anchor measuring UEFI firmware, bootloader, and OS kernel before execution.

Use Value: Prevents persistent malware persistence by cryptographically binding decryption keys to verified platform state.

Use Scenario: Remote attestation of corporate-owned Chromebooks during zero-touch enrollment.

IC Role / Device Role / Timing Role: TPM2.0 attestation engine generating signed PCR quotes for cloud-based device health validation.

Use Value: Enables IT administrators to enforce policy compliance (e.g., firmware version, disk encryption status) prior to granting network access.

Industrial Edge Gateway Authentication

Embedded Linux Device Identity Binding

Use Scenario: Secure onboarding of factory-floor gateways into Azure IoT Hub using X.509 certificate chains.

IC Role / Device Role / Timing Role: Hardware-backed key generation and signing authority for TLS client authentication.

Use Value: Eliminates software-only key storage vulnerabilities; enables revocation of compromised devices via TPM-bound certificates.

Use Scenario: Immutable device identity provisioning in medical imaging equipment running Yocto-built Linux.

IC Role / Device Role / Timing Role: Persistent storage of manufacturer-signed device identity credentials in protected NV memory.

Use Value: Guarantees traceability and regulatory compliance (e.g., FDA 21 CFR Part 11) through tamper-evident hardware identity.

Equivalent & Alternatives

The following parts are listed as comparable options for similar TPM 2.0 security applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SLB9670XQ20FW785XUMA1	Enhanced temperature range (−40 °C to +85 °C) vs. standard −20 °C to +85 °C; identical electrical and functional specs.	Required for industrial outdoor deployments or automotive cabin-mounted edge controllers with wider thermal cycling.	Select when ambient operating temperature exceeds 85 °C or drops below −20 °C; otherwise SLB9670VQ20FW785XUMA1 suffices.
ST33TPHF2ESAM	Same PG-VQFN-32 package but uses I²C interface (not SPI); FIPS 140-2 Level 2 certified (Certificate #3528); 16 PCRs vs. 24.	Suitable for space-constrained designs where I²C bus is preferred over SPI, but lacks PCR depth for complex attestation policies.	Choose only if host platform lacks SPI resources or requires I²C-native integration; verify PCR count meets attestation scope.

Compared with SLB9670XQ20FW785XUMA1, the VQ variant trades extended temperature tolerance for cost optimization in commercial client platforms; versus ST33TPHF2ESAM, it offers superior PCR scalability and SPI bandwidth at the expense of interface flexibility.

Availability

SLB9670VQ20FW785XUMA1 is available at Aetrix Electronics and suitable for client computing platform security, enterprise laptop firmware integrity, industrial edge gateway authentication, and embedded Linux device identity binding requiring stable component supply across multi-year production cycles.

Supply support for SLB9670VQ20FW785XUMA1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor manufacturer specializing in power management, sensing, and security ICs, with global R&D centers and ISO 9001-certified wafer fabs.

The OPTIGA™ TPM product line delivers certified hardware-rooted trust solutions targeting platform integrity, secure boot, and remote attestation in client, industrial, and IoT endpoints.

FAQ

What is the maximum SPI clock frequency supported by SLB9670VQ20FW785XUMA1?

The SLB9670VQ20FW785XUMA1 supports SPI clock frequencies up to 43 MHz, as specified in Infineon's datasheet Section 5.4. This rate enables full-speed command processing without throttling during high-throughput operations like bulk NV writes or PCR extensions. Host controllers must configure SPI Mode 0 (CPOL=0, CPHA=0) to maintain compatibility.

Does SLB9670VQ20FW785XUMA1 require external power management circuitry?

No external power management circuitry is required. The device autonomously enters low-power state after each SPI transaction and wakes instantly upon CS# assertion. Its 110 µA typical standby current is achieved through internal power gating, eliminating need for software-controlled sleep modes or external enable signals.

How many PCR registers does SLB9670VQ20FW785XUMA1 support, and what hash algorithms are available?

The SLB9670VQ20FW785XUMA1 provides 24 Platform Configuration Registers (PCRs), configurable for either SHA-1 or SHA-256 hashing per register. This dual-algorithm support enables migration from legacy SHA-1–based attestation to modern SHA-256 while maintaining backward compatibility with existing measurement logs.

Is Linux kernel support built-in for SLB9670VQ20FW785XUMA1, and which driver is used?

Yes, mainline Linux kernel (v4.14+) includes native support via the tpm_tis_spi driver. This driver handles SPI protocol framing, interrupt handling via PIRQ#, and automatic enumeration under /sys/class/tpm/, enabling immediate use of tpm2-tools without vendor-specific modules or patches.

SLB9670VQ20FW785XUMA1 Specifications

Product attributes: Attribute value

Manufacturer:: Infineon Technologies

Series:: OPTIGA™ TPM

Package/Case:: 32-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Programmable:: Not Verified

Applications:: Trusted Platform Module (TPM)

Core Processor:: 16-Bit

Program Memory Type:: NVM (6.8kB)

Controller Series:: -

RAM Size:: -

Interface:: SPI

Number of I/O:: 1

Voltage - Supply:: 1.65V ~ 1.98V, 3V ~ 3.6V

Operating Temperature:: -20°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: PG-VQFN-32-13

SLB9670VQ20FW785XUMA1 FAQ

1.How can I place an order for SLB9670VQ20FW785XUMA1 through Aetrix?

Please submit a Request for Quotation (RFQ) for SLB9670VQ20FW785XUMA1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SLB9670VQ20FW785XUMA1 reliable?

The price and inventory of SLB9670VQ20FW785XUMA1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SLB9670VQ20FW785XUMA1 is usually 5 days.

3.What payment methods are accepted for SLB9670VQ20FW785XUMA1?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SLB9670VQ20FW785XUMA1 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SLB9670VQ20FW785XUMA1?

SLB9670VQ20FW785XUMA1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SLB9670VQ20FW785XUMA1 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SLB9670VQ20FW785XUMA1?

For technical support, including SLB9670VQ20FW785XUMA1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SLB9670VQ20FW785XUMA1 requirements.

6.How does Aetrix verify that SLB9670VQ20FW785XUMA1 is sourced from the original manufacturer or authorized distributors?

All SLB9670VQ20FW785XUMA1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SLB9670VQ20FW785XUMA1 meets industry standards.

7.What is the process for return or replacement of SLB9670VQ20FW785XUMA1?

All SLB9670VQ20FW785XUMA1 units undergo pre-shipment inspection (PSI). If there is an issue with SLB9670VQ20FW785XUMA1, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SLB9670VQ20FW785XUMA1 part is unused and in its original packaging.

Return procedure for SLB9670VQ20FW785XUMA1:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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