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Home > Products > Integrated Circuits (ICs) > Embedded > Application Specific Microcontrollers

Infineon Technologies SLB9670XQ20FW760XUMA1

Name: SLB9670XQ20FW760XUMA1
Brand: Infineon Technologies
SKU: SLB9670XQ20FW760XUMA1
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SLB9670XQ20FW760XUMA1

Manufacturer:: Infineon Technologies

Category:: Application Specific Microcontrollers

Package:: 32-VFQFN Exposed Pad

Datasheet:: SLB9670XQ20FW760XUMA1.pdf

Description:: SECURITY IC'S/AUTHENTICATION IC'

Quantity:: RFQ Add To RFQ list

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Inventory:2,189

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Product details

Overview

SLB9670XQ20FW760XUMA1 from Infineon is a TPM 2.0 Trusted Platform Module implementing TCG family 2.0 specifications, housed in a PG-VQFN-32-13 package, supporting SPI interface up to 43 MHz, FIPS 140-2 Level 2 validated (Cert. #3492), and operating across -40°C to +85°C for industrial edge and embedded security applications.

For engineers reviewing the SLB9670XQ20FW760XUMA1 datasheet, SLB9670XQ20FW760XUMA1 pinout, SLB9670XQ20FW760XUMA1 application, or SLB9670XQ20FW760XUMA1 equivalent, key selection criteria include SPI timing compliance, low standby current (110 µA), 24 PCR registers with SHA-1/SHA-256 support, 6962+ bytes of free NV memory, and CC EAL4+ certification status.

Technical Context

The SLB9670XQ20FW760XUMA1 implements a hardware-rooted, tamper-resistant security subsystem compliant with ISO/IEC 11889 and TCG TPM 2.0 architecture. It integrates a certified RNG per NIST SP800-90A, supports Endorsement Key personalization, and enforces secure boot attestation via 24 PCRs.

Power management is fully autonomous: the device transitions to ultra-low-power state (110 µA typ.) after each SPI transaction and wakes instantly on CS# assertion. All I/O pins adhere to SPI Mode 0 timing, with RST# and PIRQ# supporting active-low reset and interrupt signaling respectively.

Key Specifications

Parameter	Value and Actual Design Meaning
TPM Specification	TCG TPM 2.0 Main Specification - defines cryptographic service model, command/response protocol, and platform binding behavior.
Security Certification	FIPS 140-2 Level 2 (Cert. #3492, 16 Jul 2019) - validates cryptographic module integrity, physical security, and key management robustness.
SPI Interface	Mode 0, up to 43 MHz - ensures deterministic timing alignment with Intel TXT and Windows SRTM requirements.
Operating Temperature	-40°C to +85°C - enables deployment in industrial gateways, automotive telematics, and outdoor edge nodes without thermal derating.
Standby Current	110 µA typical - extends battery life in always-on security modules for portable or remote IoT endpoints.
NV Memory Capacity	≥6962 bytes free - accommodates multiple persistent keys, certificates, and policy objects without external flash dependency.
PCR Count	24 registers (SHA-1 or SHA-256) - supports layered measurement chains for UEFI Secure Boot, OS kernel integrity, and firmware update verification.

Pinout & Package

SLB9670XQ20FW760XUMA1 uses the PG-VQFN-32-13 package: 5 mm × 5 mm body, 0.5 mm pitch, exposed thermal pad, 32-pin quad flat no-lead construction optimized for high-density PCB layouts and thermal reliability.

Pin/Terminal	Circuit Role	Design Meaning
20 (CS#)	Chip Select Input	Active-low SPI enable; must be asserted before SCLK edge to initiate command sequence.
19 (SCLK)	SPI Clock Input	Mode 0 clock (CPOL=0, CPHA=0); max 43 MHz - sets upper bound for command throughput and latency.
21 (MOSI)	Master Output Slave Input	Receives TPM commands and parameters; requires Schmitt-trigger input for noise immunity on host bus.
24 (MISO)	Master Input Slave Output	Tri-state output delivering responses; driven only during CS# active; supports shared bus topology.
18 (PIRQ#)	Interrupt Request Output	Open-drain active-low signal indicating pending asynchronous events (e.g., policy violation, key generation completion).
17 (RST#)	Reset Input	Hardware reset trigger; weak internal pull-up ensures defined state at power-up; synchronous with PCIRST# in x86 platforms.
6 (GPIO)	General Purpose I/O	Tri-state; unused in TPM 2.0 mode; may be left floating with internal pull-up - no functional impact on core security services.
7 (PP)	Physical Presence Input	Active-low; internal pulldown; reserved for future TPM provisioning workflows - not required for standard operation.
8, 22 (VDD)	Power Supply	3.3 V ±10% supply pins; each requires local 100 nF bypass capacitor to GND for stable crypto engine operation.
2, 9, 23, 32 (GND)	Ground	Dedicated ground connections; mandatory for reference stability and EMI suppression in secure boot paths.

Key Features

Feature	Design Value
FIPS 140-2 Level 2 Validation	Certified cryptographic module enabling government and regulated-sector deployments without additional validation overhead.
CC EAL4+ Certification	Common Criteria assurance level confirming resistance to side-channel and fault injection attacks in real-world usage.
Autonomous Power Management	No software-controlled sleep modes required - automatic entry/exit from 110 µA standby reduces firmware complexity and attack surface.
24 SHA-1/SHA-256 PCRs	Enables hierarchical trust chain extension from firmware to hypervisor to guest OS, meeting Microsoft Pluton and Chromebook requirements.
Linux Kernel Integration	Built-in driver support (tpm_tis_spi) eliminates BSP porting effort for ARM/x86 embedded Linux systems.

Applications

Secure Boot Server

Industrial Edge Gateway

Use Scenario: Data center rack servers performing measured boot with UEFI firmware, OS loader, and container runtime verification.

IC Role / Device Role / Timing Role: Root-of-trust anchor storing PCR values and signing attestation reports for remote verification.

Use Value: Enables zero-touch provisioning and automated compliance auditing via TPM-signed quotes containing SHA-256 PCR digests.

Use Scenario: Factory-floor gateway aggregating PLC, sensor, and HMI data before transmission to cloud analytics.

IC Role / Device Role / Timing Role: Hardware-secured key vault and secure boot coordinator ensuring firmware integrity before runtime execution.

Use Value: Prevents unauthorized firmware updates and establishes cryptographically verifiable device identity for TLS mutual authentication.

Automotive Telematics Unit

Medical Imaging Workstation

Use Scenario: In-vehicle infotainment (IVI) system requiring secure OTA updates and driver authentication.

IC Role / Device Role / Timing Role: TPM 2.0 endpoint validating signed firmware packages and enforcing secure boot policies during cold start.

Use Value: Meets ISO/SAE 21434 cybersecurity process requirements by providing immutable audit logs and protected key storage.

Use Scenario: DICOM-compliant imaging console handling HIPAA-sensitive patient scans and diagnostic AI models.

IC Role / Device Role / Timing Role: Cryptographic service provider generating ephemeral keys for encrypted DICOM transfer and protecting PACS access credentials.

Use Value: Ensures encryption keys never leave the tamper-resistant boundary, satisfying FDA 21 CFR Part 11 electronic record integrity mandates.

Equivalent & Alternatives

The following parts are listed as comparable options for similar TPM 2.0 security module applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SLB9670VQ20FW760XUMA1	Standard temperature range (-20°C to +85°C); identical pinout and firmware feature set.	Targeted at commercial desktop/laptop platforms where ambient thermal conditions are controlled.	Select when cost sensitivity outweighs extended thermal margin and industrial qualification is not required.
Infineon OPTIGA™ TPM SLB9672	Supports I²C interface (in addition to SPI); higher NV memory (≥10 kB); enhanced side-channel resistance.	Preferred for space-constrained designs needing dual-interface flexibility or higher attestation payload capacity.	Choose when I²C integration simplifies host SoC connectivity or when larger PCR/event log storage is mandated by regulatory scope.

Compared with SLB9670VQ20FW760XUMA1, the XQ variant adds -40°C operational capability critical for uncontrolled environments, while SLB9672 introduces I²C support and expanded NV space-making it suitable for next-gen medical or automotive platforms requiring interface redundancy and deeper attestation logging.

Availability

SLB9670XQ20FW760XUMA1 is available at Aetrix Electronics and suitable for secure boot servers, industrial edge gateways, automotive telematics units, and medical imaging workstations requiring stable component supply, long-term lifecycle support, and traceable sourcing for regulated deployments.

Supply support for SLB9670XQ20FW760XUMA1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies AG is a German semiconductor manufacturer specializing in power management, automotive microcontrollers, and hardware security solutions, with global R&D and manufacturing infrastructure.

SLB9670XQ20FW760XUMA1 belongs to the OPTIGA™ TPM product line, designed specifically to deliver certified, standards-compliant hardware root-of-trust for embedded platforms requiring FIPS, Common Criteria, and TCG conformance.

FAQ

What is the maximum SPI clock frequency supported by SLB9670XQ20FW760XUMA1?

The device supports SPI Mode 0 up to 43 MHz, as verified in Section 5.4 AC Characteristics of the datasheet. This frequency enables sub-millisecond command response times for PCR extend and quote operations, meeting Intel TXT and Windows SRTM latency targets without requiring clock stretching or retries.

Does SLB9670XQ20FW760XUMA1 require external reset circuitry?

No external reset circuitry is required: pin 17 (RST#) has a weak internal pull-up resistor, ensuring a defined high state at power-up. The pin is intended to connect directly to the host's PCIRST# signal for synchronized hardware reset, eliminating need for RC networks or supervisors.

How is the Endorsement Key (EK) provisioned on SLB9670XQ20FW760XUMA1?

The EK is factory-provisioned and fused during manufacturing; each unit ships with a unique, non-exportable RSA 2048-bit EK and corresponding X.509 certificate signed by Infineon's Certificate Authority. No customer-side key generation or injection is needed - full personalization occurs out-of-box.

Can GPIO (pin 6) and PP (pin 7) be omitted from the PCB layout?

Yes - both pins are unused in TPM 2.0 operation. Pin 6 (GPIO) has an internal pull-up and may be left floating; pin 7 (PP) has an internal pulldown and similarly requires no external connection. Omitting them reduces routing complexity without affecting cryptographic functionality or certification compliance.

SLB9670XQ20FW760XUMA1 Specifications

Product attributes: Attribute value

Manufacturer:: Infineon Technologies

Series:: OPTIGA™ TPM

Package/Case:: 32-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Programmable:: Not Verified

Applications:: Trusted Platform Module (TPM)

Core Processor:: 16-Bit

Program Memory Type:: NVM (6.8kB)

Controller Series:: -

RAM Size:: -

Interface:: SPI

Number of I/O:: 1

Voltage - Supply:: 1.65V ~ 3.6V

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: PG-VQFN-32-13

SLB9670XQ20FW760XUMA1 FAQ

1.How can I place an order for SLB9670XQ20FW760XUMA1 through Aetrix?

Please submit a Request for Quotation (RFQ) for SLB9670XQ20FW760XUMA1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SLB9670XQ20FW760XUMA1 reliable?

The price and inventory of SLB9670XQ20FW760XUMA1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SLB9670XQ20FW760XUMA1 is usually 5 days.

3.What payment methods are accepted for SLB9670XQ20FW760XUMA1?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SLB9670XQ20FW760XUMA1 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SLB9670XQ20FW760XUMA1?

SLB9670XQ20FW760XUMA1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SLB9670XQ20FW760XUMA1 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SLB9670XQ20FW760XUMA1?

For technical support, including SLB9670XQ20FW760XUMA1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SLB9670XQ20FW760XUMA1 requirements.

6.How does Aetrix verify that SLB9670XQ20FW760XUMA1 is sourced from the original manufacturer or authorized distributors?

All SLB9670XQ20FW760XUMA1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SLB9670XQ20FW760XUMA1 meets industry standards.

7.What is the process for return or replacement of SLB9670XQ20FW760XUMA1?

All SLB9670XQ20FW760XUMA1 units undergo pre-shipment inspection (PSI). If there is an issue with SLB9670XQ20FW760XUMA1, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SLB9670XQ20FW760XUMA1 part is unused and in its original packaging.

Return procedure for SLB9670XQ20FW760XUMA1:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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