STMicroelectronics ST72F321BR6T6
- Part No.:
- ST72F321BR6T6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
ST72F321BR6T6.pdf
- Description:
- IC MCU 8BIT 32KB FLASH 64LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,580
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ST72F321BR6T6 from STMicroelectronics is a 64-pin LQFP 8-bit microcontroller featuring 32KB Flash/ROM, 1KB RAM, 10-bit ADC with 16 input channels, five timers (including PWM auto-reload and dual 16-bit), and three serial interfaces (SPI, SCI, I²C). It operates from 3.8V to 5.5V across –40°C to +125°C and targets industrial motor control, sensor interface modules, and embedded power management systems.
For engineers reviewing the ST72F321BR6T6 datasheet, ST72F321BR6T6 pinout, ST72F321BR6T6 application, or ST72F321BR6T6 equivalent, this MCU delivers deterministic real-time control with nested interrupts, in-application programming support, low-voltage supervisor with AVD, and four power-saving modes - critical for battery-backed or thermally constrained designs.
Technical Context
The ST72F321BR6T6 implements an enhanced ST7 core with 63 basic instructions and 17 addressing modes, including 8×8 unsigned multiply. Its clock system integrates crystal/RC oscillators, bypass mode, and a PLL for 2× frequency multiplication - enabling precise timing for synchronous peripherals like SPI and SCI.
Interrupt handling uses a nested controller with 14 vectors plus TRAP/RESET and supports up to 15 external interrupt lines across four vectors. The device includes dedicated hardware blocks for real-time base generation, beep tone synthesis, watchdog timeout configuration, and event-triggered ADC sampling - all accessible via memory-mapped registers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | ST7 8-bit CISC CPU with 63 instructions and 17 addressing modes - enables compact firmware and predictable interrupt latency. |
| Flash Memory | 32KB HDFlash with read-out protection and 100-cycle endurance - supports secure field updates via IAP/ICP. |
| RAM Size | 1024 bytes (1KB) with 256-byte stack - sufficient for real-time task stacks and peripheral buffers in small-footprint control apps. |
| ADC Resolution | 10-bit SAR ADC with up to 16 input channels - provides ±1 LSB INL for precision analog sensing in motor feedback or environmental monitoring. |
| Timers | Five independent timers: main clock controller (RTC/beep), configurable WDG, two 16-bit (input capture/output compare/PWM), and 8-bit ART (4 PWM outputs) - enables multi-channel motor commutation and time-critical event sequencing. |
| Serial Interfaces | SPI (master/slave), SCI (asynchronous UART), and I²C multimaster - allows concurrent communication with sensors, displays, and host controllers without software bit-banging. |
| Supply Range | 3.8V to 5.5V operating voltage with LVD/AVD detectors - ensures robust operation in noisy industrial rails and enables brown-out recovery with interrupt notification. |
Pinout & Package
LQFP64 (10 × 10 mm, 0.5 mm pitch) package with exposed thermal pad - optimized for industrial PCB layouts requiring mechanical stability and thermal dissipation under continuous 125°C ambient conditions.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Power supply and ground | Dual power domains: VDD powers core/peripherals; VSS provides low-impedance return path for noise-sensitive analog/digital sections. |
| OSCIN/OSCOUT | Crystal oscillator input/output | Supports 1–16 MHz quartz or ceramic resonator - enables accurate timing for SCI baud generation and RTC calibration. |
| PA0–PA7, PB0–PB7, PC0–PC7, PD0–PD7, PE0–PE7 | General-purpose I/O ports | 48 total bidirectional pins with alternate functions (e.g., TIM1_CH1, SPI_MOSI, SCI_TX); 16 support high-sink (20 mA) for direct LED/relay drive. |
| TLI | Top Level Interrupt input | Non-maskable interrupt source for emergency shutdown or safety-critical event capture - triggers highest-priority vector regardless of current mask state. |
| BOOT | Boot mode selection | Pulled low at reset to enter bootloader mode for in-circuit programming - eliminates need for external programming hardware during production. |
Key Features
| Feature | Design Value |
|---|---|
| In-Application Programming (IAP) | Enables firmware updates over SCI/SPI while running - critical for remote field upgrades without system downtime. |
| Enhanced Low Voltage Supervisor (LVD) | Detects VDD drop below programmable threshold (e.g., 4.0V) and asserts interrupt before logic corruption - prevents erratic behavior in unstable power environments. |
| Four Power-Saving Modes | Halt (CPU stopped, peripherals active), Active-Halt (CPU halted, RAM retained), Wait (clock gated, wake on interrupt), Slow (reduced internal clock) - extends battery life in portable instrumentation. |
| Real-Time Clock & Beeper Controller | Integrated RTC timer with calendar capability and programmable beep generator - eliminates external timing ICs in HMI or alarm applications. |
| Nested Interrupt Controller | 14 priority-level vectors with automatic context save/restore - guarantees sub-2 µs latency for time-critical ISR execution in motor control loops. |
Applications
| Industrial Motor Control | Sensor Interface Module |
|---|---|
Use Scenario: Closed-loop speed regulation of 3-phase BLDC motors using hall-effect feedback and six-step commutation. IC Role / Device Role / Timing Role: Real-time execution of commutation logic, PWM generation (via ART and 16-bit timers), and ADC sampling of current/voltage feedback at 10 kHz. Use Value: Deterministic 1.2 µs interrupt response and synchronized PWM dead-time insertion ensure reliable torque delivery and prevent shoot-through faults. |
Use Scenario: Multi-sensor data aggregation (temperature, humidity, pressure) with local preprocessing before transmission via RS-485. IC Role / Device Role / Timing Role: ADC acquisition sequencer, SCI UART framing, and SPI interface to digital sensors - coordinated by main clock controller's real-time base. Use Value: Single-chip integration reduces BOM count by 3 components and eliminates external level-shifting for 5V-tolerant sensor I/O. |
| Embedded Power Management | Thermal Monitoring System |
Use Scenario: AC/DC PSU supervision with overvoltage, overcurrent, and overtemperature protection logic. IC Role / Device Role / Timing Role: High-sink GPIO drives MOSFET gate drivers; LVD/AVD monitors auxiliary rails; WDG enforces fail-safe shutdown sequence. Use Value: Hardware-based voltage detection with interrupt-on-threshold-crossing reduces software polling overhead and improves fault reaction time to <10 µs. |
Use Scenario: Distributed temperature logging in HVAC ducts using thermistor networks and local LCD display. IC Role / Device Role / Timing Role: 10-bit ADC digitizes ratiometric thermistor readings; SCI transmits data to central controller; built-in beeper alerts on threshold breach. Use Value: Integrated reference voltage and programmable ADC sampling rate (up to 1 MSPS) deliver ±0.5°C measurement accuracy without external precision references. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM8S003F3P6 | 32MHz max CPU, 8KB Flash, no LQFP64 option (only TSSOP20), lacks AVD and TLI pin | Lower I/O count (16 pins), no high-sink outputs, limited timer resources - suitable only for simpler sensor nodes | Select when cost sensitivity outweighs need for industrial-grade voltage monitoring and 48 I/O scalability. |
| EFM8BB10F8G-A-QFN20 | 8051 core, 8KB Flash, 512B RAM, 12-bit ADC, but only 20-pin QFN, no SCI/I²C combo | No native asynchronous UART; requires software emulation for full-duplex SCI - increases firmware complexity and timing jitter | Prefer only if footprint minimization is absolute priority and peripheral flexibility can be sacrificed for size reduction. |
Compared with STM8S003F3P6 and EFM8BB10F8G-A-QFN20, the ST72F321BR6T6 uniquely combines 64-pin expandability, hardware-assisted SCI/I²C coexistence, and industrial-grade voltage supervision - making it irreplaceable in designs requiring simultaneous high I/O density, mixed-signal integrity, and fail-safe power management.
Availability
ST72F321BR6T6 is available at Aetrix Electronics and suitable for industrial motor control, sensor interface modules, and embedded power management systems requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for ST72F321BR6T6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in microcontrollers, power management, and automotive ICs with vertical manufacturing and broad industrial qualification.
The ST7 family was designed specifically for cost-sensitive, high-reliability 8-bit control applications in harsh environments - emphasizing robustness, low-power operation, and integrated analog/mixed-signal peripherals without external support components.
FAQ
Does ST72F321BR6T6 support in-circuit debugging via SWIM interface?
Yes, the ST72F321BR6T6 supports single-wire interface module (SWIM) debugging using ST-LINK/V2 or compatible tools. SWIM enables full-speed execution control, register inspection, and flash memory read/write during development - all through a single dedicated pin (SWIM) without requiring additional debug headers or JTAG pins.
What is the maximum ADC sampling rate and how is it synchronized with timers?
The ST72F321BR6T6 ADC achieves up to 1 MSPS conversion rate when triggered by internal timer events. It supports hardware synchronization via the 16-bit timer's output compare signal, allowing precise, jitter-free sampling aligned to motor commutation edges or PWM periods - critical for current reconstruction in FOC algorithms.
Can the PLL be used to generate clocks for both CPU and peripheral domains independently?
No, the PLL output feeds a single system clock tree that distributes to CPU, timers, and serial peripherals. However, individual prescalers allow independent clock division: CPU clock is programmable via MCC register, while SPI/SCI baud rates derive from separate dividers - enabling concurrent high-speed CPU operation and stable serial communication.
Is the BOOT pin internally pulled up, and what happens if left floating during reset?
Yes, the BOOT pin has an internal weak pull-up. If left floating during reset, it defaults to logic high, causing the device to execute from user Flash memory. To enter bootloader mode, BOOT must be actively driven low externally - typically via a resistor network or microcontroller GPIO during programming sequences.
ST72F321BR6T6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 64-LQFP
- Series:
- ST7
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- ST7
- Core Size:
- 8-Bit
- Speed:
- 8MHz
- Connectivity:
- I2C, SCI, SPI
- Peripherals:
- LVD, POR, PWM, WDT
- Number of I/O:
- 48
- Program Memory Size:
- 32KB (32K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 1K x 8
- Voltage - Supply (Vcc/Vdd):
- 3.8V ~ 5.5V
- Data Converters:
- A/D 16x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
ST72F321BR6T6 FAQ
1.How can I place an order for ST72F321BR6T6 through Aetrix?
Please submit a Request for Quotation (RFQ) for ST72F321BR6T6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ST72F321BR6T6 reliable?
The price and inventory of ST72F321BR6T6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ST72F321BR6T6 is usually 5 days.
3.What payment methods are accepted for ST72F321BR6T6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ST72F321BR6T6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ST72F321BR6T6?
ST72F321BR6T6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ST72F321BR6T6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ST72F321BR6T6?
For technical support, including ST72F321BR6T6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ST72F321BR6T6 requirements.
6.How does Aetrix verify that ST72F321BR6T6 is sourced from the original manufacturer or authorized distributors?
All ST72F321BR6T6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ST72F321BR6T6 meets industry standards.
7.What is the process for return or replacement of ST72F321BR6T6?
All ST72F321BR6T6 units undergo pre-shipment inspection (PSI). If there is an issue with ST72F321BR6T6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ST72F321BR6T6 part is unused and in its original packaging.
Return procedure for ST72F321BR6T6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ST72F321BR6T6 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

