STMicroelectronics STM32G0B1CEU7TR
- Part No.:
- STM32G0B1CEU7TR
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 48-UFQFN Exposed Pad
- Datasheet:
-
STM32G0B1CEU7TR.pdf
- Description:
- IC MCU 32BIT 512KB FLSH 48UFQFPN
- Quantity:
- Payment:

- Shipping:

Inventory:3,322
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32G0B1CEU7TR from STMicroelectronics is a 32-bit Arm® Cortex®-M0+ microcontroller with 512 KB flash, 144 KB SRAM, dual 12-bit DACs, two FDCAN controllers, and USB Type-C™ Power Delivery controller-designed for compact industrial control, smart power adapters, and USB-C PD sink applications requiring high integration and low-power operation.
For engineers reviewing the STM32G0B1CEU7TR datasheet, STM32G0B1CEU7TR pinout, STM32G0B1CEU7TR application, or STM32G0B1CEU7TR equivalent, key selection criteria include its 512 KB dual-bank flash with read-while-write, 128 KB SRAM with hardware parity, 94 fast I/Os (including 5 V-tolerant), crystal-less USB FS, and -40°C to 125°C extended temperature grade in UFQFPN48 package.
Technical Context
This MCU integrates an Arm Cortex-M0+ core running up to 64 MHz with MPU, dual-bank flash supporting secure firmware updates, and a comprehensive analog subsystem including two rail-to-rail 12-bit DACs, three low-power comparators, and a 12-bit ADC with 0.4 µs conversion time and hardware oversampling up to 16-bit resolution.
Its communication stack includes six USARTs (three with ISO7816/LIN/IrDA), three I²C interfaces (two with SMBus/PMBus and Stop-mode wakeup), three SPIs (32 Mbit/s), HDMI CEC, USB 2.0 FS device/host, and two FDCAN controllers-all supported by a 12-channel DMA with flexible mapping and serial wire debug (SWD).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | Arm Cortex-M0+, 64 MHz max - enables deterministic real-time control with low latency interrupt response. |
| Flash Memory | 512 KB, dual-bank, read-while-write - supports seamless firmware updates without halting execution. |
| SRAM | 144 KB total (128 KB with HW parity) - provides robust data integrity for safety-critical variables and buffers. |
| ADC | 12-bit, 0.4 µs conversion, up to 16 external channels - delivers fast, precise sensor acquisition for closed-loop systems. |
| DAC | Two 12-bit DACs with sample-and-hold - enables simultaneous analog output generation for control signals or calibration references. |
| FDCAN | Two controllers compliant with ISO 11898-1:2015 - supports redundant or multi-node CAN FD networks in automotive and industrial gateways. |
| USB | USB 2.0 FS device/host + USB Type-C™ PD controller - eliminates need for external PD PHY in compact USB-C power delivery designs. |
| Operating Temp | -40°C to +125°C - qualified for under-hood automotive, industrial motor drives, and high-ambient power electronics. |
Pinout & Package
STM32G0B1CEU7TR is housed in a 48-pin UFQFPN (7 × 7 mm, 0.5 mm pitch) package, RoHS-compliant and ECOPACK2 certified. Pin functions are validated per ST's DS13560 Rev 6, Section 4 ("Pinouts, pin description and alternate functions").
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Main power supply and ground | 1.7–3.6 V core voltage; separate VDDA/VSSA pins ensure clean analog domain for ADC/DAC. |
| PA0–PA15, PB0–PB15, PC0–PC15, PD0–PD15, PE0–PE15, PF0–PF1 | General-purpose I/Os | Up to 94 fast I/Os; multiple 5 V-tolerant pins enable direct interfacing with legacy logic or sensors. |
| PA2/PA3, PB10/PB11, PC10/PC11 | USART TX/RX | Three full-featured USARTs support LIN, IrDA, ISO7816, auto baud rate detection, and Stop-mode wakeup. |
| PA11/PA12 | USB DM/DP | Crystal-less USB 2.0 FS interface - reduces BOM cost and board space vs. external oscillator. |
| PD0/PD1 | FDCAN1 RX/TX | Dedicated differential CAN FD transceiver interface with integrated bus protection logic. |
| PE5/PE6 | FDCAN2 RX/TX | Second independent CAN FD channel for redundancy or multi-network topology. |
| PA4–PA7 | DAC1_OUT1–DAC1_OUT4 | Four DAC outputs (two internal, two external) support simultaneous analog waveform generation or trimming. |
Key Features
| Feature | Design Value |
|---|---|
| Secure Boot & ROP | Readout protection (ROP) levels and securable flash area prevent unauthorized firmware extraction or tampering. |
| Low-Power Modes | Sleep, Stop, Standby, and Shutdown modes with sub-μA current draw - extends battery life in portable USB-C devices. |
| Clock Flexibility | Multiple sources: 4–48 MHz HSE, 32 kHz LSE with calibration, 16 MHz HSI (±1%), 48 MHz HSI48, 32 kHz LSI (±5%) - simplifies timing design across diverse system clocks. |
| RTC with Calendar | Hardware calendar RTC with alarm and periodic wakeup from Stop/Standby/Shutdown - enables time-triggered scheduling without external RTC IC. |
| Debug Interface | Serial Wire Debug (SWD) only - minimal 2-pin debug footprint preserves I/O count for space-constrained designs. |
| Unique ID | 96-bit factory-programmed unique identifier - supports device authentication, secure provisioning, and license binding. |
Applications
| Industrial Motor Control | Smart USB-C Power Adapter |
|---|---|
Use Scenario: Closed-loop speed/position control of BLDC motors in HVAC blowers or pumps using PWM, ADC feedback, and FDCAN diagnostics. IC Role / Device Role / Timing Role: Main system controller executing motor algorithms, managing gate drivers via timers, and communicating status over FDCAN. Use Value: Dual FDCAN controllers enable real-time motor telemetry and fault reporting; 128 KB SRAM with parity ensures reliable state storage during transient faults. | Use Scenario: USB-C PD sink implementation in laptop chargers or multi-port adapters negotiating voltage/current with source using USB PD 3.0. IC Role / Device Role / Timing Role: USB Type-C PD controller + system manager handling CC logic, VBUS monitoring, and policy engine execution. Use Value: Integrated USB PD controller eliminates external PD PHY; crystal-less USB FS reduces component count and layout complexity. |
| Programmable Logic Controller (PLC) I/O Module | Energy Metering Gateway |
Use Scenario: DIN-rail mounted I/O expansion module collecting digital inputs, analog sensor data, and driving relays/LEDs in factory automation. IC Role / Device Role / Timing Role: Central processing unit interfacing with isolated I/O via SPI/USART, performing local logic, and reporting via RS-485 or CAN. Use Value: 94 fast I/Os with 5 V tolerance simplify direct connection to industrial sensors; 512 KB flash accommodates field-upgradable ladder logic firmware. | Use Scenario: Smart meter concentrator aggregating consumption data from sub-meters via FDCAN or RS-485, then transmitting via cellular or LoRaWAN. IC Role / Device Role / Timing Role: Data aggregation hub with dual FDCAN for legacy meter interfaces and USB host for firmware updates or diagnostics. Use Value: Two FDCAN controllers allow concurrent communication with upstream/downstream meters; USB host mode enables plug-in configuration tools. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32G0B1RET6 | LQFP64 package (10 × 10 mm); same core, memory, peripherals - but larger footprint and higher pin count. | Better suited for prototyping or designs requiring more GPIOs, additional timers, or easier routing. | Select when board space allows larger package and extra I/Os are needed for expansion or test points. |
| STM32G0C1REY6TR | Same UFQFPN48 package; adds 1 MB flash and 192 KB SRAM - no change in peripheral set or clock specs. | Ideal for future-proofing firmware size or adding secure boot layers without altering PCB layout. | Choose when firmware growth or enhanced security features (e.g., secure firmware update) justify higher memory density. |
Compared with STM32G0B1CEU7TR, the LQFP64 variant offers greater I/O flexibility at the cost of board area, while the G0C1 variant delivers scalable memory headroom within identical mechanical constraints-enabling either layout reuse or feature expansion without redesign.
Availability
STM32G0B1CEU7TR is available at Aetrix Electronics and suitable for industrial motor control, smart USB-C power adapters, and energy metering gateways requiring stable component supply, long-term lifecycle assurance, and extended temperature qualification.
Supply support for STM32G0B1CEU7TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in microcontrollers, power management, sensors, and automotive ICs.
The STM32G0 series targets cost-sensitive, low-power, high-integration applications-including USB-C PD, industrial I/O, and smart consumer devices-with emphasis on security, analog capability, and simplified development.
FAQ
What is the maximum operating temperature rating for STM32G0B1CEU7TR?
The STM32G0B1CEU7TR is rated for operation from -40°C to +125°C, meeting extended industrial and automotive under-hood requirements. This rating is verified per ST's DS13560 Rev 6, Section 5.3.1, and applies to the UFQFPN48 package with specified thermal derating conditions.
Does STM32G0B1CEU7TR support crystal-less USB Full-Speed operation?
Yes, STM32G0B1CEU7TR integrates a 48 MHz HSI48 RC oscillator qualified for crystal-less USB 2.0 Full-Speed device operation. It meets USB specification timing jitter requirements without external crystal, reducing BOM cost and board area as confirmed in DS13560 Rev 6, Section 3.9 and Table 45.
How many FDCAN controllers does STM32G0B1CEU7TR include, and what standard do they comply with?
STM32G0B1CEU7TR includes two fully independent FDCAN controllers compliant with ISO 11898-1:2015 (CAN FD). Each supports bit rates up to 5 Mbit/s, programmable data field length (up to 64 bytes), and flexible message filtering - documented in DS13560 Rev 6, Section 3.26 and Table 2.
Is hardware parity checking available on all SRAM, and how is it implemented?
Hardware parity checking is applied to 128 KB of the 144 KB total SRAM (the remaining 16 KB lacks parity). Parity bits are generated and checked automatically on every access; uncorrectable errors trigger a HardFault exception. This is detailed in DS13560 Rev 6, Section 3.4 and Table 22.
STM32G0B1CEU7TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 48-UFQFN Exposed Pad
- Series:
- STM32G0
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M0+
- Core Size:
- 32-Bit
- Speed:
- 64MHz
- Connectivity:
- CANbus, HDMI-CEC, I2C, IrDA, LINbus, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, PWM, WDT
- Number of I/O:
- 44
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 144K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.7V ~ 3.6V
- Data Converters:
- A/D 17x12b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32G0B1CEU7TR FAQ
1.How can I place an order for STM32G0B1CEU7TR through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32G0B1CEU7TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32G0B1CEU7TR reliable?
The price and inventory of STM32G0B1CEU7TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32G0B1CEU7TR is usually 5 days.
3.What payment methods are accepted for STM32G0B1CEU7TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32G0B1CEU7TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32G0B1CEU7TR?
STM32G0B1CEU7TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32G0B1CEU7TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32G0B1CEU7TR?
For technical support, including STM32G0B1CEU7TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32G0B1CEU7TR requirements.
6.How does Aetrix verify that STM32G0B1CEU7TR is sourced from the original manufacturer or authorized distributors?
All STM32G0B1CEU7TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32G0B1CEU7TR meets industry standards.
7.What is the process for return or replacement of STM32G0B1CEU7TR?
All STM32G0B1CEU7TR units undergo pre-shipment inspection (PSI). If there is an issue with STM32G0B1CEU7TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32G0B1CEU7TR part is unused and in its original packaging.
Return procedure for STM32G0B1CEU7TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32G0B1CEU7TR Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

