STMicroelectronics STM32H533HEY6TR
- Part No.:
- STM32H533HEY6TR
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- -
- Datasheet:
-
STM32H533HEY6TR.pdf
- Description:
- IC MCU 32BIT 512KB FLASH 39WLCSP
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Product details
Overview
STM32H533HEY6TR from STMicroelectronics is a 32-bit Arm® Cortex®-M33 microcontroller with TrustZone® security, FPU, and 250 MHz max clock frequency. It integrates 512 Kbytes of ECC-protected flash, 272 Kbytes of SRAM (80 Kbytes with ECC), and hardware cryptographic accelerators including dual AES coprocessors and PSA Level 3-certified security. It targets secure industrial control, IoT edge nodes, and trusted firmware execution environments.
For engineers reviewing the STM32H533HEY6TR datasheet, STM32H533HEY6TR pinout, STM32H533HEY6TR application, or STM32H533HEY6TR equivalent, key selection criteria include TrustZone-enforced peripheral isolation, on-the-fly Octo-SPI memory decryption, 100 K-cycle data flash endurance, and dual 12-bit ADCs with 5 Msps sampling rate.
Technical Context
The device implements Armv8-M mainline security with configurable SAU regions and ST-iROT immutable root of trust. Its dual GPDMA controllers offload CPU for concurrent secure/non-secure data movement, while ART Accelerator includes 8-Kbyte instruction cache and 4-Kbyte data cache for zero-wait-state flash execution and external memory access.
Security architecture integrates SFI (Secure Firmware Installation), HUK-based secure data storage, and tamper detection. Clock system supports multiple internal oscillators (64 MHz HSI, 48 MHz HSI48, 32 kHz LSI) and external sources (4–50 MHz HSE, 32.768 kHz LSE), with dual PLLs for independent secure/non-secure domain clocking.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, 375 DMIPS @ 250 MHz - enables real-time deterministic execution in secure/non-secure worlds |
| Memory | 512 Kbytes flash (ECC, two banks, read-while-write), 272 Kbytes SRAM (80 Kbytes SRAM2 with ECC) - supports robust firmware updates and isolated secure data buffers |
| Crypto Acceleration | Dual AES coprocessors (one DPA-resistant), PKA, HASH (SHA-1/2/3), TRNG (NIST SP800-90B compliant) - hardware-accelerated TLS handshake and secure boot verification |
| Analog Peripherals | Two 12-bit ADCs (5 Msps), one 12-bit dual-channel DAC, digital temperature sensor - enables high-fidelity sensor fusion and closed-loop control |
| Communication | Three I2C (Fm+), two I3C, six USART/LPUART, four SPI/I2S, two FDCAN, USB 2.0 FS host/device, UCPD - supports multi-protocol industrial connectivity and secure charging |
| Package & Pin Count | WLCSP39 (2.76 × 2.78 mm, 0.4 mm pitch), 39-ball - ultra-compact footprint for space-constrained edge devices with 33 GPIOs (most 5 V-tolerant) |
Pinout & Package
STM32H533HEY6TR uses a 39-ball WLCSP (Wafer-Level Chip Scale Package) with 0.4 mm pitch, optimized for minimal PCB area and high-density routing. Ballout supports 33 general-purpose I/Os (most 5 V-tolerant), power/ground distribution across VDD/VSS pairs, and dedicated debug (SWDIO/SWCLK), reset (NRST), and boot configuration (BOOT0) terminals.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Power supply inputs | Separate domains for digital core (1.71–3.6 V), analog (1.71–3.6 V), and I/O (1.08–3.6 V) enable mixed-signal noise isolation and flexible voltage scaling |
| VSS, VSSA, VSSIO2 | Ground returns | Dedicated analog and I/O ground planes reduce coupling noise in precision ADC/DAC operation |
| PA0–PA15, PB0–PB15, PC0–PC7, PD2, PE0–PE1 | General-purpose I/Os | 33 GPIOs with interrupt capability; most support 5 V tolerance and independent 1.08 V supply for low-voltage interface compatibility |
| SWDIO, SWCLK | Debug interface | Authenticated Serial Wire Debug pins supporting secure debug lifecycle management and encrypted trace |
| NRST | Reset input | Active-low reset with internal pull-up; supports external reset supervision and tamper-triggered secure reset |
| BOOT0 | Boot mode select | Configures boot source (system memory, flash, or embedded SRAM); tied to secure life cycle state via TrustZone controller |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone-enforced peripheral isolation | Eight configurable SAU regions and GTZC controller enforce hardware-level memory/peripheral access control between secure/non-secure worlds |
| On-the-fly Octo-SPI decryption | OTFDEC engine decrypts external serial flash/NOR/PSRAM in real time using AES-128/256 - enables secure code execution from external memory without exposing plaintext |
| High-cycling data flash | 48 Kbytes per bank with 100 K write/erase cycles - suitable for logging, parameter storage, and OTA update staging in field-deployed devices |
| Secure firmware installation (SFI) | Immutable ST-iROT validates signed firmware images before loading, preventing unauthorized code execution at boot |
| Dual 12-bit ADC with interleaving | Two independent ADCs support simultaneous sampling and up to 5 Msps aggregate throughput - critical for motor control current sensing and multi-channel sensor acquisition |
Applications
| Industrial PLC Edge Node | Secure IoT Gateway |
|---|---|
Use Scenario: Compact programmable logic controller handling analog sensor inputs, PWM motor outputs, and Modbus TCP over Ethernet. IC Role / Device Role / Timing Role: Main application processor executing real-time control tasks, managing secure firmware updates, and isolating legacy protocol stacks in non-secure world while keeping crypto keys and boot logic in secure world. Use Value: Dual ADCs sample 4–20 mA loops at 100 kSPS; TrustZone prevents malicious firmware from accessing secure credential storage or altering safety-critical control parameters. | Use Scenario: Battery-powered wireless gateway aggregating BLE/Zigbee sensor data and forwarding to cloud via TLS-secured Wi-Fi or cellular. IC Role / Device Role / Timing Role: Secure anchor point for end-to-end encryption: handles certificate management, performs ECDH key exchange, and signs sensor payloads using PKA and TRNG. Use Value: PSA Level 3 certification and SESIP3 assurance validate resistance to side-channel and fault injection attacks during key derivation and signing operations. |
| Medical Wearable Sensor Hub | Smart Energy Meter |
Use Scenario: Ultra-low-power wearable collecting ECG, temperature, and motion data, transmitting via Bluetooth LE with encrypted payload integrity. IC Role / Device Role / Timing Role: Low-power MCU managing sensor fusion algorithms, secure BLE pairing, and tamper-detection via active tampers on battery and enclosure contacts. Use Value: LPTIM timers operate in Stop mode for precise wake-up scheduling; 2 Kbytes backup SRAM retains session keys across deep sleep; TRNG seeds BLE encryption keys with NIST-compliant entropy. | Use Scenario: Revenue-grade electricity meter with metrology ASIC interface, tamper-proof housing, and remote firmware update capability. IC Role / Device Role / Timing Role: Trusted execution environment validating signed firmware images, storing calibration constants in OTP, and enforcing secure boot chain from ROM loader to application. Use Value: 96-bit unique ID binds firmware to hardware; HUK-derived keys protect stored tariff tables; OTFDEC enables encrypted firmware storage in external NOR flash without exposing plaintext to physical attack. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32H563VIT6 | LQFP100 package, 100 MHz higher max CPU frequency (250 → 350 MHz), 1 Mbyte flash, 512 Kbyte RAM, adds Ethernet MAC and USB HS - larger footprint and higher power | Suitable for high-throughput gateways requiring Ethernet backhaul and richer peripheral set; not drop-in compatible due to pin count and package size | Select when needing >250 MHz performance, Ethernet, or >512 Kbyte RAM; avoid if board space or cost sensitivity favors WLCSP39 |
| NXP LPC55S69JBD100 | Cortex-M33 core, 150 MHz max, 640 Kbyte flash, 320 Kbyte RAM, no Octo-SPI, single AES accelerator, lacks PSA Level 3 certification | Lower-cost alternative for less demanding security use cases; no on-the-fly external memory decryption or dual ADC interleaving | Choose for cost-sensitive designs where PSA Level 3 and OTFDEC are not required; verify TRNG compliance against NIST SP800-90B independently |
Compared with STM32H533HEY6TR, STM32H563VIT6 offers higher compute headroom and Ethernet but requires PCB redesign; LPC55S69JBD100 reduces BOM cost but sacrifices certified security assurance, external memory encryption, and ADC throughput - making it unsuitable for revenue-grade or tamper-evident applications.
Availability
STM32H533HEY6TR is available at Aetrix Electronics and suitable for industrial PLC edge nodes, secure IoT gateways, medical wearable sensor hubs, and smart energy meters requiring stable component supply and long-term lifecycle support.
Supply support for STM32H533HEY6TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and automotive semiconductors.
The STM32H5 series is ST's flagship secure MCU line targeting PSA Level 3 and SESIP3-certified applications, built on Cortex-M33 with integrated TrustZone, cryptographic accelerators, and hardened life cycle management for mission-critical embedded systems.
FAQ
What is the maximum operating frequency and DMIPS rating of the STM32H533HEY6TR?
The STM32H533HEY6TR operates at up to 250 MHz and delivers 375 DMIPS (Dhrystone 2.1). This performance is achieved with the Arm Cortex-M33 core, FPU, and ART Accelerator's 8-Kbyte instruction cache enabling zero-wait-state execution from embedded flash. The 1.5 DMIPS/MHz efficiency reflects optimized pipeline utilization and cache hit rates in real-world firmware workloads.
Does the STM32H533HEY6TR support secure boot and firmware updates?
Yes. It implements Secure Firmware Installation (SFI) with an immutable ST-iROT root of trust, verified boot chain, and hardware-protected secure hide protection area (HDP). Firmware updates are validated using public-key cryptography via the DPA-resistant PKA, and encrypted images can be stored externally and decrypted on-the-fly by OTFDEC - ensuring confidentiality and integrity throughout the update process.
What are the key analog capabilities of this MCU?
The device integrates two independent 12-bit ADCs supporting up to 5 Msps aggregate sampling rate, a dual-channel 12-bit DAC, digital temperature sensor (DTS), analog temperature sensor, voltage reference buffer (VREFBUF), and VBAT monitoring. These peripherals enable high-precision sensor acquisition, closed-loop control actuation, and system health monitoring - all with configurable TrustZone protection for secure analog data paths.
Which package type and ball count does the STM32H533HEY6TR use?
The STM32H533HEY6TR uses a 39-ball WLCSP (Wafer-Level Chip Scale Package) with 2.76 × 2.78 mm body size and 0.4 mm pitch. This ultra-compact package provides 33 GPIOs (most 5 V-tolerant), dedicated power/ground balls, and SWD debug interface - ideal for space-constrained portable and wearable electronics where PCB area and thermal profile are critical constraints.
STM32H533HEY6TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- -
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
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- Core Size:
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- Peripherals:
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- Number of I/O:
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- EEPROM Size:
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STM32H533HEY6TR FAQ
1.How can I place an order for STM32H533HEY6TR through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32H533HEY6TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32H533HEY6TR reliable?
The price and inventory of STM32H533HEY6TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32H533HEY6TR is usually 5 days.
3.What payment methods are accepted for STM32H533HEY6TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32H533HEY6TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32H533HEY6TR?
STM32H533HEY6TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32H533HEY6TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32H533HEY6TR?
For technical support, including STM32H533HEY6TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32H533HEY6TR requirements.
6.How does Aetrix verify that STM32H533HEY6TR is sourced from the original manufacturer or authorized distributors?
All STM32H533HEY6TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32H533HEY6TR meets industry standards.
7.What is the process for return or replacement of STM32H533HEY6TR?
All STM32H533HEY6TR units undergo pre-shipment inspection (PSI). If there is an issue with STM32H533HEY6TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32H533HEY6TR part is unused and in its original packaging.
Return procedure for STM32H533HEY6TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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