STMicroelectronics STM32U535CBT6
- Part No.:
- STM32U535CBT6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
STM32U535CBT6.pdf
- Description:
- IC MCU 32BIT 128KB FLASH 48LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:3,318
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Product details
Overview
STM32U535CBT6 from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 microcontroller with TrustZone® security, 512 KB flash, 274 KB SRAM, and integrated FPU/MPU-designed for secure, battery-constrained IoT edge nodes requiring real-time sensor fusion, cryptographic operations, and sub-μA sleep modes. It delivers 240 DMIPS at up to 160 MHz, supports LPBAM autonomous peripheral operation down to Stop 2 mode, and integrates hardware accelerators including CORDIC, FMAC, HASH, and TRNG.
For engineers reviewing the STM32U535CBT6 datasheet, STM32U535CBT6 pinout, STM32U535CBT6 application, or STM32U535CBT6 equivalent, key selection criteria include TrustZone-enforced memory isolation, verified ULPMark™-CP score of 464, dual 14-/12-bit ADCs with Stop 2 autonomy, CAN FD + USB FS dual connectivity, and LQFP48 package compatibility with industrial temperature range (–40 °C to +85 °C).
Technical Context
The STM32U535CBT6 implements a dual-bank flash architecture with ECC and read-while-write capability, enabling secure over-the-air firmware updates without runtime interruption. Its FlexPowerControl system combines embedded SMPS and LDO regulators with dynamic voltage scaling and on-the-fly switching to optimize power across Run, Stop 2, and Shutdown modes.
TrustZone® is implemented at silicon level with Global TrustZone Controller (GTZC), enabling hardware-enforced separation of secure/non-secure worlds-including securable I/Os, memories, peripherals, and boot entry-and supports TF-M-based secure firmware upgrade via embedded Root-Secure Services (RSS) and Secure Firmware Installation (SFI).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone®, FPU, MPU, and DSP extensions-enables concurrent secure/non-secure execution and deterministic real-time control. |
| Max Clock Speed | 160 MHz with ART Accelerator (0-wait-state flash execution)-guarantees deterministic timing for time-critical tasks without cache misses. |
| Flash Memory | 512 KB with ECC and dual-bank RWW-supports atomic firmware updates and fault-tolerant storage in safety-critical applications. |
| SRAM | 274 KB total, including up to 64 KB with ECC enabled-provides robust data retention and error correction for mission-critical variables. |
| Low-Power Modes | 90 nA Shutdown, 370 nA Standby+RTC, 1.4 μA Stop 3 (16 KB SRAM retained)-enables multi-year battery life in wireless sensor nodes. |
| Analog Peripherals | 14-bit 2.5-Msps ADC (autonomous in Stop 2), dual 12-bit DACs, OPAMP with PGA, ultra-low-power comparator-supports high-fidelity sensor signal conditioning without waking CPU. |
| Security Features | Hardware TRNG (NIST SP800-90B compliant), HASH accelerator, 96-bit unique ID, 512-byte OTP, active tamper detection-meets PSA Level 3 and SESIP certification prerequisites. |
| Communication | 1 CAN FD, 1 USB FS (host/device), 4x I²C FM+, 5x USART/LPUART, 3x SPI, 1 SAI, SDMMC, OCTOSPI-enables heterogeneous interface aggregation in constrained-edge gateways. |
Pinout & Package
LQFP48 (7 × 7 mm, 0.5 mm pitch) package with exposed thermal pad; RoHS-compliant ECOPACK2 finish; rated for –40 °C to +85 °C ambient operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Core power supply and ground | Supports 1.71–3.6 V operation; decoupling required per datasheet layout guidelines to maintain low-noise analog performance. |
| VDDA, VSSA | Analog domain supply and ground | Independent analog rail enables precision ADC/DAC operation with reduced digital noise coupling. |
| PA0–PA15, PB0–PB15, PC0–PC15, PD0–PD15, PE0–PE7 | General-purpose I/Os | Up to 82 fast I/Os; most 5V-tolerant; 14 support independent 1.08–3.6 V supply for mixed-voltage interfacing. |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; compatible with external reset supervisors and push-button debouncing circuits. |
| BOOT0 | Boot mode selection | Configures boot source (system memory, flash, or SRAM); sampled at power-on reset and after exit from Standby/Shutdown. |
| VBAT | Backup domain supply | Supplies RTC, 32×32-bit backup registers, and 2 KB backup SRAM during main power loss-enables persistent timekeeping and state retention. |
| OSC_IN / OSC_OUT | External crystal oscillator interface | Supports 4–50 MHz crystals; used for high-accuracy system clock or USB timing reference. |
| LSE_IN / LSE_OUT | 32.768 kHz RTC crystal interface | Enables calendar-grade RTC accuracy and ultra-low-power wake-up timer functionality. |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM (Low-Power Background-Autonomous Mode) | Permits DMA-driven peripheral chains (e.g., ADC → memory → timer → GPIO) to execute fully autonomously in Stop 2 mode-eliminates CPU wake-ups for routine sensing tasks. |
| ART Accelerator with ICACHE/DCACHE | 8 KB instruction cache + 4 KB data cache enables zero-wait-state execution from flash and external memories-critical for deterministic latency in real-time control loops. |
| FlexPowerControl with SMPS + LDO | Integrated step-down SMPS reduces active-mode current by ~30% vs. LDO-only operation; on-the-fly switching allows seamless transition between efficiency and noise-sensitive analog operation. |
| CORDIC + FMAC Co-processors | Hardware acceleration for trigonometric, hyperbolic, and filtering math-reduces CPU load by >90% for motor control, sensor fusion, and audio preprocessing algorithms. |
| Secure Boot & Firmware Upgrade | Root-of-trust boot sequence with HDP-protected secure hide area and TF-M integration-ensures authenticated, encrypted firmware updates without exposing keys or plaintext images. |
| ULPMark™-CP Score | 464-validated benchmark reflecting real-world energy efficiency across active/sleep transitions, making it among the highest-scoring Cortex-M33 MCUs for battery-powered endpoints. |
Applications
| Smart Utility Metering | Wearable Health Monitor |
|---|---|
Use Scenario: Battery-powered gas/water meter with ultrasonic flow sensing, RF mesh backhaul, and 10-year lifespan requirement. IC Role / Device Role / Timing Role: Main application MCU managing sensor acquisition (ADC + OPAMP), secure data logging (ECC flash), encrypted LoRaWAN transmission (CAN FD + LPUART), and RTC-based billing cycles. Use Value: Sub-μA Stop 3 mode with 16 KB SRAM retention enables >99.9% duty-cycled operation; TrustZone isolates metrology firmware from communication stack to meet IEC 62056 security mandates. | Use Scenario: Clinical-grade ECG patch with continuous biosignal capture, on-device arrhythmia detection, and Bluetooth LE telemetry. IC Role / Device Role / Timing Role: Real-time signal processor running CORDIC-based QRS detection, FMAC-based adaptive filtering, and secure BLE pairing using hardware TRNG and HASH. Use Value: 14-bit ADC sampling at 2.5 Msps with hardware oversampling achieves <1 µV RMS noise floor; LPBAM automates sensor-to-memory transfers without CPU intervention-extending single-cell CR2032 life to 14 days. |
| Industrial Predictive Maintenance Node | Secure Asset Tracker |
Use Scenario: Vibration-sensing node mounted on rotating machinery, transmitting FFT features via NB-IoT every 4 hours. IC Role / Device Role / Timing Role: Edge AI inference host executing lightweight ML models (via FMAC-accelerated convolution), managing MEMS accelerometer interface (SPI), and scheduling wake-ups via LPTIM. Use Value: Dual 12-bit DACs generate precise excitation signals for self-test; 274 KB SRAM accommodates model weights and feature buffers; 125 ULPMark™-PP confirms optimal peripheral power gating during idle intervals. | Use Scenario: GPS-enabled logistics tracker operating in cold-chain transport with tamper-evident enclosure and remote firmware update capability. IC Role / Device Role / Timing Role: Secure system controller handling GPS UART parsing, cellular modem control (USB FS), tamper detection (TAMP), and encrypted OTA updates (TF-M + SFI). Use Value: Active tamper pins detect enclosure breach and trigger immediate SRAM wipe; 96-bit UID + OTP enable device-specific key binding; VBAT-backed RTC maintains accurate timestamping during power loss. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32L562VEJ6 | Same Cortex-M33 core and TrustZone, but 1 MB flash, 256 KB SRAM, no CORDIC/FMAC, lower ULPMark™-CP (382), LQFP100 only | Better suited for larger firmware footprints and complex GUI stacks; lacks math co-processors needed for real-time sensor fusion | Select when code size exceeds 512 KB and math acceleration is not required. |
| RA4M3GDB0 | Arm Cortex-M33, 1 MB flash, 384 KB SRAM, no TrustZone hardware enforcement, no SMPS, higher active current (2.8 µA/MHz) | Relies on software-based security partitioning; lacks hardware root-of-trust and fails ULPMark™-CP validation | Choose only if Renesas ecosystem alignment outweighs certified security and sub-µA sleep requirements. |
Compared with STM32L562VEJ6, the STM32U535CBT6 offers superior math acceleration and tighter low-power optimization for compact edge AI workloads; versus RA4M3GDB0, it provides verifiable hardware-enforced security and 40% lower active-mode energy consumption-making it the only choice for PSA Level 3–certifiable designs.
Availability
STM32U535CBT6 is available at Aetrix Electronics and suitable for smart utility metering, wearable health monitoring, industrial predictive maintenance, and secure asset tracking requiring stable component supply across extended product lifecycles.
Supply support for STM32U535CBT6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and automotive semiconductors since 1987.
The STM32U5 series targets ultra-low-power, security-certifiable edge devices-combining Arm TrustZone, advanced power gating, and hardware crypto accelerators to address stringent requirements in medical, industrial, and smart infrastructure applications.
FAQ
What is the maximum operating frequency and how is it sustained?
The STM32U535CBT6 achieves 160 MHz maximum CPU frequency using its ART Accelerator with 8 KB instruction cache, enabling zero-wait-state execution from internal flash. This is sustained across voltage (1.71–3.6 V) and temperature (–40 °C to +85 °C) ranges per DS14217 Rev 5 Section 5.3.10, with PLL output stability verified under all SMPS/LDO configurations.
Does the device support true hardware-based TrustZone isolation?
Yes-TrustZone is implemented at silicon level via the Global TrustZone Controller (GTZC), enforcing secure/non-secure memory regions, peripheral access rights, and boot integrity. Section 3.6 of DS14217 confirms hardware-enforced classification of all peripherals, with SAU-configurable memory attribution and default secure state upon reset.
How does LPBAM reduce system-level power consumption?
LPBAM enables autonomous peripheral sequences (e.g., ADC sampling → DMA transfer → timer-triggered GPIO toggle) to execute entirely in Stop 2 mode without CPU involvement. As validated in Section 3.9.3, this eliminates wake-up latency and CPU leakage current-reducing average system power by up to 70% in periodic sensing applications.
What packaging and thermal specifications apply to the STM32U535CBT6?
The STM32U535CBT6 uses LQFP48 (7 × 7 mm, 0.5 mm pitch) with ECOPACK2 RoHS compliance. Its thermal resistance θJA is 49.5 °C/W (JEDEC Std 51-7), and maximum junction temperature is 125 °C. Package mechanical data and soldering profiles are defined in Section 6.1 of DS14217 Rev 5.
STM32U535CBT6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 48-LQFP
- Series:
- STM32U5
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, SAI, SmartCard, SPDIF, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 37
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 274K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 11x12/14b SAR; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32U535CBT6 FAQ
1.How can I place an order for STM32U535CBT6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U535CBT6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U535CBT6 reliable?
The price and inventory of STM32U535CBT6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U535CBT6 is usually 5 days.
3.What payment methods are accepted for STM32U535CBT6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U535CBT6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U535CBT6?
STM32U535CBT6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U535CBT6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U535CBT6?
For technical support, including STM32U535CBT6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U535CBT6 requirements.
6.How does Aetrix verify that STM32U535CBT6 is sourced from the original manufacturer or authorized distributors?
All STM32U535CBT6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U535CBT6 meets industry standards.
7.What is the process for return or replacement of STM32U535CBT6?
All STM32U535CBT6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32U535CBT6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U535CBT6 part is unused and in its original packaging.
Return procedure for STM32U535CBT6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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