Semtech Corporation SX1506I091TRT

Overview

SX1506I091TRT from Semtech is a 16-channel programmable GPIO expander with I²C interface, NINT interrupt output, and NRESET input. It operates with core voltage (VDDM) from 2.5V to 5.5V and dual independent I/O banks (VCC1/VCC2) at 2.5V–5.5V, supports up to 24mA sink per high-sink I/O pin, and delivers ultra-low standby current (1µA typ). It enables I/O expansion in space-constrained, battery-powered handheld devices such as GPS units and portable multimedia players.

For engineers reviewing the SX1506I091TRT datasheet, pinout, applications, or equivalent options, key selection considerations include its QFN-UT-28 package, 400kHz I²C slave interface, maskable edge-triggered interrupts, fully programmable PLD logic for combinational functions, and dual-voltage I/O bank isolation for level-shifting between subsystems.

Technical Context

The SX1506I091TRT implements a 16-bit parallel I/O expansion architecture with two independent 8-bit I/O banks (Bank A: I/O[0–7], Bank B: I/O[8–15]), each configurable via dedicated VCC1 and VCC2 supplies. Its internal register map includes 31 user-accessible 8-bit registers supporting direction, pull-up/pull-down, interrupt masking/sensing, and PLD configuration.

It integrates a fully programmable PLD block capable of implementing up to four 3-to-1 or two 3-to-2 combinational logic functions across selected I/O pins, while retaining full GPIO functionality on non-PLD pins. The device features auto-incrementing register addressing during I²C read/write sequences - a capability exclusive to the SX1506 within the family - improving firmware efficiency in multi-register access.

Key Specifications

Pinout & Package

The SX1506I091TRT is housed in a 4×4 mm, 0.5 mm pitch, ultra-thin QFN-UT-28 package with exposed thermal pad (GND). All pins are surface-mount; pin 1 is GND (top-left corner, marked by dot).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar GPIO expander applications.

Compared with TCA6424ARGCR and PCA9555DWR, the SX1506I091TRT uniquely combines 16-channel expansion with dual independent I/O voltage rails, on-die PLD logic, and integrated NRESET/NINT - enabling single-chip solutions for complex power sequencing, keypad scanning, and mixed-voltage peripheral interfacing without external components.

Availability

SX1506I091TRT is available at Aetrix Electronics and suitable for portable multimedia players, GPS navigation units, and industrial sensor hubs requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for SX1506I091TRT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Semtech Corporation is a U.S.-based semiconductor company specializing in analog and mixed-signal ICs for precision sensing, wireless infrastructure, and power management.

The SX1506I091TRT belongs to Semtech's Wireless & Sensing product line, designed specifically for low-power, space-constrained portable electronics requiring intelligent I/O expansion with embedded logic and flexible voltage domain interfacing.

FAQ

What is the package type and footprint of the SX1506I091TRT?

The SX1506I091TRT uses a 4×4 mm, 0.5 mm pitch QFN-UT-28 package with an exposed thermal pad (GND). It has 28 terminals including five GND pins (pins 1, 7, 15, 21, and the center pad) for optimal grounding and thermal performance. Land pattern dimensions and soldering profile are specified in Semtech's Packaging Information section (Rev 3, May 2012).

Does the SX1506I091TRT support level shifting between different voltage domains?

Yes, the SX1506I091TRT supports true level shifting via independent VCC1 and VCC2 supplies (2.5V–5.5V each), allowing Bank A (I/O[0–7]) and Bank B (I/O[8–15]) to operate at different voltages than VDDM and each other. This enables direct interfacing between, for example, a 1.8V microcontroller and 5V peripherals without external level translators - a core capability confirmed in the General Description and Electrical Characteristics sections.

How does the programmable logic (PLD) function work in the SX1506I091TRT?

The SX1506I091TRT includes a fully programmable PLD block that implements combinational logic using user-defined truth tables. It supports configurations such as four 3-to-1 or two 3-to-2 logic functions across selected I/O pins. PLD inputs and outputs retain interrupt capability, and non-PLD pins remain fully functional as GPIOs. Configuration is done via RegPLDMode and associated truth table registers, as detailed in Section 4.7.3 of the datasheet.

What are the key differences between SX1506I091TRT and SX1504/SX1505 variants?

The SX1506I091TRT provides 16 GPIOs in QFN-UT-28, whereas SX1504/SX1505 offer 4/8 channels in QFN-UT-20. Only the SX1506 supports I²C register auto-increment, has two full 8-bit I/O banks with dedicated VCC1/VCC2, and implements the most advanced PLD configuration (up to two 3-to-2 functions). Its pinout and register map are distinct - it is not pin-compatible with SX1504 or SX1505.

Can the SX1506I091TRT generate interrupts on both rising and falling edges simultaneously?

Yes, the SX1506I091TRT supports independent rising- and falling-edge sensitivity per GPIO via the RegSenseLow and RegSenseHigh registers. Each I/O can be configured to trigger NINT on either edge, both edges, or neither - all under software control. Interrupt sources are identified by reading RegInterruptSource, and the interrupt is cleared by writing 0xFF to that register or (optionally) by reading RegData when RegAdvanced[7] = 1.