Semtech Corporation SX8652ICSTRT
- Part No.:
- SX8652ICSTRT
- Manufacturer:
- Semtech Corporation
- Category:
- Touch Screen Controllers
- Package:
- 12-UFBGA, WLCSP
- Datasheet:
-
SX8652ICSTRT.pdf
- Description:
- IC SCREEN CNTRL 12BIT 12WLCSP
- Quantity:
- Payment:

- Shipping:

Inventory:2,549
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SX8652ICSTRT from Semtech is a low-power 4-wire/5-wire resistive touchscreen controller with SPI interface, 12-bit SAR ADC, ±15kV HBM ESD protection on touchscreen pins, and operation from 1.65V to 3.7V supply-used in portable point-of-sale terminals and handheld instrumentation.
For engineers reviewing the SX8652ICSTRT datasheet, pinout, applications, or equivalent options, key selection criteria include touch coordinate throughput (5000 c/s), pen-detect interrupt latency, AUX input flexibility for 4-wire systems, and WLCSP package suitability for space-constrained UI designs.
Technical Context
The SX8652ICSTRT integrates a ratiometric 12-bit SAR ADC with on-chip digital filtering and supports four programmable modes: Manual, Automatic, Pen Detect, and Pen Trigger. Its analog front-end applies precise voltage sequencing across X+/X−/Y+/Y− electrodes to resolve X-Y coordinates and pressure (4-wire only) without external biasing components.
ESD robustness is implemented via dedicated on-die protection structures on X+/X−/Y+/Y−/AUX pins, rated ±15kV HBM and ±15kV Contact Discharge-eliminating need for external TVS diodes. The SPI interface operates up to 5MHz with configurable CS timing and open-drain NIRQ output requiring external pull-up.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ADC Resolution | 12-bit SAR: delivers 4096-step position quantization with ±1.5 LSB INL for accurate coordinate mapping. |
| Supply Range | 1.65V–3.7V: enables direct interface with single-cell Li-ion or coin-cell power rails without LDO overhead. |
| ESD Protection | ±15kV HBM on X+/X−/Y+/Y−/AUX: meets IEC 61000-4-2 Level 4 without external protection circuitry. |
| Throughput | 5000 (X-Y) coordinates/second with 7-sample averaging: supports responsive UIs in handheld devices. |
| Shutdown Current | <1 µA: extends battery life in always-on pen-detect mode for wake-on-touch functionality. |
| SPI Speed | Up to 5 MHz: reduces host CPU polling time and minimizes SPI transaction latency per coordinate read. |
| Operating Temp | −40°C to +85°C: qualified for industrial and outdoor portable equipment deployment. |
Pinout & Package
The SX8652ICSTRT is packaged in a 1.5 mm × 2.0 mm 12-ball WLCSP (wafer-level chip-scale package) with solder bumps on bottom side, optimized for ultra-compact touchscreen interfaces in mobile and wearable devices.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AUX/WIPER | Analog Input / Synchronization | 4-wire: auxiliary ADC input or external conversion trigger; 5-wire: wiper connection for voltage sensing. |
| VDD | Power Input | Single supply input (1.65–3.7 V); requires 0.1 µF decoupling capacitor to GND. |
| X+/BR | Analog IO | 4-wire: X+ electrode; 5-wire: Bottom Right electrode-ESD-protected high-voltage node. |
| Y+/TR | Analog IO | 4-wire: Y+ electrode; 5-wire: Top Right electrode-supports ratiometric measurement with VDD reference. |
| X-/TL | Analog IO | 4-wire: X− electrode; 5-wire: Top Left electrode-part of 4-corner electrode set for gradient generation. |
| Y-/BL | Analog IO | 4-wire: Y− electrode; 5-wire: Bottom Left electrode-completes 4-corner drive/sense configuration. |
| GND | Ground | Primary ground reference; backside ground ball provides low-inductance return path. |
| SCLK | Digital Input | SPI clock input; accepts 40 kHz–5 MHz signals with 60% max duty cycle. |
| DIN | Digital Input | SPI data-in; CMOS-compatible with VIH ≥ 0.8×VDD and input leakage <±1 µA. |
| DOUT | Digital Output | SPI data-out; open-drain capable with external pull-up; outputs valid data within 70 ns of SCLK falling edge. |
| NIRQ | Digital Output | Active-low open-drain interrupt; asserts when pen detected or new coordinate data ready-requires 1–10 kΩ pull-up. |
| NCS | Digital Input | SPI chip select; active-low; must be held stable ≥50 ns before first SCLK rising edge. |
Key Features
| Feature | Design Value |
|---|---|
| On-chip ESD protection | ±15kV HBM on all touchscreen pins eliminates external TVS diodes and saves PCB area. |
| Programmable operation modes | Four modes (Manual/Auto/PenDetect/PenTrigger) enable optimal trade-off between responsiveness, power, and host processing load. |
| Integrated preprocessing | Hardware-averaging (up to 7 samples) reduces host-side noise filtering burden and improves coordinate stability. |
| Touch pressure measurement | Direct RT resistance calculation from Z1/Z2 measurements enables force-sensitive UI feedback in 4-wire configurations. |
| Low-noise ratiometric conversion | Uses VDD as reference-no external precision reference required-reducing BOM count and layout sensitivity. |
Applications
| Point-of-Sale Terminals | Handheld Medical Instruments |
|---|---|
Use Scenario: Compact countertop or mobile POS units with stylus-based order entry and signature capture. IC Role / Device Role / Timing Role: Touchscreen controller acquiring X-Y coordinates and pressure at 5000 c/s to support real-time signature rendering. Use Value: ±15kV ESD protection ensures reliability in high-handling retail environments without added protection components. | Use Scenario: Portable blood glucose meters or handheld diagnostic tools with glove-compatible touch interface. IC Role / Device Role / Timing Role: Low-power (23 µA @ 1.8V, 8kSPS) controller enabling multi-day battery life while maintaining responsive touch detection. Use Value: WLCSP package (1.5 mm × 2.0 mm) fits tight mechanical envelopes typical of Class II medical handhelds. |
| Industrial Handheld Scanners | Wearable UI Modules |
Use Scenario: Rugged barcode scanners used in warehouses with frequent electrostatic discharge exposure. IC Role / Device Role / Timing Role: Robust touchscreen interface with pen-detect interrupt (NIRQ) triggering wake-from-sleep on user interaction. Use Value: Hardware pen detection and <1 µA shutdown current extend operational uptime between charges in intermittent-use scenarios. | Use Scenario: Smartwatch or AR glasses with miniature resistive touch overlay for secondary control. IC Role / Device Role / Timing Role: Ultra-small WLCSP controller providing coordinate data via SPI to low-power application processor. Use Value: 12-ball WLCSP footprint enables integration beneath curved or constrained display assemblies where DFN is mechanically incompatible. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar resistive touchscreen controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TI TSC2004IPW | 12-bit ADC, I²C interface, 2.7–3.6V supply, no AUX input, ±8kV HBM ESD rating | Lacks SPI interface and AUX-trigger capability; lower ESD robustness requires external protection in harsh environments | Choose if I²C host interface and lower cost outweigh need for higher ESD immunity and SPI compatibility |
| Microchip MXT143E | Capacitive-only controller, QFN-48, 1.8V supply, supports multi-touch, no resistive support | Fundamentally different sensing modality-cannot replace SX8652ICSTRT in 4/5-wire resistive systems | Select only for new capacitive-based designs; not a functional alternative for existing resistive touch implementations |
Compared with TI TSC2004IPW, SX8652ICSTRT offers superior ESD resilience and SPI-native integration, while Microchip MXT143E serves a non-overlapping capacitive domain-neither is pin- or functionally compatible, making SX8652ICSTRT the sole validated solution for high-reliability, low-power resistive touch in space-constrained portable systems.
Availability
SX8652ICSTRT is available at Aetrix Electronics and suitable for point-of-sale terminals, handheld medical instruments, and industrial scanners requiring stable component supply across extended production lifecycles.
Supply support for SX8652ICSTRT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Semtech Corporation is a U.S.-based fabless semiconductor company focused on advanced analog and mixed-signal ICs for sensing, connectivity, and power management.
The SX8652 product line was designed specifically for ultra-low-power, high-ESD-resilience resistive touchscreen control in portable and battery-operated human-interface applications.
FAQ
What is the maximum SPI clock frequency supported by the SX8652ICSTRT?
The SX8652ICSTRT supports SPI clock frequencies up to 5 MHz, with timing specifications defined for setup/hold times relative to 50% VDD thresholds. This allows fast coordinate reads with minimal host CPU overhead. The SX8652ICSTRT datasheet specifies minimum pulse widths of 80 ns for both SCLK high and low periods, confirming reliable operation at full speed under recommended conditions.
Does the SX8652ICSTRT support both 4-wire and 5-wire resistive touchscreens simultaneously?
No, the SX8652ICSTRT supports either 4-wire or 5-wire operation-but not both concurrently. Configuration is determined by external wiring and register settings: in 4-wire mode, AUX/WIPER serves as auxiliary ADC input or conversion trigger; in 5-wire mode, it connects to the top-layer wiper. The SX8652ICSTRT hardware automatically adapts its drive sequence and measurement algorithm based on selected mode.
What is the purpose of the NRST pin on the SX8652ICSTRT, and is it present in the WLCSP package?
The NRST pin is a dedicated active-low hardware reset input with internal pull-up, enabling synchronous system-level initialization. It is present only on the DFN package (pin 13) and omitted in the WLCSP variant (SX8652ICSTRT). For WLCSP units, reset must be performed via SPI command or power-cycle POR-making NRST unavailable as a physical signal in SX8652ICSTRT.
How does the SX8652ICSTRT achieve ±15kV ESD protection without external components?
The SX8652ICSTRT integrates proprietary on-die ESD clamp structures directly on X+/X−/Y+/Y−/AUX pins, tested to ±15kV HBM and ±15kV Contact Discharge per JEDEC standards. These clamps route transient current to VDD and GND rails using low-capacitance, high-threshold designs-verified in characterization and eliminating need for discrete TVS diodes. The SX8652ICSTRT's protection is intrinsic to its silicon layout, not dependent on external passive components.
Can the SX8652ICSTRT measure touch pressure in 5-wire touchscreen configurations?
No, touch pressure measurement is exclusive to 4-wire operation on the SX8652ICSTRT. Pressure is derived from contact resistance (RT) calculated using Z1/Z2 measurements, which rely on the dual-layer resistive structure and electrode biasing unique to 4-wire panels. In 5-wire mode, the top-layer wiper configuration enables highly reliable coordinate acquisition but does not support RT-based force sensing-the SX8652ICSTRT disables pressure computation when configured for 5-wire use.
SX8652ICSTRT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Semtech Corporation
- Package/Case:
- 12-UFBGA, WLCSP
- Touchscreen:
- 4 or 5 Wire Resistive
- Resolution (Bits):
- 12 b
- Interface:
- SPI
- Voltage Reference:
- Internal
- Voltage - Supply:
- 1.65V ~ 3.7V
- Current - Supply:
- 105 µA
- Operating Temperature:
- -40°C ~ 85°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 12-WLCSP (2x1.5)
SX8652ICSTRT FAQ
1.How can I place an order for SX8652ICSTRT through Aetrix?
Please submit a Request for Quotation (RFQ) for SX8652ICSTRT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SX8652ICSTRT reliable?
The price and inventory of SX8652ICSTRT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SX8652ICSTRT is usually 5 days.
3.What payment methods are accepted for SX8652ICSTRT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SX8652ICSTRT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SX8652ICSTRT?
SX8652ICSTRT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SX8652ICSTRT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SX8652ICSTRT?
For technical support, including SX8652ICSTRT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SX8652ICSTRT requirements.
6.How does Aetrix verify that SX8652ICSTRT is sourced from the original manufacturer or authorized distributors?
All SX8652ICSTRT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SX8652ICSTRT meets industry standards.
7.What is the process for return or replacement of SX8652ICSTRT?
All SX8652ICSTRT units undergo pre-shipment inspection (PSI). If there is an issue with SX8652ICSTRT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SX8652ICSTRT part is unused and in its original packaging.
Return procedure for SX8652ICSTRT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SX8652ICSTRT Tags
-
TSC2046IPWR
Texas Instruments
-
TSC2007IPWR
Texas Instruments
-
TSC2046EIPWR
Texas Instruments

-
AR1021-I/SS
Microchip Technology

-
AR1020-I/SS
Microchip Technology

-
AR1100-I/MQ
Microchip Technology

-
AR1021T-I/ML
Microchip Technology

-
AR1100T-I/SS
Microchip Technology
-
TSC2003IPWR
Texas Instruments

-
TSC2004IRTJR
Texas Instruments

-
AR1100BRD
Microchip Technology
.jpg)
-
TSC2046IRGVR
Texas Instruments
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

