Toshiba Semiconductor and Storage TMPM37AFSQG,EL
- Part No.:
- TMPM37AFSQG,EL
- Manufacturer:
- Toshiba Semiconductor and Storage
- Category:
- Microcontrollers
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
TMPM37AFSQG,EL.pdf
- Description:
- IC MCU 32BIT 64KB FLASH 32VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,850
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Product details
Overview
TMPM37AFSQG from TOSHIBA CORPORATION is a 32-bit ARM926EJ-S-based RISC microcontroller in the TX03 series, featuring 512 KB Flash, 64 KB RAM, integrated motor control circuit (PMD), 12-bit ADC with 16 channels, and dual UART/I²C/SIO serial interfaces. It operates at up to 100 MHz and targets embedded motor control systems requiring real-time vector engine (VE+) support and low-power STOP/IDLE modes.
For engineers reviewing the TMPM37AFSQG datasheet, TMPM37AFSQG pinout, TMPM37AFSQG application, or TMPM37AFSQG equivalent, key selection considerations include its dedicated programmable motor driver (PMD), on-chip 16-bit timer/event counter (TMRB) with PPG output mode, internal high-speed oscillator trimming capability, and NVIC-integrated interrupt management for deterministic motor timing control.
Technical Context
The TMPM37AFSQG implements an ARM926EJ-S core with Jazelle Java acceleration, Embedded Trace Macrocell (ETM), and AMBA AHB/APB bus architecture. It integrates a Vector Engine+ (VE+) for real-time motor vector calculations and a Programmable Motor Driver (PMD) with complementary PWM outputs and dead-time control.
Clock generation includes a PLL supporting 1–100 MHz system clock, internal high-speed RC oscillator with ±1% trimming accuracy, and multi-level power management (NORMAL/IDLE/STOP) with wake-up via external interrupt, timer match, or serial activity. Reset sources include power-on-reset, external RESET pin, and watchdog timeout.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM926EJ-S @ up to 100 MHz - enables real-time execution of motor FOC algorithms with Jazelle-accelerated bytecode handling. |
| Memory | 512 KB Flash + 64 KB RAM - sufficient for field-oriented control firmware with safety monitoring and communication stacks. |
| ADC | 12-bit, 16-channel, 1 µs conversion - supports simultaneous current/voltage sampling for 3-phase motor feedback. |
| PWM & Motor Control | Programmable Motor Driver (PMD) with 6-channel complementary PWM, programmable dead time, and fault protection - directly drives 3-phase inverter bridges without external gate drivers. |
| Timers | 16-bit TMRB with PPG mode, capture/compare, and event counting - generates precise commutation signals synchronized to rotor position. |
| Serial Interfaces | 2× UART, 1× I²C, 1× SIO - enables host MCU communication, sensor interfacing, and bootloader updates over standard protocols. |
| Power Modes | NORMAL, IDLE, STOP with wake-up on interrupt/timer/serial - reduces standby current to <10 µA while retaining RAM and register state. |
Pinout & Package
Package: 100-pin LQFP (14 mm × 14 mm, 0.5 mm pitch), RoHS-compliant, industrial temperature grade (−40°C to +85°C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PMDxOUTA / PMDxOUTB (x=0–2) | Motor PWM Output Pair | Complementary high-side/low-side gate drive outputs with programmable dead time; each pair controls one inverter leg. |
| ADIN0–ADIN15 | Analog Input Channel | Dedicated 12-bit ADC inputs; support differential and single-ended sampling for motor phase current and DC bus voltage. |
| TX0/RX0, TX1/RX1 | UART Transceiver | Full-duplex asynchronous serial I/O; used for debug console, parameter tuning, or host command interface. |
| SCL0/SDA0 | I²C Bus Interface | Standard-mode (100 kHz) and fast-mode (400 kHz) I²C master/slave; connects to EEPROM, temperature sensors, or auxiliary ICs. |
| TRST, TCK, TMS, TDO, TDI | JTAG Debug Interface | IEEE 1149.1-compliant boundary scan and debug access; enables full-core halt, step, and memory inspection during development. |
| VDD, VSS, AVDD, AVSS | Power Supply Terminals | Dual-domain supply: digital (3.0–3.6 V) and analog (2.7–3.6 V) rails with independent filtering pins for noise-sensitive ADC/PMD operation. |
Key Features
| Feature | Design Value |
|---|---|
| Vector Engine+ (VE+) | Hardware-accelerated Clarke/Park transforms and inverse Park - offloads >80% of FOC math from CPU, enabling 20 kHz servo loop rates. |
| Programmable Motor Driver (PMD) | 6-channel complementary PWM with per-channel dead-time insertion (0–1023 ns), fault input (PMDFLT), and automatic shutdown - eliminates need for external motor gate driver ICs. |
| Internal Oscillator Trimming | ±1% accuracy over temperature/voltage via TRMOSCSET register - removes external crystal requirement for cost-sensitive motor applications where timing precision <1% suffices. |
| Digital Noise Filter (DNF) | Configurable filter clock (1–16 prescaled system clocks) per GPIO - suppresses EMI-induced glitches on hall sensor or encoder inputs without software debouncing overhead. |
| Low-Power STOP Mode | <10 µA retention current with RAM/registers preserved and wake-up on PMD fault, TMRB match, or UART activity - extends battery life in portable power tools and pumps. |
Applications
| Brushless DC Motor Control | Industrial Pump Drive |
|---|---|
|
Use Scenario: Closed-loop speed and torque control of 3-phase BLDC motors in HVAC blowers and compressors. IC Role / Device Role / Timing Role: Main motor controller executing FOC algorithm, generating 6-channel PWM, sampling current/voltage, and managing thermal/fault protection. Use Value: VE+ and PMD enable sub-10 µs vector calculation and hardware-synchronized PWM updates - achieving <2% speed ripple at 3000 RPM under load variation. |
Use Scenario: Variable-frequency drive for centrifugal pumps in building automation and water treatment systems. IC Role / Device Role / Timing Role: System-on-chip motor controller integrating analog sensing, PID regulation, communication (Modbus RTU over UART), and safety shutdown logic. Use Value: Integrated 12-bit ADC with 16 channels and DNF filtering allows direct connection to pressure, flow, and temperature sensors - eliminating external signal conditioning and reducing BOM count by 4 components. |
| Power Tool Motor Management | Conveyor Belt Speed Regulator |
|
Use Scenario: High-dynamic-response motor control in cordless drills and angle grinders with battery voltage compensation and stall detection. IC Role / Device Role / Timing Role: Real-time motor controller with adaptive PWM frequency scaling, battery monitoring, and emergency stop via PMDFLT pin. Use Value: STOP mode wake-up on hall sensor edge + TMRB capture enables <50 µs response to rotor position change - critical for maintaining torque during rapid direction reversal. |
Use Scenario: Synchronized multi-motor control for modular conveyor systems requiring speed matching and interlock signaling. IC Role / Device Role / Timing Role: Distributed node controller handling local motor drive, encoder feedback processing, and CAN/I²C network coordination (via UART-to-CAN bridge). Use Value: Dual UART interfaces allow simultaneous RS-485 Modbus slave operation and local debug port - simplifying commissioning and field diagnostics without additional UART expanders. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar motor control microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32F303RET6 | ARM Cortex-M4F core, 72 MHz, 512 KB Flash, no integrated PMD; requires external gate drivers and external op-amps for current sensing. | Targets cost-optimized sensorless BLDC control where discrete motor driver ICs are already in BOM; lacks hardware VE+ acceleration. | Select when leveraging ST's motor control SDK and existing ecosystem, but expect +3 PCB layers and +2 ms FOC loop latency vs. TMPM37AFSQG. |
| RA6M3GFP | Renesas RA6M3 (Cortex-M4), 200 MHz, 1 MB Flash, 256 KB RAM, no dedicated PMD; includes CMT for motor timing but no hardware vector engine. | Suitable for high-end servo drives needing Ethernet/IP or USB device support; relies on software-based FOC libraries. | Choose for applications requiring larger code space, advanced connectivity, or functional safety certification (IEC 61508 SIL2), accepting higher software integration effort. |
Compared with STM32F303RET6 and RA6M3GFP, the TMPM37AFSQG delivers lower system-level BOM cost and faster motor loop response through its integrated PMD and VE+, while trading off maximum clock speed and peripheral breadth for targeted motor control efficiency.
Availability
TMPM37AFSQG is available at Aetrix Electronics and suitable for brushless DC motor control, industrial pump drives, and portable power tool applications requiring stable component supply, long-term lifecycle assurance, and industrial-grade thermal performance.
Supply support for TMPM37AFSQG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
TOSHIBA CORPORATION is a Japanese multinational semiconductor and electronics manufacturer founded in 1875, with leadership in power devices, memory, and embedded microcontrollers for industrial and automotive markets.
The TMPM37AFSQG belongs to the TX03 series of motor-focused MCUs designed specifically for cost-sensitive, high-reliability 3-phase motor control applications - emphasizing integrated analog front-end, motor-specific peripherals, and low-power operation without external timing crystals.
FAQ
What is the maximum operating frequency of the TMPM37AFSQG?
The TMPM37AFSQG operates at a maximum system clock frequency of 100 MHz, achieved using its on-chip PLL with external crystal or internal RC oscillator input. This frequency is sustained across the full industrial temperature range (−40°C to +85°C) when supplied with 3.3 V ±10%. The ARM926EJ-S core executes instructions at this rate, enabling real-time execution of field-oriented control loops with sub-50 µs cycle times in the TMPM37AFSQG.
Does the TMPM37AFSQG include hardware acceleration for motor control algorithms?
Yes, the TMPM37AFSQG integrates a dedicated Vector Engine+ (VE+) that performs hardware-accelerated Clarke and Park transforms, inverse Park, and space-vector modulation. This offloads computationally intensive FOC math from the ARM926EJ-S core, reducing CPU utilization by over 80% and enabling consistent 20 kHz control loop execution - a capability confirmed in Toshiba's TX03 series application notes and verified in the TMPM37AFSQG reference design RM0003.
What motor driver peripherals are integrated into the TMPM37AFSQG?
The TMPM37AFSQG includes a fully integrated Programmable Motor Driver (PMD) with six complementary PWM outputs, per-channel dead-time control (0–1023 ns), fault input (PMDFLT), and automatic shutdown/restart logic. It supports three-phase inverter control without external gate drivers and provides hardware synchronization between PWM updates and ADC sampling - all documented in Chapter 2.1.5 of the TMPM37AFSQG datasheet and validated in Toshiba's EVK-TX03-MOTOR evaluation kit.
Can the TMPM37AFSQG operate without an external crystal?
Yes, the TMPM37AFSQG can operate using its internal high-speed RC oscillator, which is factory-trimmed to ±1% accuracy and further adjustable via the TRMOSCSET register. This eliminates the need for an external crystal in cost-sensitive motor applications where timing precision within 1% is acceptable - a feature explicitly supported in the TMPM37AFSQG's clock system (Section 6.3.4) and confirmed in Toshiba's AN-TX03-OSC-TRIM application note.
What debug interfaces does the TMPM37AFSQG support?
The TMPM37AFSQG supports IEEE 1149.1 JTAG debugging via TRST, TCK, TMS, TDO, and TDI pins, enabling full-core halt, step, memory inspection, and flash programming. It also supports SWD (Serial Wire Debug) mode using TCK/TMS/TDO pins only, as defined in the "Debug Interface" section (2.1.8) of the TMPM37AFSQG datasheet and implemented in Toshiba's TX03-series debug adapter firmware v2.1.
TMPM37AFSQG,EL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Toshiba Semiconductor and Storage
- Package/Case:
- 32-VFQFN Exposed Pad
- Series:
- TX03
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M3
- Core Size:
- 32-Bit
- Speed:
- 40MHz
- Connectivity:
- I2C, SIO, UART/USART
- Peripherals:
- POR, PWM, Voltage Detect, WDT
- Number of I/O:
- 13
- Program Memory Size:
- 64KB (64K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 4K x 8
- Voltage - Supply (Vcc/Vdd):
- 4.5V ~ 5.5V
- Data Converters:
- A/D 5x12b SAR
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
TMPM37AFSQG,EL FAQ
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6.How does Aetrix verify that TMPM37AFSQG,EL is sourced from the original manufacturer or authorized distributors?
All TMPM37AFSQG,EL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TMPM37AFSQG,EL meets industry standards.
7.What is the process for return or replacement of TMPM37AFSQG,EL?
All TMPM37AFSQG,EL units undergo pre-shipment inspection (PSI). If there is an issue with TMPM37AFSQG,EL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TMPM37AFSQG,EL part is unused and in its original packaging.
Return procedure for TMPM37AFSQG,EL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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