Silicon Labs TSM982ESA+T
- Part No.:
- TSM982ESA+T
- Manufacturer:
- Silicon Labs
- Category:
- Comparators
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TSM982ESA+T.pdf
- Description:
- IC COMPARATOR 2 W/VOLT REF 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,200
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TSM982ESA+T from Silicon Laboratories is a dual-channel, micropower analog comparator with integrated 1.182V ±2% reference and adjustable hysteresis, operating from single +2.5V to +11V or dual ±1.25V to ±5.5V supplies. It draws ≤6μA max supply current over temperature, features open-drain outputs for wired-OR logic, and supports input common-mode range from V− to V+ − 1.3V - ideal for precision threshold detection in battery-powered sensor interfaces.
For engineers reviewing the TSM982ESA+T datasheet, TSM982ESA+T pinout, TSM982ESA+T application, or TSM982ESA+T equivalent, key selection criteria include its ultra-low quiescent current, internal reference accuracy across −40°C to +85°C, dual-comparator hysteresis capability, and SOIC-8 package compatibility with legacy MAX982 designs.
Technical Context
The TSM982ESA+T implements two independent rail-to-rail input comparators sharing a single 1.182V reference output (REF) and dedicated hysteresis control (HYST) pin. Its open-drain outputs sink current to V−, requiring external pull-up resistors for logic-level translation or wired-OR bus operation.
It supports true single-supply operation with V− tied to GND, or dual-supply mode with V− at negative potential - enabling level-shifting between ±5V analog signals and 3.3V/5V digital domains. Propagation delay is 12μs (high-to-low) at 10mV overdrive with 100pF load and 1MΩ pull-up.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | +2.5V to +11V (single) or ±1.25V to ±5.5V (dual) - enables direct interface with Li-ion battery rails and industrial ±5V systems. |
| Max Supply Current | 6μA over −40°C to +85°C - ensures multi-year operation on coin-cell batteries in always-on monitoring nodes. |
| Reference Voltage | 1.182V ±2% over −40°C to +85°C - provides stable trip-point generation without external voltage references. |
| Input Common-Mode Range | V− to V+ − 1.3V - allows detection of signals near ground or near supply rail in single-supply configurations. |
| Propagation Delay | 12μs (high-to-low), 300μs (low-to-high) at 10mV overdrive - defines timing resolution for fast edge detection with predictable latency. |
| Hysteresis Control | Dedicated HYST pin accepting REF − 50mV to REF - enables precise, resistor-programmable hysteresis up to 100mV band without feedback network redesign. |
| Output Type | Open-drain, sinking to V− - supports bidirectional level translation, I²C-compatible bus arbitration, and OR-ing of multiple comparator outputs. |
Pinout & Package
Package: 8-pin SOIC (Small Outline Integrated Circuit), JEDEC MS-012 compliant, 3.9mm × 4.9mm footprint, 1.27mm lead pitch.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND | Ground reference for single-supply operation; must be connected to V− when using dual supply. |
| 2 | V− | Negative supply terminal; sets output sink reference and extends input common-mode range downward. |
| 3 | IN+ | Noninverting input of Comparator A - accepts signals from V− to V+ − 1.3V with <±10mV offset. |
| 4 | IN− | Inverting input of Comparator A - matched leakage (<±5nA) enables high-impedance sensing. |
| 5 | HYST | Hysteresis control input for both comparators; voltage relative to REF sets hysteresis band width. |
| 6 | REF | 1.182V reference output referenced to V−; sources/sinks up to 25μA/15μA for external resistor networks. |
| 7 | V+ | Positive supply terminal; supports up to +11V with absolute max rating of +12V. |
| 8 | OUT | Open-drain output of Comparator B - sinks current to V−; requires external pull-up for logic-high assertion. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low quiescent current | ≤6μA max over full −40°C to +85°C range - eliminates need for shutdown sequencing in energy-harvesting systems. |
| Integrated precision reference | 1.182V ±2% over temperature - removes external reference IC, reducing BOM count and layout area in compact sensors. |
| Programmable hysteresis | Adjustable via single HYST pin with two resistors - avoids complex feedback loops and enables rapid trip-point tuning during prototyping. |
| Rail-to-rail input capability | Common-mode range extends to V− and within 1.3V of V+ - supports direct sensing of battery voltage, thermistor dividers, and op-amp outputs. |
| Wired-OR compatible outputs | Open-drain outputs sinking to V− - enables fault-bus aggregation, power-good signaling, and multi-sensor alarm consolidation. |
Applications
| Threshold Detector | Window Comparator |
|---|---|
|
Use Scenario: Monitoring lithium battery voltage to trigger low-battery warning at 3.3V and disable charging above 4.25V. IC Role / Device Role / Timing Role: Dual comparator compares battery voltage against REF-derived thresholds using resistor dividers; HYST pin adds 20mV hysteresis to prevent chatter near trip points. Use Value: Eliminates external reference and hysteresis components, reducing solution size by 30% versus discrete op-amp + reference design. |
Use Scenario: Validating 5V system rail stays within 4.5V–5.5V window before enabling downstream FPGA configuration. IC Role / Device Role / Timing Role: TSM982ESA+T configured as dual-threshold detector with OUTA and OUTB feeding wired-OR gate to generate active-high POWER_GOOD signal. Use Value: Achieves <12μs response to overvoltage events while consuming only 6μA - critical for fail-safe power sequencing in medical devices. |
| Battery Switchover | Level Translator |
|
Use Scenario: Seamless transition from wall adapter (5V) to backup LiPo (3.7V) in portable instrumentation without voltage drop or reverse-current risk. IC Role / Device Role / Timing Role: One comparator monitors adapter voltage vs REF; output drives P-MOSFET gate to disconnect battery until adapter fails. Use Value: Replaces lossy Schottky diode OR-ing with <100mV forward drop, improving efficiency by >15% in continuous 100mA load scenarios. |
Use Scenario: Converting ±5V analog sensor outputs (e.g., strain gauge bridge) into clean 0V/3.3V logic levels for MCU ADC triggering. IC Role / Device Role / Timing Role: Comparator inputs biased via resistor divider; open-drain output pulled to 3.3V to generate TTL-compatible edge signals. Use Value: Enables direct interface between legacy industrial analog sensors and modern low-voltage microcontrollers without level-shifter ICs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual comparator with reference applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX982ESA+ | Pin-compatible, identical electrical specs, same ±2% reference accuracy and HYST functionality - direct second-source replacement. | No functional difference; validated for same temperature range (−40°C to +85°C) and SOIC-8 footprint. | Select when dual-sourcing is required for supply chain resilience without layout or firmware changes. |
| TSM973ESA+T | Same package and pinout, but ±1% reference accuracy and lower 4μA max supply current - tighter reference tolerance at slightly higher cost. | Better suited for precision voltage monitoring where ±10mV trip-point error is unacceptable, e.g., medical-grade battery cutoff. | Choose when reference accuracy outweighs quiescent current savings; verify hysteresis resistor values scale with tighter REF tolerance. |
Compared with MAX982ESA+, TSM982ESA+T offers identical performance and form factor as a qualified alternate source; compared with TSM973ESA+T, it trades ±1% reference accuracy for higher hysteresis flexibility and broader industrial temperature support in cost-sensitive applications.
Availability
TSM982ESA+T is available at Aetrix Electronics and suitable for battery-powered systems, industrial sensor interfaces, and power-rail monitoring applications requiring stable component supply across extended temperature ranges.
Supply support for TSM982ESA+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Silicon Laboratories is a fabless semiconductor company specializing in low-power, mixed-signal ICs for timing, IoT, and embedded control applications.
The TSM982ESA+T belongs to Silicon Labs' TSM9xx micropower comparator family, designed specifically for energy-constrained systems needing precision threshold detection without external references or complex support circuitry.
FAQ
What is the operating temperature range for the TSM982ESA+T?
The TSM982ESA+T is rated for −40°C to +85°C ambient operation, with all electrical specifications guaranteed across this industrial temperature range. Its internal 1.182V reference maintains ±2% accuracy over this span, and supply current remains ≤6μA maximum - making it suitable for outdoor sensor nodes and automotive cabin modules where thermal stability is critical. The "E" suffix in TSM982ESA+T explicitly denotes this extended temperature grade.
Does the TSM982ESA+T require external pull-up resistors on its outputs?
Yes, the TSM982ESA+T features open-drain outputs that sink current to V−, so external pull-up resistors are mandatory to establish a defined logic-high state. Typical values range from 10kΩ to 100kΩ depending on speed and drive requirements; the datasheet specifies 1MΩ for propagation delay characterization. Without pull-ups, outputs remain floating and cannot assert HIGH - a fundamental requirement for wired-OR logic, level translation, or interfacing with CMOS/TTL inputs.
Can the internal reference of the TSM982ESA+T be used to bias external circuits?
Yes, the REF pin of the TSM982ESA+T can source up to 25μA and sink up to 15μA while maintaining ±2% accuracy over temperature, enabling direct biasing of resistor dividers, op-amp references, or low-current sensor excitation circuits. However, the REF pin must not be bypassed with capacitors, as this may destabilize the internal reference circuitry and increase noise - a design constraint explicitly called out in the datasheet.
How is hysteresis implemented on the TSM982ESA+T?
Hysteresis on the TSM982ESA+T is implemented via the dedicated HYST pin, which accepts a voltage between REF − 50mV and REF. Connecting two resistors - R1 from REF to HYST and R2 from HYST to V− - creates positive feedback that shifts trip points. The resulting hysteresis band equals twice the voltage difference between REF and HYST, allowing precise, resistor-tuned hysteresis up to 100mV without modifying comparator feedback paths.
Is the TSM982ESA+T pin-compatible with the MAX982 series?
Yes, the TSM982ESA+T is electrically and form-factor identical to the MAX982 family per the manufacturer's documentation, including identical pinout, SOIC-8 package dimensions, and absolute maximum ratings. This makes it a drop-in replacement in existing MAX982 designs - no PCB layout changes, schematic updates, or firmware modifications are required to migrate to TSM982ESA+T for supply chain or cost optimization.
TSM982ESA+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Silicon Labs
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Series:
- TSM98x
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- with Voltage Reference
- Number of Elements:
- 2
- Output Type:
- Open-Drain
- Voltage - Supply, Single/Dual (±):
- 2.5V ~ 11V, ±1.25V ~ 5.5V
- :
- 10mV @ 2.5V
- Voltage - Input Offset (Max):
- 0.005µA @ 2.5V
- Current - Input Bias (Max):
- 40mA
- Current - Output (Typ):
- 6µA
- Current - Quiescent (Max):
- 80dB CMRR, 80dB PSRR
- CMRR, PSRR (Typ):
- 12µs
- Propagation Delay (Max):
- 50mV
- Hysteresis:
- -40°C ~ 85°C
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- Surface Mount
- :
- 8-SOIC
TSM982ESA+T FAQ
1.How can I place an order for TSM982ESA+T through Aetrix?
Please submit a Request for Quotation (RFQ) for TSM982ESA+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TSM982ESA+T reliable?
The price and inventory of TSM982ESA+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TSM982ESA+T is usually 5 days.
3.What payment methods are accepted for TSM982ESA+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TSM982ESA+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TSM982ESA+T?
TSM982ESA+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TSM982ESA+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TSM982ESA+T?
For technical support, including TSM982ESA+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TSM982ESA+T requirements.
6.How does Aetrix verify that TSM982ESA+T is sourced from the original manufacturer or authorized distributors?
All TSM982ESA+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TSM982ESA+T meets industry standards.
7.What is the process for return or replacement of TSM982ESA+T?
All TSM982ESA+T units undergo pre-shipment inspection (PSI). If there is an issue with TSM982ESA+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TSM982ESA+T part is unused and in its original packaging.
Return procedure for TSM982ESA+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TSM982ESA+T Tags

-
LM2903DR
Texas Instruments
-
LM339DR
Texas Instruments

-
LM339PWR
Texas Instruments

-
LM393DT
STMicroelectronics

-
LM2901PWR
Texas Instruments

-
LM2903DT
STMicroelectronics

-
LM393DR
Texas Instruments
-
LM239DR
Texas Instruments

-
LM339APWR
Texas Instruments

-
LM2903P
Texas Instruments

-
LM393ADR
Texas Instruments

-
NCX2200GMAZ
NXP Semiconductors
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
