Analog Devices Inc. 114352-HMC660LC4B
- Part No.:
- 114352-HMC660LC4B
- Manufacturer:
- Analog Devices Inc.
- Category:
- RF, RFID, Wireless Evaluation Boards
- Package:
- Datasheet:
-
114352-HMC660LC4B.pdf
- Description:
- HMC660LC4B DUAL RANK EVAL PCB
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
HMC660LC4B from Analog Devices (formerly Hittite Microwave) is a SiGe monolithic, fully-differential track-and-hold amplifier designed for ultra-wideband sampled-data systems. It delivers 4.5 GHz input bandwidth, 3 GS/s maximum sampling rate, 84 fs aperture jitter, and 61 dB SFDR at 4 GHz/0.5 Vpp with 1 GS/s clock - enabling high-fidelity RF signal capture in radar front-ends and digital sampling oscilloscopes.
For engineers reviewing the HMC660LC4B datasheet, HMC660LC4B pinout, HMC660LC4B application, or HMC660LC4B equivalent, key selection considerations include its 4.5 GHz hold-mode bandwidth, 5 ns maximum hold time, differential 50 Ω input/output impedance, 1.05 mV RMS hold-mode output noise, and strict power supply sequencing (Vcc2 → Vcc1 → VccSH → VccCLK).
Technical Context
The HMC660LC4B employs a SiGe BiCMOS process to achieve sub-100 fs aperture jitter and >60 dB hold-mode feedthrough rejection. Its track-mode bandwidth reaches 3.95 GHz at 1 Vpp input, while hold-mode sampling bandwidth extends to 4.5 GHz (–3 dB), supported by a 7 GHz output amplifier that shapes overall frequency response.
It operates with dual-rail supplies: Vcc2 = 6 V (output stage), Vcc1/VccSH/VccCLK = 5 V (core/logic), requiring strict startup sequencing. Clock inputs accept either sinusoidal (–10 to +10 dBm per terminal) or square-wave drive, with optimal linearity achieved at ≥4 V/ns slew rate - corresponding to +6 dBm at 1 GHz, 0 dBm at 2 GHz, or –3.5 dBm at 3 GHz.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Bandwidth | 4.5 GHz (–3 dB, hold mode); enables direct sampling of L/S/C-band RF signals without downconversion. |
| Max Sampling Rate | 3 GS/s; supports Nyquist sampling of signals up to 1.5 GHz or undersampling of multi-GHz carriers. |
| Aperture Jitter | 84 fs RMS; limits SNR degradation to ≤0.5 dB at 4 GHz input, critical for >9-bit effective resolution. |
| Hold Time | 5 ns maximum; allows interfacing with lower-speed ADCs (e.g., 1–2 GS/s) while preserving wideband fidelity. |
| SFDR @ 4 GHz | 61 dB (0.5 Vpp input, 1 GS/s clock); defines spurious-free dynamic range for high-frequency signal analysis. |
| Output Noise | 1.05 mV RMS (hold mode, 500 MHz clock); sets minimum detectable signal floor in receiver chains. |
| Power Dissipation | 1.16 W total; requires thermal management via soldered ground paddle on alumina 4×4 mm package. |
Pinout & Package
RoHS-compliant 4×4 mm ceramic QFN package (alumina body, gold-over-nickel plating, MSL3). Ground paddle (Pin 16) and all ground pins (2, 5, 14, 17, 20, 22) must be soldered to PCB RF ground. Pin 11/12 are CLKDCP/CLKDCN for DC-coupled clock biasing; unused pins (1, 13, 19, 23, 24) are NC.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| INP / INN | Differential analog input | 50 Ω on-chip termination to ground; AC-coupled, 16 MHz low-frequency corner; accepts 1 Vpp full-scale. |
| OUTP / OUTN | Differential analog output | 50 Ω output impedance referenced to Vcc2; requires 5 V Vcc2 if resistively terminated, 6 V if AC-coupled. |
| CLKP / CLKN | Differential AC-coupled clock input | Accepts –10 to +10 dBm sinusoidal drive; 9 MHz low-frequency corner; optimal linearity at ≥4 V/ns slew rate. |
| CLKDCP / CLKDCN | Differential DC-coupled clock bias | Set common-mode voltage to 2.5 V; differential swing ±20–2000 mV in track mode, ∓20–2000 mV in hold mode. |
| Vcc2 | Output stage supply | 6 V ±0.3 V; powers 50 Ω output drivers; must be sequenced first to avoid latch-up. |
| Vcc1 / VccSH / VccCLK | Core, sample-hold, and clock buffer supplies | All 5 V ±0.25 V; Vcc1 powers analog core, VccSH powers switch, VccCLK powers clock buffers. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low aperture jitter | 84 fs RMS enables <10-bit ENOB at 4 GHz input, essential for high-resolution RF digitization. |
| 4.5 GHz hold-mode bandwidth | Supports direct sampling of X-band signals (8–12 GHz) via harmonic undersampling with minimal aliasing. |
| 60+ dB feedthrough rejection | Ensures clean hold-mode waveform integrity by suppressing track-mode leakage across 0–4 GHz. |
| Dual-rank evaluation support | Enables accurate single-T/H linearity measurement using beat-frequency techniques up to 2 GHz clock rates. |
| On-chip 50 Ω terminations | Eliminates external matching networks on INP/INN/OUTP/OUTN, reducing layout complexity and parasitic sensitivity. |
Applications
| Radar & EW Systems | Digital Sampling Oscilloscopes |
|---|---|
Use Scenario: Wideband IF sampling in pulsed radar receivers and electronic warfare (ECM/ELINT) front-ends operating from 2–4 GHz. IC Role / Device Role / Timing Role: Track-and-hold amplifier capturing instantaneous RF envelope for downstream digitization at 1–3 GS/s. Use Value: 4.5 GHz hold bandwidth and 84 fs jitter preserve pulse fidelity and time-of-arrival accuracy for target discrimination. |
Use Scenario: Real-time waveform acquisition in >20 GHz bandwidth sampling scopes using harmonic sampling architecture. IC Role / Device Role / Timing Role: Front-end T/H enabling sub-ns aperture timing control and low-noise hold-phase signal conditioning. Use Value: 1.05 mV RMS hold-mode noise and >60 dB feedthrough rejection minimize baseline distortion during long hold intervals. |
| RF ATE Test Equipment | Software Defined Radio (SDR) |
Use Scenario: High-speed stimulus-response testing of broadband components (filters, amplifiers) from 100 MHz to 4 GHz. IC Role / Device Role / Timing Role: Precision sampling node synchronizing RF stimulus generation and response capture with picosecond timing alignment. Use Value: Aperture delay of –6 ps and 206 ps settling time ensure deterministic phase relationship between stimulus and measurement. |
Use Scenario: Multi-band, multi-standard SDR transceivers requiring flexible IF sampling across LTE, 5G NR, and Wi-Fi bands. IC Role / Device Role / Timing Role: Wideband analog front-end T/H supporting reconfigurable sampling rates (0.1–3 GS/s) and input ranges. Use Value: 1 Vpp full-scale range and 55–61 dB SFDR across 0.5–4 GHz enable simultaneous reception of strong interferers and weak signals. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar track-and-hold amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| HMC660LC4 | Same die, non-lead-free 4×4 mm QFN (SnPb finish); identical electrical specs but different MSL rating and RoHS status. | Legacy industrial systems requiring SnPb assembly; not suitable for new RoHS-compliant designs. | Select HMC660LC4B for lead-free manufacturing; verify board reflow profile matches MSL3 requirements. |
| HMC1061LP4E | Lower bandwidth (2.5 GHz), higher power (1.8 W), 100 fs aperture jitter; 4×4 mm QFN, 5 V single supply. | Better suited for cost-sensitive 1–2 GS/s applications where 4.5 GHz bandwidth is unnecessary. | Choose HMC1061LP4E when system clock rates ≤2 GS/s and thermal budget allows higher dissipation. |
Compared with HMC660LC4B, HMC660LC4 offers identical RF performance but lacks RoHS compliance, while HMC1061LP4E trades 2 GHz bandwidth and 16 fs jitter for simplified power delivery and lower cost - making it viable only where full 4.5 GHz capability is unused.
Availability
HMC660LC4B is available at Aetrix Electronics and suitable for radar front-ends, digital sampling oscilloscopes, and RF ATE test equipment requiring stable component supply despite its discontinued status.
Supply support for HMC660LC4B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Hittite Microwave in 2014, integrating its high-frequency RF and microwave portfolio into ADI's broader signal chain solutions.
The HMC660LC4B belongs to Hittite's high-speed data converter family, engineered specifically for wideband RF sampling in defense, test & measurement, and communications infrastructure.
FAQ
What is the recommended power supply sequencing for the HMC660LC4B?
The HMC660LC4B requires strict power-up order to prevent latch-up: Vcc2 (6 V) must be applied first, followed by Vcc1 (5 V), then VccSH (5 V), and finally VccCLK (5 V). All supplies must remain within ±0.25 V (Vcc1/VccSH/VccCLK) or ±0.3 V (Vcc2) tolerance. Violating this sequence risks permanent damage. The HMC660LC4B datasheet specifies this in Section 9 under "Power Supply Sequencing".
Does the HMC660LC4B support single-ended input drive?
The HMC660LC4B is optimized for differential input drive with on-chip 50 Ω termination to ground on both INP and INN. Single-ended drive is possible but degrades linearity - particularly SFDR and THD - due to common-mode rejection limitations and asymmetric switching. The HMC660LC4B application notes explicitly recommend differential drive for all production designs.
What is the maximum hold time specification for the HMC660LC4B?
The HMC660LC4B has a maximum specified hold time of 5 ns, defined as the duration the output remains within 1% of final value after track-to-hold transition. This is validated under 500 MHz clock conditions with 1 Vpp input. Longer hold durations increase droop error (>0.5%/ns) and degrade SFDR; the HMC660LC4B datasheet confirms 5 ns as the guaranteed limit.
How does clock slew rate affect HMC660LC4B linearity?
HMC660LC4B 2nd-order linearity improves with higher clock slew rate, peaking near ≥4 V/ns. At 1 GHz, this corresponds to +6 dBm sinusoidal clock power; at 3 GHz, –3.5 dBm is required. Square-wave clocks yield superior linearity below 1 GHz. The HMC660LC4B datasheet plots SFDR vs. slew rate (Page 3) and specifies 4 V/ns as the recommended minimum.
Is the HMC660LC4B pin-compatible with other Hittite track-and-hold amplifiers?
No, the HMC660LC4B is not pin-compatible with other Hittite T/H amplifiers such as HMC1061LP4E or HMC661LC4. Its 24-pin 4×4 mm QFN layout, power pin assignments (e.g., dedicated Vcc2), and dual-rank clock interface (CLKP/CLKN + CLKDCP/CLKDCN) are unique. PCB redesign is required for substitution; the HMC660LC4B outline drawing (Page 12) confirms no mechanical or electrical pin overlap.
114352-HMC660LC4B Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Type:
- Amplifier
- Frequency:
- 200MHz ~ 4.5GHz
- Contents:
- Board(s)
- Utilized IC / Part:
- HMC660LC4B
114352-HMC660LC4B FAQ
1.How can I place an order for 114352-HMC660LC4B through Aetrix?
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6.How does Aetrix verify that 114352-HMC660LC4B is sourced from the original manufacturer or authorized distributors?
All 114352-HMC660LC4B products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 114352-HMC660LC4B meets industry standards.
7.What is the process for return or replacement of 114352-HMC660LC4B?
All 114352-HMC660LC4B units undergo pre-shipment inspection (PSI). If there is an issue with 114352-HMC660LC4B, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 114352-HMC660LC4B part is unused and in its original packaging.
Return procedure for 114352-HMC660LC4B:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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