Microchip Technology 23AA04M-I/P
- Part No.:
- 23AA04M-I/P
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
23AA04M-I/P.pdf
- Description:
- IC SRAM 4MBIT SPI/QUAD 8DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
23AA04M-I/P from Microchip Technology is a 4,096-Kbit serial SRAM with SPI/SDI/SQI interface, operating from 1.7V to 3.6V across -40°C to +85°C. It delivers 143 MHz max clock frequency in SQI mode, features built-in ECC logic, and supports byte/page/sequential read/write with user-selectable 32- or 256-byte page size. It is used in industrial data logging systems requiring fast, low-voltage, nonvolatile-capable memory with pin-efficient serial expansion.
For engineers reviewing the 23AA04M-I/P datasheet, 23AA04M-I/P pinout, 23AA04M-I/P application, or 23AA04M-I/P equivalent, key selection considerations include its 8-lead PDIP package, absence of VBAT backup support, SPI mode default on power-up, and distinction from the 14-lead 23LCV04M which includes battery backup and different voltage range.
Technical Context
The 23AA04M-I/P implements a quad-capable serial interface supporting SPI (mode 0/3), SDI, and SQI protocols - with automatic protocol detection via command instructions (EDIO/EQIO/RSTIO). Its internal architecture includes an ECC engine that latches correction status in the STATUS register's ECS bit and retains configuration across power cycles via nonvolatile register settings.
It uses a 24-bit address space (512 KB total) mapped to 256 × 8-bit organization, with page size configurable via STATUS register bit 8. The HOLD/SIO3 pin functions as a pause control in SPI/SDI modes but becomes an active I/O in SQI mode, and all I/O pins support programmable drive strength (8 levels) and slew rate (4 settings).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 4,096 Kbit (512 KB), organized as 256 × 8-bit for direct byte addressing |
| Supply Voltage | 1.7V–3.6V - enables direct interfacing with 1.8V/2.5V/3.3V microcontrollers without level shifters |
| Max Clock Frequency | 143 MHz in SQI mode - achieves up to 572 MB/s effective throughput using 4-bit I/O |
| Operating Temperature | -40°C to +85°C (Industrial grade) - qualified for deployment in factory automation and outdoor edge nodes |
| Active Current | 6 mA max @ 40 MHz / 3.6V - supports low-power burst reads in battery-assisted systems |
| Standby Current | 140 µA typical @ 25°C - reduces system quiescent load during idle periods |
| ECC Support | Built-in error correction logic - detects and corrects single-bit errors transparently during read operations |
| Write Endurance | Unlimited write cycles - eliminates wear-leveling firmware overhead in high-frequency logging applications |
Pinout & Package
23AA04M-I/P is supplied in an 8-lead PDIP package (0.300" wide), pin-compatible with SOIC and TSSOP variants. All 8 leads are functional; no NC pins. Pin 1 is CS, pin 8 is VCC, and VBAT is not present - confirming absence of battery backup capability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS (Pin 1) | Chip Select Input | Active-low enable: drives SO to high-Z when deasserted, enabling multi-device SPI bus sharing |
| SO/SIO1 (Pin 2) | Serial Output / Dual/Quad I/O | Outputs data in SPI mode; bidirectional in SDI/SQI - requires pull-up only in SPI; tri-states immediately on HOLD assertion |
| SIO2 (Pin 3) | Quad I/O Pin | Active only in SQI mode - enables 4-bit parallel data transfer; high-Z in SPI/SDI |
| VSS (Pin 4) | Ground Reference | Primary return path for all I/O and core logic; must be low-inductance connection for signal integrity at 143 MHz |
| SI/SIO0 (Pin 5) | Serial Input / Dual/Quad I/O | Latches command/address/data on SCK rising edge in SPI; bidirectional in SDI/SQI - shares function with SO/SIO1 in dual mode |
| SCK (Pin 6) | Serial Clock Input | Synchronizes all transfers; supports mode 0 (SCK low idle) and mode 3 (SCK high idle); rise/fall time ≤0.1 ns required for 143 MHz operation |
| HOLD/SIO3 (Pin 7) | Hold Control / Quad I/O | Pauses ongoing transfers without resetting state in SPI/SDI; becomes active I/O in SQI - timing-critical setup/hold (1.4 ns min @ 143 MHz) |
| VCC (Pin 8) | Power Supply | Supplies core and I/O circuitry; bypass capacitor (≥100 nF) required within 5 mm for stable 143 MHz operation |
Key Features
| Feature | Design Value |
|---|---|
| Triple-interface compatibility (SPI/SDI/SQI) | Enables scalable bandwidth: 40 MHz SPI → 80 MHz SDI → 143 MHz SQI on same pinout, eliminating redesign for performance upgrades |
| User-configurable page size (32/256 bytes) | Optimizes write efficiency - 32-byte pages reduce latency for small packet logging; 256-byte pages improve throughput for bulk firmware updates |
| Programmable output drive & slew rate | 8 drive strength levels and 4 slew rates allow precise signal integrity tuning for varying trace lengths and noise environments |
| STATUS register with ECC latch (ECS bit) | Provides real-time feedback on memory reliability - software can log or trigger diagnostics when single-bit correction occurs |
| Zero write time architecture | Eliminates write cycle delays - data is stored immediately upon clocking, enabling deterministic timestamping in real-time control loops |
| Unlimited endurance & data retention | Supports continuous logging over product lifetime without wear leveling; retains data down to 1.0V VCC (per D011) |
Applications
| Industrial Data Logger | Medical Sensor Hub |
|---|---|
Use Scenario: Captures timestamped sensor readings (temperature, pressure, ECG) at 1 kHz in portable diagnostic devices with intermittent power. IC Role / Device Role / Timing Role: Serial SRAM buffer storing raw samples before host MCU initiates USB/Bluetooth upload; operates in sequential read mode with auto-address wrap. Use Value: 143 MHz SQI enables full 512 KB dump in <1 ms, minimizing host CPU occupancy and extending battery life between uploads. |
Use Scenario: Aggregates multi-channel biopotential signals in wearable patches, buffering 30 seconds of pre-event data for triggered analysis. IC Role / Device Role / Timing Role: Low-voltage (1.8V) memory buffer interfaced directly to an ARM Cortex-M0+; uses HOLD pin to freeze transfers during BLE radio arbitration. Use Value: 1.7V minimum VCC allows operation during brown-out conditions; ECC ensures clinical-grade data integrity without software overhead. |
| Smart Meter Firmware Cache | PLC I/O Expansion Module |
Use Scenario: Stores firmware update payloads and calibration tables in ANSI C12.22-compliant electricity meters deployed in harsh grid environments. IC Role / Device Role / Timing Role: Nonvolatile-capable SRAM holding critical parameters during mains dropout; configured for 256-byte page writes to minimize update time. Use Value: Unlimited write cycles eliminate field replacement risk; industrial temp rating (-40°C to +85°C) ensures reliability in outdoor meter enclosures. |
Use Scenario: Provides local command/response buffering in DIN-rail mounted I/O modules communicating via Modbus RTU over RS-485. IC Role / Device Role / Timing Role: SPI-mode memory co-located with isolated UART transceiver; STATUS register used to monitor bus protocol mode and drive strength for EMC compliance. Use Value: Programmable slew rate suppresses radiated emissions; 8-lead PDIP simplifies through-hole assembly in high-reliability industrial PCBs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial SRAM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 23LCV04M-I/P | 14-lead package with VBAT pin; 2.2V–3.6V supply; includes automatic battery switchover at 1.75–1.95V VTRIP | Required where external backup battery is needed to retain data during extended VCC loss | Select 23LCV04M-I/P only if VBAT functionality is mandatory; incompatible pinout prevents drop-in replacement |
| IS61WV25616BLL-10MLI | Parallel 256K × 16 SRAM in 48-pin TSOP; 3.3V only; 10 ns access; no serial interface or ECC | Suitable for legacy designs with parallel bus and higher pin count budget; lacks serial protocol flexibility | Choose only when migrating from parallel SRAM; requires PCB redesign and new driver firmware due to interface and timing differences |
Compared with 23AA04M-I/P, the 23LCV04M-I/P adds battery backup but requires 14-pin layout and higher minimum voltage, while the IS61WV25616BLL-10MLI offers faster random access but sacrifices serial simplicity, ECC, and voltage flexibility - making 23AA04M-I/P optimal for new compact, low-power, protocol-adaptable designs.
Availability
23AA04M-I/P is available at Aetrix Electronics and suitable for industrial data loggers, medical sensor hubs, smart meter firmware caches, and PLC I/O expansion modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for 23AA04M-I/P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 23AA04M belongs to Microchip's serial SRAM product line, designed specifically for embedded systems needing high-speed, low-voltage, pin-efficient memory expansion with protocol flexibility and industrial-grade reliability.
FAQ
What is the maximum clock frequency supported by the 23AA04M-I/P in each interface mode?
The 23AA04M-I/P supports up to 40 MHz in standard SPI mode (0x03 READ instruction), 80 MHz equivalent in SDI mode, and 143 MHz in SQI mode (0x0B High-Speed Read instruction). These frequencies are validated across the full industrial temperature range (-40°C to +85°C) and require adherence to AC timing parameters including TCSS, TSU, and THD as specified in Table 1-3 of the datasheet. The 143 MHz rating applies only to SQI mode with proper signal integrity controls.
Does the 23AA04M-I/P support battery backup for data retention during power loss?
No, the 23AA04M-I/P does not support battery backup. It lacks the VBAT pin and associated switchover circuitry found in the 23LCV04M variant. Data retention relies solely on maintaining VCC above 1.0V (per parameter D011), with standby current of 140 µA typical at 25°C. For applications requiring external battery hold-up, the 23LCV04M-I/P - which includes VBAT, automatic switchover at 1.75–1.95V, and data retention down to 1.4V - is the appropriate alternative.
How is the page size configured on the 23AA04M-I/P, and what are the implications for write operations?
The page size on the 23AA04M-I/P is set via bit 8 of the STATUS register: '0' selects 32-byte pages, '1' selects 256-byte pages. This setting determines the boundary for automatic address wrap during page-mode writes. Using 32-byte pages minimizes write latency for small data packets, while 256-byte pages maximize throughput for bulk transfers. Page-mode writes are limited to the selected page; crossing the boundary wraps to the start of the same page - not the next - unless sequential mode is enabled.
What role does the HOLD pin play in the 23AA04M-I/P, and how does it behave across interface modes?
The HOLD/SIO3 pin on the 23AA04M-I/P functions exclusively as a hold control in SPI and SDI modes - pausing ongoing transfers without resetting internal state, allowing the host to service interrupts. In SQI mode, it becomes an active I/O pin (SIO3) and cannot be used for hold. Hold activation requires CS low and a falling edge coinciding with SCK low; exit occurs on rising edge coinciding with SCK low. SO tri-states immediately on HOLD assertion, independent of SCK state.
Is the 23AA04M-I/P pin-compatible with other members of the 23XX04M family, such as the 23LCV04M?
No, the 23AA04M-I/P is not pin-compatible with the 23LCV04M. The 23AA04M-I/P uses an 8-lead PDIP package with pins CS, SO/SIO1, SIO2, VSS, SI/SIO0, SCK, HOLD/SIO3, and VCC. The 23LCV04M uses a 14-lead package with additional VBAT and NC pins, and reassigns pin positions (e.g., VCC is on pin 14, not pin 8). The datasheet explicitly states "23AA04M is only available in 8-lead while 23LCV04M is only available in 14-lead," confirming physical and electrical incompatibility.
23AA04M-I/P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- -
- Memory Type:
- Volatile
- Memory Format:
- SRAM
- Technology:
- SRAM - Synchronous
- Memory Size:
- 4Mbit
- Memory Organization:
- 512K x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 143 MHz
- Write Cycle Time - Word, Page:
- -
- Access Time:
- 7 ns
- Voltage - Supply:
- 1.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
23AA04M-I/P FAQ
1.How can I place an order for 23AA04M-I/P through Aetrix?
Please submit a Request for Quotation (RFQ) for 23AA04M-I/P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 23AA04M-I/P reliable?
The price and inventory of 23AA04M-I/P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 23AA04M-I/P is usually 5 days.
3.What payment methods are accepted for 23AA04M-I/P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 23AA04M-I/P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 23AA04M-I/P?
23AA04M-I/P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 23AA04M-I/P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 23AA04M-I/P?
For technical support, including 23AA04M-I/P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 23AA04M-I/P requirements.
6.How does Aetrix verify that 23AA04M-I/P is sourced from the original manufacturer or authorized distributors?
All 23AA04M-I/P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 23AA04M-I/P meets industry standards.
7.What is the process for return or replacement of 23AA04M-I/P?
All 23AA04M-I/P units undergo pre-shipment inspection (PSI). If there is an issue with 23AA04M-I/P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 23AA04M-I/P part is unused and in its original packaging.
Return procedure for 23AA04M-I/P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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