Microchip Technology 24AA01H-I/ST
- Part No.:
- 24AA01H-I/ST
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
24AA01H-I/ST.pdf
- Description:
- IC EEPROM 1KBIT I2C 8TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
24AA01H-I/ST from Microchip Technology Inc. is a 1 Kbit (128 × 8) I²C-compatible serial EEPROM optimized for low-voltage embedded systems. It operates from 1.7V to 5.5V, supports up to 400 kHz I²C clock frequency, features hardware write-protect for the upper half-array (0x40–0x7F), and delivers ≤1 μA standby current and >1 million erase/write cycles. It is used in firmware storage, calibration data retention, and configuration memory for industrial controllers.
For engineers reviewing the 24AA01H-I/ST datasheet, 24AA01H-I/ST pinout, 24AA01H-I/ST application, or 24AA01H-I/ST equivalent, this page provides verified electrical parameters, package-specific terminal mapping, real-world use cases, and validated alternative parts - all confirmed against Microchip's DS22104A datasheet and official packaging documentation.
Technical Context
The 24AA01H-I/ST implements a true 2-wire I²C slave interface with Schmitt-trigger inputs on SDA and SCL, slope-controlled outputs to suppress ground bounce, and internal address pointer auto-increment for sequential reads. Its half-array write-protection is controlled solely by the WP pin state (VCC = protected, VSS = enabled), with no internal connection to A0–A2 pins.
It supports byte and page (up to 8 bytes) writes with typical 3 ms write cycle time, uses an internal high-voltage generator for EEPROM programming, and includes VCC threshold detection that disables write operations below ~1.5V. All timing parameters-including THD:STA, TSU:DAT, and TAA-are specified across 1.7V–5.5V and –40°C to +85°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 1 Kbit (128 × 8-bit array), organized as single block - enables compact nonvolatile storage without external addressing logic. |
| Supply Voltage Range | 1.7V to 5.5V - supports direct interfacing with 1.8V, 2.5V, 3.3V, and 5V microcontrollers without level-shifting. |
| I²C Clock Frequency | Up to 400 kHz (≥2.5V), 100 kHz (1.7V–2.5V) - ensures compatibility with standard and fast-mode I²C masters across voltage ranges. |
| Write Endurance | ≥1,000,000 erase/write cycles - guarantees long-term reliability in field-updatable systems like sensor calibration registers. |
| Data Retention | >200 years at +25°C - ensures persistent storage of critical configuration data over product lifetime without refresh. |
| Standby Current | ≤1 μA at VCC = 5.5V, TA = –40°C to +85°C - minimizes power draw in battery-backed or energy-harvesting applications. |
| Write Protection | Hardware-enabled half-array (0x40–0x7F) via WP pin - allows safe storage of factory-set parameters while permitting user-modifiable lower memory. |
Pinout & Package
24AA01H-I/ST is supplied in an 8-lead Plastic Thin Shrink Small Outline (TSSOP) package (4.4 mm body width), RoHS-compliant and Pb-free. Pin 1 is marked with a dot or bevel; orientation follows standard TSSOP pin 1 indicator.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Address Input | No internal connection - may be left floating or tied to VSS/VCC without affecting operation or I²C address (fixed at 0xA0–0xA7). |
| A1 | Address Input | No internal connection - unused; does not influence device addressing or functionality. |
| A2 | Address Input | No internal connection - irrelevant for 24AA01H; full 1 Kbit space addressed via fixed 4-bit control code '1010'. |
| VSS | Ground | Reference return path for all internal circuitry and I/O - must be connected to system ground plane with low-impedance trace. |
| SDA | Serial Data I/O | Open-drain bidirectional bus line - requires external pull-up resistor (2 kΩ @ 400 kHz, 10 kΩ @ 100 kHz) to VCC. |
| SCL | Serial Clock Input | Master-generated clock input with Schmitt trigger - determines timing of all read/write transfers and supports noise suppression up to 50 ns spikes. |
| WP | Write-Protect Input | Digital enable/disable control: VSS = full write access; VCC = write-protection of addresses 0x40–0x7F only - no effect on read operations. |
| VCC | Power Supply | +1.7V to +5.5V supply input - powers EEPROM core, I/O buffers, and HV generator; includes brown-out detection below ~1.5V. |
Key Features
| Feature | Design Value |
|---|---|
| Low-Voltage Operation | Functional down to 1.7V - eliminates need for voltage regulators in 1.8V microcontroller systems, reducing BOM count and board space. |
| Page Write Capability | Up to 8-byte burst writes per Stop condition - reduces I²C transaction overhead and improves firmware update efficiency vs. byte-by-byte writes. |
| Noise Immunity | Schmitt-trigger inputs + 50 ns input filter on SDA/SCL - prevents false Start/Stop detection in electrically noisy industrial environments (e.g., motor drives, PLCs). |
| Hardware Write Protection | Pin-controlled (WP) protection of upper 512 bits - enables secure storage of immutable calibration constants or security keys without software lock mechanisms. |
| ESD Robustness | >4,000V HBM - withstands handling and system-level ESD events common in manufacturing and field service without additional protection components. |
Applications
| Industrial Sensor Calibration | Embedded Firmware Storage |
|---|---|
Use Scenario: Storing temperature-compensation coefficients and sensor offset values during factory calibration of pressure transducers. IC Role / Device Role / Timing Role: Nonvolatile configuration memory holding factory-programmed correction data accessed at boot by MCU ADC driver. Use Value: Enables one-time calibration with guaranteed >200-year data retention and immunity to power-loss corruption during field deployment. |
Use Scenario: Holding bootloader configuration flags, network MAC address, and last-known operational state in smart metering endpoints. IC Role / Device Role / Timing Role: Persistent parameter store updated infrequently but read at every power-on reset via I²C interface. Use Value: Reduces MCU firmware size by offloading static configuration, and supports field firmware updates without requiring flash reprogramming. |
| Consumer Appliance Settings | Medical Device Configuration |
Use Scenario: Saving user preferences (e.g., cooking time, temperature presets) in microwave ovens and washing machines across power cycles. IC Role / Device Role / Timing Role: Low-power settings memory accessed only during UI initialization or mode change, with <1 μA standby draw. Use Value: Extends battery backup life in cordless appliances and meets stringent energy-efficiency standards (e.g., ENERGY STAR). |
Use Scenario: Storing device serial number, calibration history, and usage counters in portable diagnostic tools (e.g., pulse oximeters). IC Role / Device Role / Timing Role: Secure, tamper-resistant memory for regulatory-mandated audit logs and device identity - write-protected upper half prevents accidental overwrite. Use Value: Meets IEC 62304 software lifecycle requirements for Class B medical devices by ensuring configuration integrity and traceability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 24LC01B-I/ST | Requires minimum 2.5V VCC; same 1 Kbit density, 400 kHz speed, and TSSOP-8 package. | Not suitable for 1.8V systems; otherwise identical functional behavior and pinout. | Select 24LC01B-I/ST only if system VCC ≥2.5V and legacy design validation exists for that variant. |
| AT24C01C-SSHM-T | 1 Kbit I²C EEPROM from Microchip (acquired Atmel); supports 1.7V–5.5V, but lacks hardware half-array write-protect (WP pin controls full-array only). | Requires software-managed protection for partial memory regions; different I²C address map (0x50–0x57 vs. 0xA0–0xA7). | Choose AT24C01C-SSHM-T when full-array write protection suffices and Atmel-compatible toolchains are in use. |
Compared with 24AA01H-I/ST, the 24LC01B-I/ST sacrifices low-voltage operation for identical packaging and timing, while the AT24C01C-SSHM-T trades hardware half-array protection for broader vendor ecosystem support - making 24AA01H-I/ST optimal for 1.8V systems requiring selective, pin-controlled write security.
Availability
24AA01H-I/ST is available at Aetrix Electronics and suitable for industrial sensor calibration, embedded firmware storage, and consumer appliance settings requiring stable component supply, long-term data retention, and low-voltage I²C compatibility.
Supply support for 24AA01H-I/ST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 24AA01H belongs to Microchip's 24XX01H family of ultra-low-voltage serial EEPROMs, designed specifically for reliable nonvolatile data storage in space-constrained, battery-sensitive, and wide-temperature industrial and automotive applications.
FAQ
What is the I²C address range supported by the 24AA01H-I/ST?
The 24AA01H-I/ST uses a fixed 4-bit control code of '1010' and ignores A0–A2 inputs, resulting in a hardwired I²C address of 0xA0 (write) / 0xA1 (read). Unlike higher-density variants, it does not support address pin selection - simplifying bus arbitration in single-device configurations.
Does the 24AA01H-I/ST require external pull-up resistors on SDA and SCL lines?
Yes, the 24AA01H-I/ST has open-drain SDA and SCL terminals and requires external pull-up resistors. Recommended values are 2 kΩ for 400 kHz operation and 10 kΩ for 100 kHz, connected to the same VCC rail used by the device - essential for proper signal rise time and noise margin compliance.
How does hardware write-protection work on the 24AA01H-I/ST?
When the WP pin is tied to VCC, the 24AA01H-I/ST disables write access to memory addresses 0x40–0x7F (upper 512 bits); addresses 0x00–0x3F remain writable. When WP = VSS, full-array write access is enabled. This protection is active during power-up and requires no software initialization.
What is the maximum page write size for the 24AA01H-I/ST?
The 24AA01H-I/ST supports page writes of up to 8 bytes per transaction. Page boundaries align to 8-byte increments (e.g., 0x00–0x07, 0x08–0x0F); crossing a boundary causes wraparound within the current page - requiring firmware to validate address alignment before initiating multi-byte writes.
Is the 24AA01H-I/ST compatible with 1.8V microcontrollers?
Yes, the 24AA01H-I/ST is fully compatible with 1.8V systems: its 1.7V–5.5V VCC range, 0.3×VCC/0.7×VCC input thresholds, and Schmitt-trigger inputs ensure robust communication with 1.8V I²C masters without level shifters - confirmed across –40°C to +85°C operation.
24AA01H-I/ST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 128 x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 1.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
24AA01H-I/ST FAQ
1.How can I place an order for 24AA01H-I/ST through Aetrix?
Please submit a Request for Quotation (RFQ) for 24AA01H-I/ST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 24AA01H-I/ST reliable?
The price and inventory of 24AA01H-I/ST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 24AA01H-I/ST is usually 5 days.
3.What payment methods are accepted for 24AA01H-I/ST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 24AA01H-I/ST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 24AA01H-I/ST?
24AA01H-I/ST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 24AA01H-I/ST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 24AA01H-I/ST?
For technical support, including 24AA01H-I/ST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 24AA01H-I/ST requirements.
6.How does Aetrix verify that 24AA01H-I/ST is sourced from the original manufacturer or authorized distributors?
All 24AA01H-I/ST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 24AA01H-I/ST meets industry standards.
7.What is the process for return or replacement of 24AA01H-I/ST?
All 24AA01H-I/ST units undergo pre-shipment inspection (PSI). If there is an issue with 24AA01H-I/ST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 24AA01H-I/ST part is unused and in its original packaging.
Return procedure for 24AA01H-I/ST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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