Microchip Technology 24AA32AT/SM
- Part No.:
- 24AA32AT/SM
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
24AA32AT/SM.pdf
- Description:
- IC EEPROM 32KBIT I2C 8SOIJ
- Quantity:
- Payment:

- Shipping:

Inventory:1,335
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
24AA32AT/SM from Microchip Technology is a 32-Kbit I²C-compatible serial EEPROM organized as 4K × 8-bit, operating from 1.7V to 5.5V with 400 kHz max clock frequency, 5 ms max page write time, and industrial temperature range (–40°C to +85°C). It features hardware write-protection via the WP pin, Schmitt-trigger inputs for noise immunity, and 32-byte page write buffer-used in embedded system configuration storage, sensor calibration data retention, and firmware parameter backup.
For engineers reviewing the 24AA32AT/SM datasheet, 24AA32AT/SM pinout, 24AA32AT/SM application, or 24AA32AT/SM equivalent, key selection considerations include its 1.7V low-voltage operation, 1 µA standby current, I²C address flexibility (A0–A2), SOIJ-8 package compatibility, and AEC-Q100 qualification for automotive-grade reliability.
Technical Context
The 24AA32AT/SM implements a two-wire I²C interface with open-drain SDA/SCL pins requiring external pull-ups, supports standard (100 kHz) and fast-mode (400 kHz) timing, and uses internal address pointer logic for sequential, random, and current-address read operations. Its EEPROM array is partitioned into 128 pages of 32 bytes each, with page-write capability limited to within physical page boundaries.
Write protection is controlled solely by the WP pin state at Stop bit sampling; no internal software lock exists. Acknowledge polling is required to detect write cycle completion, and the device does not generate ACK during internal erase/write-enabling host-driven bus efficiency without fixed delay timing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 32 Kbit (4,096 × 8-bit), enabling storage of up to 4 KB of nonvolatile configuration or calibration data |
| VCC Range | 1.7V–5.5V - supports direct connection to 1.8V, 3.3V, and 5V logic domains without level shifting |
| Max Clock Frequency | 400 kHz at VCC ≥ 2.5V; 100 kHz at 1.7V ≤ VCC < 2.5V - ensures reliable I²C timing across full voltage range |
| Page Write Time | ≤ 5 ms - defines worst-case latency for updating up to 32 bytes, critical for real-time parameter save operations |
| Endurance | 1,000,000 erase/write cycles per page - guarantees long-term reliability in frequently updated applications like metering logs |
| Data Retention | > 200 years at +85°C - ensures integrity of stored calibration coefficients over product lifetime |
| Standby Current | 1 µA typical at I-temp - minimizes power draw in battery-backed or energy-harvesting systems |
Pinout & Package
24AA32AT/SM is supplied in an 8-lead SOIJ (Small Outline J-Lead) package, 5.28 mm wide, with gull-wing leads and JEDEC-standard pinout. The package is RoHS-compliant and rated for industrial temperature operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Chip Address Input | LSB of 3-bit hardware address; sets device I²C client address when tied to VSS or VCC - enables up to 8 devices on same bus |
| A1 | Chip Address Input | Middle bit of 3-bit hardware address; combined with A0/A2, selects one of eight possible 7-bit I²C addresses (1010xxx) |
| A2 | Chip Address Input | MSB of 3-bit hardware address; determines unique I²C address in multi-device configurations |
| VSS | Ground Reference | Primary return path for all internal circuitry; must be connected to system ground plane for stable operation |
| SDA | Serial Data I/O | Bidirectional open-drain I²C data line; requires external pull-up resistor (2 kΩ for 400 kHz, 10 kΩ for 100 kHz) |
| SCL | Serial Clock Input | Input-only I²C clock line; synchronizes all data transfers; driven by host controller only |
| WP | Write-Protect Control | Active-high hardware lock: tied to VCC disables all writes (reads unaffected); sampled at Stop bit edge |
| VCC | Power Supply | Single supply input (1.7V–5.5V); powers EEPROM core, interface logic, and charge pump for write operations |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger inputs on SDA/SCL | 5% VCC hysteresis (min) - rejects noise spikes up to 50 ns, eliminating need for external filtering in noisy industrial environments |
| Output slope control | Controlled SDA fall time (20+0.1CB ns) - prevents ground bounce and signal integrity issues on shared PCB traces |
| 32-byte page write buffer | Reduces I²C transaction count by up to 32× vs. byte-write - improves bus throughput and lowers host CPU overhead |
| Hardware write-protection (WP) | Pin-level, non-volatile lock - prevents accidental or malicious firmware corruption without software intervention or fuse programming |
| AEC-Q100 qualification | Qualified for automotive Grade 3 (–40°C to +85°C) - validated for under-hood and infotainment subsystems requiring extended reliability |
Applications
| Industrial Sensor Node | Automotive Body Control Module |
|---|---|
|
Use Scenario: Storing factory-calibrated offset/gain values for temperature and pressure sensors in wireless IoT nodes. IC Role / Device Role / Timing Role: Nonvolatile configuration register holding trim parameters accessed at power-up before ADC initialization. Use Value: Enables plug-and-play sensor replacement without field recalibration; leverages 200-year data retention and 1.7V operation for coin-cell-powered designs. |
Use Scenario: Saving user preferences (seat position, mirror angle, lighting profiles) in body control units with frequent power cycling. IC Role / Device Role / Timing Role: Dedicated parameter storage IC interfaced directly to MCU I²C peripheral; WP pin tied to ignition-sensed logic. Use Value: AEC-Q100 qualification ensures reliability across thermal cycles; 1 µA standby current extends battery drain time during vehicle sleep mode. |
| Medical Diagnostic Handheld | Smart Energy Meter |
|
Use Scenario: Archiving last-measured vital signs (SpO₂, pulse rate) and device self-test logs between clinical sessions. IC Role / Device Role / Timing Role: Secure, tamper-resistant memory for audit-trail data; WP pin monitored by safety MCU to prevent unauthorized overwrite. Use Value: >1M endurance supports daily logging for >2,700 days; RoHS compliance meets medical device environmental regulations. |
Use Scenario: Recording tariff schedules, demand-response events, and firmware update history in utility-grade electricity meters. IC Role / Device Role / Timing Role: Secondary nonvolatile storage backing up critical billing data when main flash fails or during brownout conditions. Use Value: 5 ms page write time allows rapid capture of time-stamped events; 400 kHz I²C interface enables fast data dump during meter commissioning. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 24LC32AT/SM | Requires minimum 2.5V VCC; same pinout, timing, and memory organization but higher voltage floor | Not suitable for 1.8V-only systems; otherwise interchangeable in 3.3V/5V industrial designs | Select 24LC32AT/SM only if system VCC never drops below 2.5V and AEC-Q100 is not required |
| AT24C32D-MAHM-T | Same 32-Kbit I²C EEPROM, 1.7V–5.5V, but uses different internal architecture; WP pin functionally identical | Validated for extended temp (–40°C to +125°C); lacks AEC-Q100 certification | Choose AT24C32D-MAHM-T for high-temp industrial use where automotive qualification is unnecessary |
Compared with 24LC32AT/SM and AT24C32D-MAHM-T, the 24AA32AT/SM uniquely combines 1.7V operation, AEC-Q100 qualification, and SOIJ-8 packaging - making it the only option for automotive or ultra-low-voltage industrial applications requiring guaranteed reliability and legacy footprint compatibility.
Availability
24AA32AT/SM is available at Aetrix Electronics and suitable for industrial sensor nodes, automotive body control modules, medical handheld diagnostics, and smart energy metering requiring stable component supply, long-lifecycle support, and RoHS-compliant sourcing.
Supply support for 24AA32AT/SM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 24AA32A family was designed specifically for cost-sensitive, space-constrained embedded systems requiring robust, low-power nonvolatile storage - emphasizing I²C simplicity, voltage flexibility, and automotive-grade reliability.
FAQ
What is the maximum I²C clock frequency supported by the 24AA32AT/SM?
The 24AA32AT/SM supports up to 400 kHz when VCC is 2.5V or higher. At VCC between 1.7V and 2.5V, the maximum clock frequency is reduced to 100 kHz to ensure timing margin compliance. This dual-speed capability allows seamless integration across 1.8V, 3.3V, and 5V systems without protocol changes. The 24AA32AT/SM datasheet specifies THIGH, TLOW, and setup/hold times for both modes.
How does the WP pin function on the 24AA32AT/SM?
The WP (Write-Protect) pin on the 24AA32AT/SM is sampled at the Stop bit of each I²C write command. When tied to VCC, it disables all write operations (byte and page) while permitting unlimited reads. When tied to VSS, writes are enabled. The 24AA32AT/SM does not support software-controlled write protection - security relies entirely on this hardware pin state.
Can the 24AA32AT/SM be used in automotive applications?
Yes - the 24AA32AT/SM is AEC-Q100 qualified for Grade 3 (–40°C to +85°C) and manufactured in Microchip's certified automotive production flow. Its SOIJ-8 package, 1.7V operation, and 1,000,000-cycle endurance make it suitable for body control modules, infotainment settings storage, and ADAS calibration data retention where reliability under thermal stress is mandatory. The 24AA32AT/SM meets automotive ESD requirements (>4 kV HBM).
What package type is used for the 24AA32AT/SM?
The 24AA32AT/SM uses an 8-lead SOIJ (Small Outline J-Lead) package, 5.28 mm wide, with gull-wing leads and JEDEC-standard pinout. This package provides mechanical robustness for reflow soldering, excellent thermal performance, and compatibility with legacy SOIC footprints using minor pad adjustments. The marking "I/SM" on the top surface confirms industrial temperature grade and SOIJ packaging.
Does the 24AA32AT/SM support multi-device addressing on the same I²C bus?
Yes - the 24AA32AT/SM supports up to eight devices on a single I²C bus using hardware address pins A0, A1, and A2. These pins configure the three LSBs of the 7-bit client address (base 1010xxx), allowing contiguous 256-Kbit expansion when multiple 24AA32AT/SM units are deployed. The SOT-23 variant lacks these pins, but the 24AA32AT/SM in SOIJ-8 fully implements this feature per Microchip's Device Selection Table.
24AA32AT/SM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 32Kbit
- Memory Organization:
- 4K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIJ
24AA32AT/SM FAQ
1.How can I place an order for 24AA32AT/SM through Aetrix?
Please submit a Request for Quotation (RFQ) for 24AA32AT/SM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 24AA32AT/SM reliable?
The price and inventory of 24AA32AT/SM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 24AA32AT/SM is usually 5 days.
3.What payment methods are accepted for 24AA32AT/SM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 24AA32AT/SM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 24AA32AT/SM?
24AA32AT/SM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 24AA32AT/SM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 24AA32AT/SM?
For technical support, including 24AA32AT/SM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 24AA32AT/SM requirements.
6.How does Aetrix verify that 24AA32AT/SM is sourced from the original manufacturer or authorized distributors?
All 24AA32AT/SM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 24AA32AT/SM meets industry standards.
7.What is the process for return or replacement of 24AA32AT/SM?
All 24AA32AT/SM units undergo pre-shipment inspection (PSI). If there is an issue with 24AA32AT/SM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 24AA32AT/SM part is unused and in its original packaging.
Return procedure for 24AA32AT/SM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
24AA32AT/SM Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

