Microchip Technology 24LC01BH-E/ST
- Part No.:
- 24LC01BH-E/ST
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
24LC01BH-E/ST.pdf
- Description:
- IC EEPROM 1KBIT I2C 8TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
24LC01BH-E/ST from Microchip Technology Inc. is a 1 Kbit (128 × 8) I²C-compatible serial EEPROM designed for nonvolatile data storage in space-constrained embedded systems. It operates from 2.5V to 5.5V, supports 400 kHz I²C clocking, features hardware write-protection for the upper half-array (40h–7Fh), and delivers 1 μA max standby current at industrial and automotive temperature ranges.
For engineers reviewing the 24LC01BH-E/ST datasheet, 24LC01BH-E/ST pinout, 24LC01BH-E/ST application, or 24LC01BH-E/ST equivalent, this page provides verified electrical parameters, package-specific terminal mapping, real-world use cases in automotive and industrial control, and two validated alternative parts with documented functional and application-level differences.
Technical Context
The 24LC01BH-E/ST implements a 2-wire I²C slave interface with fixed 7-bit address prefix '1010' and three don't-care bits, enabling single-device bus operation without address conflicts. Its internal architecture includes a 8-byte page buffer, Schmitt-triggered SDA/SCL inputs, and slope-controlled outputs to suppress ground bounce.
Write protection is implemented via the WP pin: tied to VCC, it disables writes to addresses 40h–7Fh while permitting full read access; tied to VSS, full read/write functionality is enabled. The device uses on-chip charge-pump voltage generation to support EEPROM programming across its specified VCC range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 1 Kbit (128 × 8-bit array), organized as one block - enables compact configuration storage without external addressing logic |
| VCC Operating Range | 2.5V to 5.5V - compatible with 3.3V and 5V microcontroller I/O domains without level shifting |
| I²C Clock Frequency | Up to 400 kHz (at VCC ≥ 2.5V) - supports fast parameter updates in real-time control loops |
| Page Write Time | 3 ms typical - allows burst storage of up to 8 bytes per write cycle, reducing bus occupancy vs. byte writes |
| Endurance & Retention | 1 million erase/write cycles; >200 years data retention - suitable for firmware logging and calibration storage in field-deployed equipment |
| Temperature Range | −40°C to +125°C (Automotive E-grade) - qualified for under-hood and powertrain applications |
| ESD Protection | >4 kV HBM - enhances robustness in manufacturing and end-equipment handling environments |
Pinout & Package
24LC01BH-E/ST is supplied in an 8-lead Plastic Thin Shrink Small Outline (TSSOP) package (4.4 mm body width), RoHS-compliant and Pb-free. Pin 1 is A0 (NC), Pin 4 is VSS, Pin 5 is SDA, Pin 6 is SCL, Pin 7 is WP, and Pin 8 is VCC. A0, A1, and A2 are unconnected and may be left floating or tied to VSS/VCC without functional impact.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0, A1, A2 | Not connected (NC) | No internal bond; no pull-up/down required - simplifies PCB layout and eliminates address configuration overhead |
| VSS | Ground reference | Primary return path for all internal circuitry; must be low-impedance to ensure noise immunity during I²C communication |
| SDA | Serial data I/O (open-drain) | Bi-directional bus line requiring external 2 kΩ pull-up for 400 kHz operation; supports ACK polling during write cycles |
| SCL | Serial clock input | Master-generated timing signal; Schmitt-trigger input ensures reliable edge detection in noisy environments |
| WP | Hardware write-protect control | Logic-high (VCC) enables half-array protection (40h–7Fh); critical for safeguarding calibrated parameters against accidental overwrite |
| VCC | Power supply | Accepts 2.5–5.5V; powers internal HV generator for EEPROM programming - no external charge pump needed |
Key Features
| Feature | Design Value |
|---|---|
| Half-array hardware write-protect | WP pin disables writes to memory addresses 40h–7Fh while allowing full read access - protects calibration data without software lock-in |
| Schmitt-trigger inputs + output slope control | Eliminates ground bounce and improves noise immunity on SDA/SCL lines - enables reliable operation in electrically harsh automotive environments |
| 1 μA max standby current (I-temp) | Enables always-on configuration storage in battery-backed systems with multi-year shelf life - critical for energy harvesting and remote sensor nodes |
| Page write capability (up to 8 bytes) | Reduces I²C transaction count by 8× vs. byte writes - lowers CPU overhead and bus contention in time-critical firmware update routines |
| 100 kHz / 400 kHz dual-speed compatibility | Backward-compatible with legacy 100 kHz controllers while supporting high-throughput parameter loading in modern designs |
Applications
| Automotive Body Control Module | Industrial PLC Configuration Storage |
|---|---|
Use Scenario: Storing door lock actuation history, mirror position presets, and lighting profiles in a vehicle body control unit. IC Role / Device Role / Timing Role: Nonvolatile configuration register holding user-defined settings across ignition cycles. Use Value: Leverages −40°C to +125°C rating and WP pin to preserve factory-calibrated thresholds against unintended overwrites during service-mode reprogramming. |
Use Scenario: Retaining I/O mapping, scaling factors, and alarm thresholds in a DIN-rail mounted programmable logic controller. IC Role / Device Role / Timing Role: Persistent parameter store accessed during cold boot and runtime recalibration. Use Value: 1 million endurance cycles support daily firmware updates and field-service recalibrations over 10+ years of operation. |
| Medical Infusion Pump Calibration | Smart Energy Meter Firmware Logs |
Use Scenario: Recording flow rate calibration coefficients and maintenance timestamps in Class II medical devices. IC Role / Device Role / Timing Role: Tamper-resistant data vault for regulatory audit trails and safety-critical constants. Use Value: Hardware write-protect (WP = VCC) prevents unauthorized modification of dose-delivery parameters while permitting read-only diagnostics. |
Use Scenario: Logging voltage sag events, tamper alerts, and firmware version rollbacks in ANSI C12.22-compliant utility meters. IC Role / Device Role / Timing Role: High-reliability event logger synchronized to meter's real-time clock interrupt. Use Value: 200-year data retention ensures compliance with 20-year utility asset lifecycle requirements without periodic refresh. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 24AA01HT-I/ST | Lower VCC min (1.7V), same 1 Kbit density and TSSOP-8 package - but rated only for −40°C to +85°C (I-temp) | Not qualified for under-hood automotive use; suitable for consumer and industrial control where extended temperature is not required | Select when operating below 2.5V or cost sensitivity outweighs automotive qualification needs |
| AT24C01D-SSHM-T | Same 1 Kbit size, 2.5–5.5V range, and −40°C to +125°C rating; supports 1 MHz I²C (vs. 400 kHz), but lacks hardware half-array write-protect | Requires software-based protection schemes; better suited for high-speed parameter streaming where write security is managed at firmware level | Select when higher bus throughput is prioritized and WP functionality is implemented in host MCU firmware |
Compared with 24LC01BH-E/ST, the 24AA01HT-I/ST offers wider voltage flexibility but lacks automotive temperature qualification, while the AT24C01D-SSHM-T provides faster I²C speed but removes hardware-enforced memory segmentation - making 24LC01BH-E/ST the optimal choice for safety-critical automotive and industrial applications requiring deterministic, pin-level write protection.
Availability
24LC01BH-E/ST is available at Aetrix Electronics and suitable for automotive body electronics, industrial PLCs, and medical device calibration storage requiring stable component supply across extended temperature and long product lifecycles.
Supply support for 24LC01BH-E/ST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 24LC01BH belongs to Microchip's serial EEPROM product line, engineered specifically for robust, low-power nonvolatile storage in automotive, industrial, and medical applications where data integrity and extended temperature reliability are mandatory.
FAQ
What is the minimum VCC voltage required for reliable operation of the 24LC01BH-E/ST?
The 24LC01BH-E/ST requires a minimum VCC of 2.5V for full specification compliance, including 400 kHz I²C operation and guaranteed write functionality. Operation below 2.5V is not supported - unlike the 24AA01H variant, which supports down to 1.7V. This 2.5V threshold ensures stable internal charge-pump operation for EEPROM programming across the full −40°C to +125°C automotive temperature range.
How does the WP pin function on the 24LC01BH-E/ST, and what memory region does it protect?
When the WP pin on the 24LC01BH-E/ST is tied to VCC, write operations to memory addresses 40h through 7Fh (the upper half of the 128-byte array) are disabled; reads remain fully functional. Writes to addresses 00h–3Fh are unaffected. When WP is tied to VSS, full read/write access to the entire memory is enabled. This hardware-level protection is active independently of I²C commands and requires no firmware intervention.
Can the 24LC01BH-E/ST be used in a 100 kHz I²C system, and what are the timing implications?
Yes, the 24LC01BH-E/ST supports 100 kHz I²C operation - specifically when VCC is below 2.5V (though that condition is outside its rated range). Within its valid 2.5–5.5V range, it is fully compliant with 400 kHz timing, offering tighter THIGH/TLOW specifications (600 ns/1300 ns min) than standard 100 kHz mode. Using it at 100 kHz introduces no risk but sacrifices bandwidth; timing margins increase significantly, improving noise margin in electrically noisy environments.
What is the maximum number of bytes that can be written in a single page write cycle of the 24LC01BH-E/ST?
The 24LC01BH-E/ST supports page writes of up to 8 bytes per cycle. The internal page buffer holds these bytes until a STOP condition is issued, after which the device initiates an internal 3 ms typical write cycle. Attempting to write more than 8 bytes before STOP causes address wraparound within the same physical page - data beyond the 8-byte boundary overwrites earlier bytes in that page, not adjacent pages. Proper firmware must enforce page boundaries (every 8-byte aligned address).
Is the 24LC01BH-E/ST pin-compatible with other Microchip 1 Kbit I²C EEPROMs in TSSOP-8 packages?
Yes, the 24LC01BH-E/ST shares identical pinout and footprint with other Microchip 1 Kbit I²C EEPROMs in 8-lead TSSOP packages, including the 24AA01HT-I/ST and 24LC01B-I/ST. All variants use the same A0–A2 (NC), VSS, SDA, SCL, WP, VCC arrangement. However, voltage range, temperature grade, and write-protect behavior differ - direct substitution requires validation of VCC minimum, ambient temperature, and WP implementation in the target system.
24LC01BH-E/ST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 128 x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
24LC01BH-E/ST FAQ
1.How can I place an order for 24LC01BH-E/ST through Aetrix?
Please submit a Request for Quotation (RFQ) for 24LC01BH-E/ST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 24LC01BH-E/ST reliable?
The price and inventory of 24LC01BH-E/ST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 24LC01BH-E/ST is usually 5 days.
3.What payment methods are accepted for 24LC01BH-E/ST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 24LC01BH-E/ST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 24LC01BH-E/ST?
24LC01BH-E/ST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 24LC01BH-E/ST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 24LC01BH-E/ST?
For technical support, including 24LC01BH-E/ST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 24LC01BH-E/ST requirements.
6.How does Aetrix verify that 24LC01BH-E/ST is sourced from the original manufacturer or authorized distributors?
All 24LC01BH-E/ST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 24LC01BH-E/ST meets industry standards.
7.What is the process for return or replacement of 24LC01BH-E/ST?
All 24LC01BH-E/ST units undergo pre-shipment inspection (PSI). If there is an issue with 24LC01BH-E/ST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 24LC01BH-E/ST part is unused and in its original packaging.
Return procedure for 24LC01BH-E/ST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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