Microchip Technology 24LC01BH-I/ST
- Part No.:
- 24LC01BH-I/ST
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
24LC01BH-I/ST.pdf
- Description:
- IC EEPROM 1KBIT I2C 8TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,892
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Product details
Overview
24LC01BH-I/ST from Microchip Technology Inc. is a 1 Kbit (128 × 8) I²C-compatible serial EEPROM designed for nonvolatile data storage in space-constrained embedded systems. It operates from 2.5V to 5.5V, supports up to 400 kHz clock frequency, features hardware write-protection for the upper half-array (40h–7Fh), and delivers >1 million erase/write cycles with >200 years of data retention. It is commonly used in industrial sensor calibration storage and power-management configuration memory.
For engineers reviewing the 24LC01BH-I/ST datasheet, 24LC01BH-I/ST pinout, 24LC01BH-I/ST application, or 24LC01BH-I/ST equivalent, this page provides verified electrical parameters, package-specific terminal mapping, real-world use scenarios, and validated alternative parts for design-in flexibility and supply continuity.
Technical Context
The 24LC01BH-I/ST implements a two-wire I²C interface with Schmitt-trigger inputs and slope-controlled outputs to suppress noise and eliminate ground bounce. Its internal address pointer enables current-address, random, and sequential read modes, while its 8-byte page buffer supports efficient page writes with 3 ms typical write time.
Write protection is implemented via the WP pin: tied to VCC, it disables writes to addresses 40h–7Fh; tied to VSS, full-array access is enabled. The device includes an internal VCC threshold detector that disables erase/write logic below 1.5V, ensuring data integrity during brown-out conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 1 Kbit (128 × 8-bit array), organized as one block - supports compact firmware parameter storage without external addressing logic. |
| Supply Voltage Range | 2.5V to 5.5V - compatible with standard 3.3V and 5V logic domains; not operable below 2.5V unlike 24AA01H variants. |
| I²C Clock Frequency | Up to 400 kHz (at VCC ≥ 2.5V) - enables faster configuration loading than 100 kHz legacy systems, reducing boot-time latency. |
| Write Endurance | ≥1,000,000 erase/write cycles - suitable for applications requiring frequent field-updatable settings (e.g., metering calibration counters). |
| Data Retention | ≥200 years at +85°C - ensures long-term reliability in industrial environments without periodic refresh. |
| Standby Current | ≤1 μA at VCC = 5.5V - minimizes quiescent power draw in battery-backed or energy-harvesting systems. |
| Page Write Time | 3 ms typical - defines minimum inter-write interval when updating multiple configuration bytes; impacts real-time update responsiveness. |
Pinout & Package
24LC01BH-I/ST is supplied in an 8-lead Plastic Thin Shrink Small Outline (TSSOP) package (4.4 mm body width), RoHS-compliant and Pb-free. Pin 1 is marked with a dot or beveled corner; orientation follows standard TSSOP pin 1 indexing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Address Input | No internal connection - may be left floating or tied to VSS/VCC; does not affect device addressing or operation. |
| A1 | Address Input | No internal connection - unused; no impact on I²C slave address (fixed to 1010xxx0/1). |
| A2 | Address Input | No internal connection - functionally inert; simplifies PCB layout by eliminating need for pull-up/down resistors. |
| VSS | Ground | Reference return path for all internal circuitry; must be low-impedance to ensure noise immunity and stable EEPROM operation. |
| SDA | Serial Data I/O | Open-drain bidirectional bus line - requires external pull-up (2 kΩ typical for 400 kHz); carries address, command, and data bits. |
| SCL | Serial Clock Input | Master-generated synchronous clock - controls timing of all I²C transactions; Schmitt-trigger input rejects sub-50 ns noise spikes. |
| WP | Write-Protect Input | Logic-level controlled protection enable - VCC = half-array (40h–7Fh) write-protected; VSS = full-array writable. |
| VCC | Power Supply | Primary power rail (2.5–5.5V) - powers EEPROM core and I/O buffers; internal voltage detector prevents writes below 1.5V. |
Key Features
| Feature | Design Value |
|---|---|
| Half-Array Hardware Write-Protection | WP pin physically disables writes to upper 512 bits (40h–7Fh), enabling secure storage of factory-calibrated constants alongside user-modifiable parameters. |
| Schmitt Trigger Inputs + Input Filtering | Input hysteresis ≥0.05×VCC and 50 ns spike suppression on SDA/SCL - eliminates false start/stop detection in electrically noisy industrial enclosures. |
| Page Write Capability (8 bytes) | Reduces I²C transaction overhead by up to 8× versus byte writes - critical for updating multi-byte configuration structures within tight timing windows. |
| Low-Voltage Operation (2.5V min) | Enables direct interfacing with 2.5V/3.3V microcontrollers without level-shifting, reducing BOM count and signal integrity risk. |
| ESD Robustness | ≥4,000V HBM - withstands handling and board-level ESD events common in manufacturing and field service environments. |
Applications
| Industrial Sensor Calibration | Power Supply Configuration |
|---|---|
Use Scenario: Storing temperature-compensated offset/gain coefficients for analog sensor front-ends in programmable logic controllers. IC Role / Device Role / Timing Role: Nonvolatile configuration register - retains calibration data across power cycles and supports infrequent updates during maintenance. Use Value: Eliminates need for external trimming components and enables field recalibration without hardware modification. |
Use Scenario: Holding digital control parameters (e.g., overvoltage threshold, soft-start ramp rate) in digitally managed DC-DC modules. IC Role / Device Role / Timing Role: System configuration memory - accessed at startup to initialize PMIC registers before power delivery begins. Use Value: Enables single-hardware-design support for multiple output voltage variants via software-defined configuration. |
| Medical Device Settings Storage | Consumer Appliance User Preferences |
Use Scenario: Saving therapy mode selections and usage history in portable diagnostic equipment with battery backup. IC Role / Device Role / Timing Role: Low-power persistent data logger - operates from backup coin cell during main power loss; writes only on parameter change. Use Value: Guarantees regulatory-compliant audit trail retention without active microcontroller supervision. |
Use Scenario: Retaining user-selected wash cycle, spin speed, and delay start time in smart washing machines. IC Role / Device Role / Timing Role: Human-interface configuration store - updated asynchronously via MCU after button press; read at power-on. Use Value: Delivers consistent user experience across unplanned outages and firmware updates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 24AA01HT-I/ST | Lower VCC min (1.7V), same 1 Kbit density and I²C interface - but lacks automotive temp grade option. | Preferred where system operates down to 1.8V (e.g., Li-ion powered devices); not qualified for -40°C to +125°C. | Select 24AA01HT-I/ST only if 1.7V operation is required and automotive temperature range is unnecessary. |
| AT24C01D-SSHM-T | Same 1 Kbit size, 1.7–5.5V range, and 400 kHz I²C, but offers extended endurance (4M cycles) and enhanced ESD (8 kV). | Better suited for high-write-frequency applications (e.g., logging event counters); pinout identical but manufacturer-specific marking. | Choose AT24C01D-SSHM-T when >1M write cycles or higher ESD immunity is mandated by end-equipment standards. |
Compared with 24LC01BH-I/ST, the 24AA01HT-I/ST enables lower-voltage operation at the cost of automotive qualification, while the AT24C01D-SSHM-T trades Microchip's established industrial pedigree for higher endurance and ESD margin in new designs.
Availability
24LC01BH-I/ST is available at Aetrix Electronics and suitable for industrial sensor calibration, power supply configuration, medical device settings storage, and consumer appliance user preferences requiring stable component supply and long-term lifecycle support.
Supply support for 24LC01BH-I/ST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontroller, mixed-signal, analog, and Flash-IP solutions, headquartered in Chandler, Arizona, with global design and sales operations.
The 24LC01BH belongs to Microchip's serial EEPROM product line, engineered for reliable, low-power nonvolatile storage in industrial, automotive, and consumer applications where data integrity and long-term retention are critical.
FAQ
What is the minimum operating voltage for the 24LC01BH-I/ST?
The 24LC01BH-I/ST requires a minimum supply voltage of 2.5V, as specified in the Device Selection Table and Electrical Characteristics section. Unlike the 24AA01H variant, it is not rated for operation below 2.5V - attempting to power the 24LC01BH-I/ST at 1.8V will result in undefined behavior or failure to respond on the I²C bus.
Does the 24LC01BH-I/ST support standard I²C addressing?
Yes, the 24LC01BH-I/ST uses a fixed 7-bit I²C slave address of 0b1010xxx, where the three least-significant bits (xxx) are "don't care" and do not affect device selection. This allows multiple 24LC01BH-I/ST devices to share the same bus without address conflict, provided no other I²C device uses address 0x50–0x57.
How does the WP pin function on the 24LC01BH-I/ST?
On the 24LC01BH-I/ST, the WP pin enables hardware-based write protection: when tied to VCC, writes to memory addresses 40h–7Fh are inhibited while reads remain fully functional; when tied to VSS, full-array read/write access is permitted. This allows secure storage of factory-programmed calibration data separate from user-modifiable fields.
What package type does the 24LC01BH-I/ST use?
The 24LC01BH-I/ST uses an 8-lead Plastic Thin Shrink Small Outline (TSSOP) package with a 4.4 mm body width, denoted by the "ST" suffix per Microchip's Product Identification System. It is RoHS-compliant, Pb-free, and compatible with standard surface-mount reflow profiles.
Can the 24LC01BH-I/ST perform page writes, and what is the page size?
Yes, the 24LC01BH-I/ST supports page writes of up to 8 bytes per transaction. The internal page buffer holds these bytes until a Stop condition is issued, after which all 8 bytes are written simultaneously. Crossing a physical page boundary (every 8-byte aligned address) causes wraparound - software must enforce alignment to avoid unintended overwrites.
24LC01BH-I/ST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 128 x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
24LC01BH-I/ST FAQ
1.How can I place an order for 24LC01BH-I/ST through Aetrix?
Please submit a Request for Quotation (RFQ) for 24LC01BH-I/ST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 24LC01BH-I/ST reliable?
The price and inventory of 24LC01BH-I/ST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 24LC01BH-I/ST is usually 5 days.
3.What payment methods are accepted for 24LC01BH-I/ST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 24LC01BH-I/ST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 24LC01BH-I/ST?
24LC01BH-I/ST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 24LC01BH-I/ST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 24LC01BH-I/ST?
For technical support, including 24LC01BH-I/ST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 24LC01BH-I/ST requirements.
6.How does Aetrix verify that 24LC01BH-I/ST is sourced from the original manufacturer or authorized distributors?
All 24LC01BH-I/ST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 24LC01BH-I/ST meets industry standards.
7.What is the process for return or replacement of 24LC01BH-I/ST?
All 24LC01BH-I/ST units undergo pre-shipment inspection (PSI). If there is an issue with 24LC01BH-I/ST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 24LC01BH-I/ST part is unused and in its original packaging.
Return procedure for 24LC01BH-I/ST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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