Microchip Technology 24LC02BH-I/SN
- Part No.:
- 24LC02BH-I/SN
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
24LC02BH-I/SN.pdf
- Description:
- IC EEPROM 2KBIT I2C 400KHZ 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,070
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
24LC02BH-I/SN from Microchip Technology Inc. is a 2 Kbit I²C-compatible serial EEPROM organized as 256 × 8-bit memory with hardware write-protect for the upper half-array (80h–FFh), 400 kHz max clock frequency at VCC ≥ 2.5 V, and industrial temperature range (–40°C to +85°C). It operates down to 2.5 V, supports page writes of up to 8 bytes, and delivers ≤1 µA standby current - ideal for battery-backed real-time clock calibration storage in embedded sensor nodes.
For engineers reviewing the 24LC02BH-I/SN datasheet, 24LC02BH-I/SN pinout, 24LC02BH-I/SN application, or 24LC02BH-I/SN equivalent, key selection criteria include its half-array write-protection logic, Schmitt-triggered SDA/SCL inputs for noise immunity, 5 ms max page write time, and compatibility with standard I²C host controllers across 1.7–5.5 V supply ranges (with clock rate derating below 2.5 V).
Technical Context
The 24LC02BH-I/SN implements a two-wire I²C interface with fixed 7-bit client address (1010xxx) and R/W bit control, supporting byte and page write modes with automatic internal erase/write timing. Its Address Pointer increments on each read/write, enabling sequential access across the full 256-byte array.
Write protection is implemented via the WP pin: tied to VCC, it disables writes to addresses 0x80–0xFF while allowing full read access; tied to VSS, full read/write capability is restored. A0–A2 pins are unconnected and may be left floating or tied to VSS/VCC without functional impact.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 2 Kbit (256 × 8-bit), sufficient for device ID, calibration coefficients, or configuration flags in space-constrained designs. |
| VCC Range | 2.5 V to 5.5 V - enables direct interfacing with 3.3 V and 5 V microcontrollers without level shifting. |
| Max Clock Frequency | 400 kHz at VCC ≥ 2.5 V - supports high-speed I²C communication for rapid parameter updates. |
| Page Write Buffer | 8-byte buffer - reduces bus transactions when storing multi-byte data like sensor offsets or firmware version strings. |
| Write Protection | Hardware-enabled half-array (0x80–0xFF) protection via WP pin - prevents accidental overwrites of critical firmware or security keys. |
| Endurance & Retention | 1 million erase/write cycles and >200 years data retention - suitable for long-life industrial deployments with infrequent updates. |
| ESD Protection | >4 kV HBM - enhances robustness in handling-sensitive manufacturing and field-repair environments. |
Pinout & Package
24LC02BH-I/SN uses an 8-lead narrow SOIC (SN) package per Microchip drawing C04-057-SN Rev F, with 1.27 mm pitch, 3.90 mm body width, and gull-wing leads. Pin 1 is marked by a notch or dot; orientation follows standard SOIC conventions.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0, A1, A2 | No-connect (NC) | Internally unconnected; may float or tie to VSS/VCC - no effect on addressing or operation. |
| VSS | Ground reference | Return path for all internal circuitry; must be low-impedance to ensure stable I²C signal integrity. |
| SDA | Serial Data I/O | Open-drain bidirectional bus line requiring external pull-up (2 kΩ for 400 kHz); carries address, data, and ACK/NACK signals. |
| SCL | Serial Clock input | Master-generated clock synchronizing all transfers; Schmitt-trigger input suppresses noise-induced false edges. |
| WP | Write-Protect control | Active-high enable: VCC locks 0x80–0xFF; VSS enables full write access - critical for secure boot or factory calibration lock. |
| VCC | Power supply | 2.5–5.5 V operating range; powers EEPROM core and I/O buffers; decoupling capacitor (0.1 µF) required near pin. |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger inputs on SDA/SCL | Eliminates bus noise susceptibility by enforcing clean high/low transitions - essential in electrically noisy industrial enclosures. |
| Output slope control | Reduces ground bounce during switching, preventing false logic states in mixed-signal systems sharing common return paths. |
| Self-timed erase/write cycle | Removes need for external timing control or polling delay loops - simplifies firmware and improves deterministic response. |
| Hardware write-protect for 0x80–0xFF | Physically blocks writes to upper memory block without software overhead - enforces immutable firmware or cryptographic key storage. |
| 1 µA max standby current (I-temp) | Enables multi-year battery life in always-on IoT edge devices where EEPROM retains state between wake cycles. |
Applications
| Smart Meter Calibration Storage | Industrial PLC Configuration Backup |
|---|---|
Use Scenario: Storing meter-specific gain/offset coefficients and tamper-event logs in utility-grade electricity meters. IC Role / Device Role / Timing Role: Nonvolatile parameter storage with guaranteed write integrity during power loss events. Use Value: Enables field recalibration without firmware reflash and maintains regulatory compliance through auditable, write-protected calibration history. |
Use Scenario: Preserving I/O mapping, PID loop parameters, and alarm thresholds in programmable logic controllers after power cycling. IC Role / Device Role / Timing Role: Persistent configuration register bank accessible via standard I²C from main MCU. Use Value: Reduces startup time by restoring operational state in <100 ms; WP pin secures factory-set safety limits against runtime corruption. |
| Medical Sensor Module ID | Automotive Body Control Unit NVM |
Use Scenario: Holding unique sensor serial number, manufacturing date, and calibration timestamp in disposable patient monitoring sensors. IC Role / Device Role / Timing Role: Tamper-resistant identity and traceability storage compliant with ISO 13485 requirements. Use Value: Supports UDI (Unique Device Identification) mandates with >200-year data retention and AEC-Q100-qualified reliability. |
Use Scenario: Storing seat position presets, mirror angles, and lighting profiles in automotive body control modules. IC Role / Device Role / Timing Role: Automotive-grade nonvolatile memory interfaced directly to 3.3 V CAN/LIN microcontroller I²C peripheral. Use Value: Meets AEC-Q100 Grade 2 (–40°C to +105°C) requirements; 1M endurance ensures >15-year service life under frequent user customization. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24C02C-SSHM-T (Microchip) | Same 2 Kbit capacity, 1.7–5.5 V VCC, but supports 1 MHz I²C; no hardware write-protect pin - uses software lock bits. | Lacks dedicated WP pin; requires firmware-level protection logic, increasing code complexity and vulnerability to reset-induced corruption. | Choose when higher speed (1 MHz) is needed and software-controlled protection suffices. |
| ST24C02-WDT6-TR (STMicroelectronics) | 2 Kbit, 1.8–5.5 V, 400 kHz, WP pin present; but only rated for industrial temp (–40°C to +85°C), not AEC-Q100 qualified. | Not automotive-qualified; lacks extended temperature support and ESD rating (>4 kV) of 24LC02BH-I/SN. | Acceptable for cost-sensitive industrial controls where AEC-Q100 and 125°C extended grade are unnecessary. |
Compared with AT24C02C-SSHM-T and ST24C02-WDT6-TR, the 24LC02BH-I/SN uniquely combines hardware-based half-array write protection, AEC-Q100 qualification, and >4 kV ESD tolerance - making it the preferred choice for safety-critical automotive and medical applications where physical write-locking and robustness are mandatory.
Availability
24LC02BH-I/SN is available at Aetrix Electronics and suitable for smart meter calibration storage, industrial PLC configuration backup, and automotive body control unit NVM requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant sourcing.
Supply support for 24LC02BH-I/SN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 24LC02BH belongs to Microchip's 24XX02H family of I²C EEPROMs, designed specifically for reliable, low-power nonvolatile data storage in space- and power-constrained embedded systems across industrial, automotive, and medical markets.
FAQ
What is the minimum VCC required for 24LC02BH-I/SN operation?
The 24LC02BH-I/SN requires a minimum VCC of 2.5 V for full functionality, including 400 kHz I²C operation. Below 2.5 V, the device is not specified - unlike the 24AA02H variant, which supports down to 1.7 V. This makes the 24LC02BH-I/SN appropriate for 3.3 V and 5 V systems but unsuitable for sub-2.5 V ultra-low-power designs.
How does the WP pin function on the 24LC02BH-I/SN?
On the 24LC02BH-I/SN, the WP pin provides hardware-level write protection: when tied to VCC, writes to memory addresses 0x80–0xFF are inhibited while reads remain fully enabled; when tied to VSS, full read/write access is restored. This physical lock prevents accidental or malicious overwrites of critical calibration or security data without requiring firmware intervention.
Can the 24LC02BH-I/SN be used in automotive applications?
Yes - the 24LC02BH-I/SN is AEC-Q100 qualified for automotive use and rated for the industrial temperature range (–40°C to +85°C). Its >4 kV ESD rating, 1 million endurance cycles, and hardware write-protect make it suitable for body control units, seat/mirror memory modules, and other non-safety-critical automotive subsystems requiring robust, long-life NVM.
What is the maximum page write time for the 24LC02BH-I/SN?
The maximum page write time for the 24LC02BH-I/SN is 5 ms, covering both single-byte and 8-byte page writes. During this internally timed cycle, the device does not acknowledge I²C commands - a condition detectable via acknowledge polling - ensuring predictable timing behavior for real-time firmware integration.
Are A0, A1, and A2 pins functional on the 24LC02BH-I/SN?
No - A0, A1, and A2 pins on the 24LC02BH-I/SN are not internally connected and serve no functional purpose. They may be left floating or tied to VSS or VCC without affecting device operation, addressing, or I²C communication. The device uses a fixed 7-bit client address (1010xxx) with the three least-significant bits treated as "don't care".
24LC02BH-I/SN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 2Kbit
- Memory Organization:
- 256 x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
24LC02BH-I/SN FAQ
1.How can I place an order for 24LC02BH-I/SN through Aetrix?
Please submit a Request for Quotation (RFQ) for 24LC02BH-I/SN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 24LC02BH-I/SN reliable?
The price and inventory of 24LC02BH-I/SN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 24LC02BH-I/SN is usually 5 days.
3.What payment methods are accepted for 24LC02BH-I/SN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 24LC02BH-I/SN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 24LC02BH-I/SN?
24LC02BH-I/SN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 24LC02BH-I/SN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 24LC02BH-I/SN?
For technical support, including 24LC02BH-I/SN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 24LC02BH-I/SN requirements.
6.How does Aetrix verify that 24LC02BH-I/SN is sourced from the original manufacturer or authorized distributors?
All 24LC02BH-I/SN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 24LC02BH-I/SN meets industry standards.
7.What is the process for return or replacement of 24LC02BH-I/SN?
All 24LC02BH-I/SN units undergo pre-shipment inspection (PSI). If there is an issue with 24LC02BH-I/SN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 24LC02BH-I/SN part is unused and in its original packaging.
Return procedure for 24LC02BH-I/SN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
24LC02BH-I/SN Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
