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Microchip Technology 24LC04BH-E/ST
- Part No.:
- 24LC04BH-E/ST
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
24LC04BH-E/ST.pdf
- Description:
- IC EEPROM 4KBIT I2C 8TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:4,796
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Product details
Overview
24LC04BH-E/ST from Microchip Technology Inc. is a 4-Kbit I²C-compatible serial EEPROM organized as two 256 × 8-bit blocks, operating from 2.5V to 5.5V with 400 kHz max clock frequency, 1 µA standby current (I-temp), and hardware write-protect for the upper half-array (100h–1FFh). It supports industrial (–40°C to +85°C) and extended (–40°C to +125°C) temperature ranges and is packaged in an 8-lead SOIC.
For engineers reviewing the 24LC04BH-E/ST datasheet, 24LC04BH-E/ST pinout, 24LC04BH-E/ST application, or 24LC04BH-E/ST equivalent, key selection criteria include VCC range compatibility (2.5V–5.5V), half-array write-protection behavior, I²C timing compliance at 400 kHz, endurance (>1 million cycles), and SOIC-8 thermal/mechanical fit in space-constrained embedded systems.
Technical Context
The 24LC04BH-E/ST implements a two-wire I²C interface with Schmitt-trigger inputs and slope-controlled outputs to suppress noise and eliminate ground bounce. Its internal address counter enables current-address, random, and sequential read modes, while the 16-byte page buffer supports efficient multi-byte writes within physical page boundaries (00h–0Fh, 10h–1Fh, etc.).
Write protection is implemented via the WP pin: tied to VSS enables full-array access; tied to VCC locks addresses 100h–1FFh against writes while permitting reads. The device uses self-timed erase/write cycles with 5 ms maximum page write time and supports acknowledge polling to detect write completion without fixed delays.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 4 Kbit (512 bytes), organized as two independent 256 × 8-bit blocks - enables block-level addressing and selective access without cross-block interference. |
| VCC Operating Range | 2.5V to 5.5V - ensures compatibility with 3.3V and 5V logic systems; excludes sub-2.5V operation unlike 24AA04H/24FC04H variants. |
| Max Clock Frequency | 400 kHz - defines maximum I²C bus speed; requires SCL high/low times ≥600 ns / ≥1300 ns respectively at 2.5V–5.5V. |
| Write Endurance | 1,000,000 cycles - guarantees long-term reliability in firmware parameter storage or calibration data logging applications. |
| Data Retention | 200 years - ensures nonvolatile data integrity across product lifecycles without refresh, critical for medical or industrial equipment. |
| Standby Current | 1 µA (I-temp), 5 µA (E-temp) - minimizes quiescent power draw in battery-backed or energy-harvesting systems. |
| Page Write Buffer | 16 bytes - allows burst writes within a single physical page (e.g., 00h–0Fh), reducing I²C transaction overhead vs. byte-by-byte writes. |
Pinout & Package
24LC04BH-E/ST is supplied in an 8-lead SOIC (SN) package per Microchip drawing C04-057-SN Rev F, with 1.27 mm pitch, 3.90 mm body width, and JEDEC-standard footprint. Pin 1 is marked by a beveled corner or notch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0, A1, A2 | Address Input (NC) | No internal connection; may be left floating or tied to VSS/VCC without functional impact - simplifies PCB routing and eliminates external pull-up/down requirements. |
| VSS | Ground Reference | Primary return path for all internal circuitry; must be low-impedance and co-located with host MCU ground to minimize noise coupling into I²C lines. |
| SDA | Serial Data I/O | Open-drain bidirectional bus line requiring external pull-up (2 kΩ typical for 400 kHz); transmits addresses, data, and ACK/NACK signals under host SCL control. |
| SCL | Serial Clock Input | Input-only clock line driven by host; synchronizes all data transfers; rising/falling edges define sampling and setup/hold timing windows per I²C specification. |
| WP | Write-Protect Control | Logic-level input: VSS enables full-array writes; VCC protects upper 256-byte block (100h–1FFh) - provides hardware-enforced data security for critical configuration registers. |
| VCC | Power Supply | Single 2.5V–5.5V supply powering EEPROM core and I/O buffers; decoupling capacitor (0.1 µF ceramic) required within 5 mm of pin for stable operation. |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger inputs on SDA/SCL | Enables robust operation on noisy PCBs or long traces by rejecting sub-50 ns spikes and ensuring clean signal thresholds (VIH = 0.7×VCC, VIL = 0.3×VCC). |
| Output slope control | Prevents ground bounce during fast transitions, eliminating false Start/Stop detection and enabling reliable communication in mixed-signal environments. |
| Hardware write-protect for 100h–1FFh | Physically disables writes to upper memory block when WP = VCC - prevents accidental overwrites of boot parameters or calibration data without software intervention. |
| 16-byte page write buffer | Reduces I²C bus occupancy by up to 94% vs. byte writes (e.g., 16-byte update in one transaction instead of 16 separate writes), improving system responsiveness. |
| 1 µA standby current (I-temp) | Extends battery life in always-on monitoring nodes; meets ultra-low-power design targets for IoT edge sensors and portable diagnostics tools. |
Applications
| Industrial Sensor Calibration Storage | Medical Device Configuration Memory |
|---|---|
|
Use Scenario: Storing factory-calibrated sensor offsets and gain coefficients in programmable logic controllers or environmental monitors. IC Role / Device Role / Timing Role: Nonvolatile parameter storage accessed during power-up or recalibration routines via I²C; retains values across 200-year lifespan. Use Value: Eliminates need for external calibration hardware; enables field-updatable calibration tables while protecting critical coefficients via WP pin. |
Use Scenario: Holding user-configurable therapy settings and safety limits in portable infusion pumps or diagnostic handhelds. IC Role / Device Role / Timing Role: Secure configuration register bank supporting read/write operations during setup mode; write-protected upper block stores FDA-mandated defaults. Use Value: Ensures regulatory compliance by preventing unauthorized modification of safety-critical parameters through hardware-level WP enforcement. |
| Automotive Body Control Module NVM | Consumer Appliance User Preference Storage |
|
Use Scenario: Saving seat/mirror position presets and lighting profiles in AEC-Q100-qualified body control units. IC Role / Device Role / Timing Role: Extended-temperature EEPROM (–40°C to +125°C) interfacing with CAN-connected microcontrollers via I²C for infrequent but mission-critical writes. Use Value: Meets automotive reliability standards (1M endurance, 200-year retention) while operating across full under-hood thermal range without derating. |
Use Scenario: Retaining cooking programs, timer settings, and language preferences in smart ovens and washing machines after power loss. IC Role / Device Role / Timing Role: Low-power (1 µA standby) serial NVM accessed during UI initialization; tolerates brown-out conditions down to 2.5V. Use Value: Delivers seamless user experience with instant recall of preferences, even in regions with unstable grid voltage. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 24AA04H-I/ST | Wider VCC range (1.7V–5.5V); lower 100 kHz max clock below 2.5V; same 4-Kbit organization and SOIC-8 package. | Supports 1.8V microcontrollers and battery-powered devices where 2.5V minimum is not achievable. | Select 24AA04H-I/ST only if sub-2.5V operation is required; otherwise 24LC04BH-E/ST offers higher speed and tighter E-temp qualification. |
| 24FC04H-E/ST | 1 MHz max clock; 1.7V–5.5V VCC; same 4-Kbit size and E-temp rating; differs in AC timing (e.g., THIGH = 260 ns). | Enables faster firmware updates in high-throughput production test systems or real-time data loggers. | Choose 24FC04H-E/ST when I²C bus speed >400 kHz is mandatory; verify host controller timing margins due to stricter rise/fall time requirements. |
Compared with 24AA04H-I/ST and 24FC04H-E/ST, the 24LC04BH-E/ST delivers optimal balance of speed (400 kHz), temperature range (–40°C to +125°C), and proven reliability in automotive and industrial deployments - making it the preferred choice where 2.5V+ supply stability and AEC-Q100 alignment are prioritized over ultra-low-voltage or maximum-speed operation.
Availability
24LC04BH-E/ST is available at Aetrix Electronics and suitable for industrial sensor calibration storage, medical device configuration memory, and automotive body control module NVM requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for 24LC04BH-E/ST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontroller, analog, and Flash-IP solutions, serving industrial, automotive, and consumer markets with high-reliability semiconductor products.
The 24LC04BH-E/ST belongs to Microchip's serial EEPROM product line, designed specifically for robust, low-power nonvolatile data storage in harsh environments - emphasizing endurance, data retention, and hardware-level write protection for mission-critical applications.
FAQ
What is the minimum VCC voltage required for reliable operation of the 24LC04BH-E/ST?
The 24LC04BH-E/ST requires a minimum VCC of 2.5V for guaranteed functionality across its specified temperature ranges. Unlike the 24AA04H variant, it is not rated for operation below 2.5V - attempting to power the 24LC04BH-E/ST at 1.8V or 2.2V may result in undefined behavior, failed writes, or incomplete I²C acknowledgments. Always verify supply rail stability within the 2.5V–5.5V window during system validation.
How does the WP pin function on the 24LC04BH-E/ST, and what memory region does it protect?
On the 24LC04BH-E/ST, the WP pin enables hardware write-protection for the upper 256-byte memory block (addresses 100h–1FFh) when tied to VCC; full-array write access is restored when WP is tied to VSS. This protection applies only to write operations - reads remain fully accessible regardless of WP state. The lower block (000h–0FFh) is never protected by this mechanism, allowing flexible partitioning of user-modifiable vs. factory-locked data.
Can the 24LC04BH-E/ST be used interchangeably with the 24AA04H-I/ST on the same PCB layout?
No - although both share the same SOIC-8 package and pinout, the 24LC04BH-E/ST and 24AA04H-I/ST differ in VCC minimum (2.5V vs. 1.7V), maximum clock frequency (400 kHz vs. 100 kHz below 2.5V), and temperature grade (E-temp vs. I-temp). Substituting one for the other without verifying supply voltage, timing margins, and thermal environment risks intermittent failures or reduced endurance. They are functional alternatives only when design constraints align with their respective specifications.
What is the maximum number of bytes that can be written in a single page write operation for the 24LC04BH-E/ST?
The 24LC04BH-E/ST supports a 16-byte page write buffer, allowing up to 16 bytes to be loaded into the on-chip buffer and committed to memory upon receipt of a Stop condition. However, page writes must remain within a single physical page boundary (e.g., addresses 00h–0Fh or 10h–1Fh); crossing a boundary causes wraparound within the current page rather than advancing to the next. Software must enforce alignment to avoid unintended overwrites.
Is the 24LC04BH-E/ST qualified for automotive applications, and what evidence supports this claim?
Yes - the 24LC04BH-E/ST is explicitly AEC-Q100 qualified for automotive use, as confirmed in Microchip's DS20002119C datasheet. Its extended temperature range (–40°C to +125°C), 1,000,000 write cycles, 200-year data retention, and robust I²C interface with Schmitt-trigger inputs and slope control meet the reliability and environmental stress requirements defined in AEC-Q100 Rev G. This qualification covers the entire 24LC04BH family, including the -E/ST variant.
24LC04BH-E/ST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 4Kbit
- Memory Organization:
- 256 x 8 x 2
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
24LC04BH-E/ST FAQ
1.How can I place an order for 24LC04BH-E/ST through Aetrix?
Please submit a Request for Quotation (RFQ) for 24LC04BH-E/ST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 24LC04BH-E/ST reliable?
The price and inventory of 24LC04BH-E/ST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 24LC04BH-E/ST is usually 5 days.
3.What payment methods are accepted for 24LC04BH-E/ST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 24LC04BH-E/ST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 24LC04BH-E/ST?
24LC04BH-E/ST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 24LC04BH-E/ST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 24LC04BH-E/ST?
For technical support, including 24LC04BH-E/ST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 24LC04BH-E/ST requirements.
6.How does Aetrix verify that 24LC04BH-E/ST is sourced from the original manufacturer or authorized distributors?
All 24LC04BH-E/ST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 24LC04BH-E/ST meets industry standards.
7.What is the process for return or replacement of 24LC04BH-E/ST?
All 24LC04BH-E/ST units undergo pre-shipment inspection (PSI). If there is an issue with 24LC04BH-E/ST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 24LC04BH-E/ST part is unused and in its original packaging.
Return procedure for 24LC04BH-E/ST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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