Microchip Technology 24LC04BH-I/P
- Part No.:
- 24LC04BH-I/P
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
24LC04BH-I/P.pdf
- Description:
- IC EEPROM 4KBIT I2C 400KHZ 8DIP
- Quantity:
- Payment:

- Shipping:

Inventory:2,198
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Product details
Overview
24LC04BH-I/P from Microchip Technology Inc. is a 4-Kbit I²C-compatible serial EEPROM organized as two 256 × 8-bit blocks, operating from 2.5V to 5.5V with 400 kHz max clock frequency, 1 µA standby current, and hardware write-protect for the upper half-array (100h–1FFh). It supports industrial temperature range (−40°C to +85°C) and is packaged in 8-lead PDIP.
For engineers reviewing the 24LC04BH-I/P datasheet, 24LC04BH-I/P pinout, 24LC04BH-I/P application, or 24LC04BH-I/P equivalent, this page delivers verified electrical specs, I²C timing constraints, WP-controlled memory protection behavior, and real-world use cases in embedded configuration storage and firmware parameter retention.
Technical Context
The 24LC04BH-I/P implements a two-wire I²C interface with Schmitt-trigger inputs and slope-controlled outputs to suppress noise and eliminate ground bounce. Its internal address counter enables current-address, random, and sequential read modes, while the 16-byte page buffer supports efficient burst writes.
Write protection is implemented via the WP pin: tied to VCC, it disables writes to addresses 100h–1FFh; tied to VSS, full array access is enabled. The device uses self-timed erase/write cycles with 5 ms maximum page write time and supports ACK polling to detect write completion without fixed delays.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 4 Kbit (2 × 256 × 8-bit blocks), enabling compact nonvolatile storage for boot parameters or calibration data |
| VCC Range | 2.5V to 5.5V - compatible with standard 3.3V and 5V logic systems without level-shifting |
| Max Clock Frequency | 400 kHz at VCC ≥ 2.5V - supports high-speed I²C communication while maintaining timing margin |
| Standby Current | 1 µA (I-temp.) - minimizes power draw in battery-backed or energy-sensitive applications |
| Page Write Buffer | 16 bytes - allows efficient multi-byte updates with single Stop condition, reducing bus overhead |
| Endurance | 1 million erase/write cycles - ensures long-term reliability in frequently updated configuration storage |
| Data Retention | 200 years - guarantees data integrity across product lifecycle without refresh |
Pinout & Package
8-Lead Plastic Dual In-Line Package (PDIP), 300 mil body width, through-hole mounting. Pin 1 is marked with notch or dot; leads are tin-plated, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Address Input | No internal connection - may be left floating or tied to VSS/VCC without affecting operation |
| A1 | Address Input | No internal connection - unused; no impact on device addressing or functionality |
| A2 | Address Input | No internal connection - not bonded; irrelevant for 24LC04BH-I/P's fixed 4-bit client address (1010) |
| VSS | Ground | Reference node for all digital and analog circuitry; must be low-impedance connection |
| SDA | Serial Data I/O | Open-drain bidirectional bus line requiring external pull-up resistor (2 kΩ typical for 400 kHz) |
| SCL | Serial Clock Input | Input-only clock line synchronized to host controller; determines data transfer rate and timing margins |
| WP | Write-Protect Control | Logic-high (VCC) enables half-array protection (100h–1FFh); logic-low (VSS) enables full-array write access |
| VCC | Power Supply | Primary supply rail (2.5–5.5V); powers EEPROM core, interface logic, and internal charge pump |
Key Features
| Feature | Design Value |
|---|---|
| Half-Array Hardware Write-Protection | WP pin physically disables writes to upper 2 Kbit block (100h–1FFh), preventing accidental corruption of critical firmware settings |
| Schmitt Trigger Inputs | Input hysteresis ≥0.05×VCC rejects noise spikes on SDA/SCL lines, ensuring robust operation in electrically noisy environments |
| Page Write Capability | 16-byte buffer enables atomic multi-byte updates with single Stop condition, minimizing bus contention and improving write throughput |
| ACK Polling Support | Host can repeatedly issue write control byte until ACK is received, eliminating need for fixed 5 ms delay and optimizing I²C bus utilization |
| Extended Temperature Range Option | Available in Industrial (−40°C to +85°C) and Extended (−40°C to +125°C) grades - validated for automotive and industrial deployment |
Applications
| Industrial Sensor Calibration Storage | Embedded System Boot Configuration |
|---|---|
Use Scenario: Storing factory-calibrated sensor offset/gain coefficients in programmable logic controllers and environmental monitors. IC Role / Device Role / Timing Role: Nonvolatile configuration register holding persistent calibration data accessed during system power-up or reinitialization. Use Value: Enables field-replaceable sensors without recalibration; leverages 200-year data retention and 1M-cycle endurance for lifetime recalibration logging. | Use Scenario: Holding bootloader configuration flags, network MAC addresses, and secure boot keys in edge gateways and industrial HMIs. IC Role / Device Role / Timing Role: I²C-configurable parameter store read early in boot sequence to configure processor peripherals and security modules. Use Value: WP pin protects critical boot keys (stored in 100h–1FFh) from runtime overwrite, while allowing user-modifiable settings in lower block. |
| Consumer Appliance User Preference Memory | Automotive Body Control Module Settings |
Use Scenario: Retaining user-selected display brightness, language, and timer presets in smart home appliances after AC power loss. IC Role / Device Role / Timing Role: Low-power I²C slave storing volatile UI state into nonvolatile memory during shutdown or idle periods. Use Value: 1 µA standby current extends battery backup life; 2.5V minimum VCC ensures reliable operation during brown-out conditions. | Use Scenario: Saving seat/mirror position memory, lighting profiles, and door lock preferences in automotive BCMs compliant with AEC-Q100 Grade 2. IC Role / Device Role / Timing Role: Automotive-qualified EEPROM interfacing with microcontroller over I²C for infrequent but mission-critical parameter storage. Use Value: AEC-Q100 qualification and −40°C to +125°C extended temp option ensure reliability under hood and cabin thermal stress. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 24AA04H-I/P | Wider VCC range (1.7–5.5V); 100 kHz max clock below 2.5V; same pinout and memory map | Supports ultra-low-voltage systems (e.g., coin-cell powered devices); lower speed at 1.8V operation | Select when operating below 2.5V or requiring broader supply flexibility; not drop-in at 400 kHz above 2.5V due to identical timing |
| AT24C04D-PU | Same 4-Kbit size, I²C interface, and PDIP-8 package; 1.7–5.5V VCC; 1 MHz max clock; no hardware half-array WP | Lacks dedicated WP pin for partial protection; relies on software lock or external logic for write control | Choose when higher-speed I²C (1 MHz) is required and partial hardware write-protection is unnecessary |
Compared with 24LC04BH-I/P, the 24AA04H-I/P offers lower-voltage operation but reduced speed below 2.5V, while the AT24C04D-PU provides faster clocking and identical packaging but omits hardware-based half-array protection - making 24LC04BH-I/P optimal for 2.5–5.5V industrial systems needing deterministic write-locking.
Availability
24LC04BH-I/P is available at Aetrix Electronics and suitable for industrial sensor calibration storage, embedded system boot configuration, consumer appliance user preference memory, and automotive body control module settings requiring stable component supply and long-term data integrity.
Supply support for 24LC04BH-I/P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 24LC04BH belongs to Microchip's 24XX04H family of I²C serial EEPROMs, designed specifically for reliable, low-power, and noise-immune nonvolatile data storage in space-constrained embedded systems.
FAQ
What is the minimum supply voltage required for reliable operation of the 24LC04BH-I/P?
The 24LC04BH-I/P requires a minimum VCC of 2.5V for guaranteed operation across its full specification, including 400 kHz I²C communication and full write functionality. Operation below 2.5V is not supported - unlike the 24AA04H variant, which operates down to 1.7V. This makes the 24LC04BH-I/P ideal for 3.3V and 5V systems where tighter voltage regulation is available.
How does the WP pin function on the 24LC04BH-I/P, and what memory region does it protect?
On the 24LC04BH-I/P, the WP pin enables hardware write-protection for the upper half of the 4-Kbit memory array (addresses 100h to 1FFh). When WP is tied to VCC, writes to that 2-Kbit block are inhibited; reads remain fully functional. When WP is tied to VSS, full-array write access is restored. This selective protection prevents accidental overwrites of critical firmware or calibration data stored in the upper block.
Can the 24LC04BH-I/P be used in automotive applications, and what qualifications does it hold?
Yes - the 24LC04BH-I/P is AEC-Q100 qualified for automotive applications, supporting both Industrial (−40°C to +85°C) and Extended (−40°C to +125°C) temperature ranges. Its qualification covers stress testing for temperature cycling, humidity, and ESD (>4,000V), making it suitable for body control modules, infotainment settings storage, and other under-hood or cabin-mounted systems requiring automotive-grade reliability.
What is the maximum write speed and page buffer size of the 24LC04BH-I/P?
The 24LC04BH-I/P supports a maximum I²C clock frequency of 400 kHz and features a 16-byte page write buffer. Page writes complete in ≤5 ms, enabling up to 16 bytes to be written atomically with a single Stop condition. This reduces bus transactions versus byte-write mode and improves efficiency in systems updating configuration blocks or calibration tables.
Does the 24LC04BH-I/P require external pull-up resistors on SDA and SCL, and what values are recommended?
Yes - the 24LC04BH-I/P has open-drain SDA and input-only SCL pins, requiring external pull-up resistors on both lines. For 400 kHz operation, Microchip recommends 2 kΩ pull-ups to VCC. For slower 100 kHz buses, 10 kΩ is typical. Resistor selection must account for bus capacitance, number of devices, and rise-time requirements per I²C specification to ensure signal integrity.
24LC04BH-I/P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 4Kbit
- Memory Organization:
- 256 x 8 x 2
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
24LC04BH-I/P FAQ
1.How can I place an order for 24LC04BH-I/P through Aetrix?
Please submit a Request for Quotation (RFQ) for 24LC04BH-I/P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 24LC04BH-I/P reliable?
The price and inventory of 24LC04BH-I/P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 24LC04BH-I/P is usually 5 days.
3.What payment methods are accepted for 24LC04BH-I/P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 24LC04BH-I/P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 24LC04BH-I/P?
24LC04BH-I/P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 24LC04BH-I/P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 24LC04BH-I/P?
For technical support, including 24LC04BH-I/P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 24LC04BH-I/P requirements.
6.How does Aetrix verify that 24LC04BH-I/P is sourced from the original manufacturer or authorized distributors?
All 24LC04BH-I/P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 24LC04BH-I/P meets industry standards.
7.What is the process for return or replacement of 24LC04BH-I/P?
All 24LC04BH-I/P units undergo pre-shipment inspection (PSI). If there is an issue with 24LC04BH-I/P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 24LC04BH-I/P part is unused and in its original packaging.
Return procedure for 24LC04BH-I/P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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