Microchip Technology 24LC04B/P

Overview

24LC04B/P from Microchip Technology Inc. is a 4-Kbit I²C-compatible serial EEPROM organized as two 256 × 8-bit blocks, operating from 2.5V to 5.5V with 400 kHz max clock frequency, 16-byte page write buffer, and hardware write-protection via WP pin - used for nonvolatile parameter storage in embedded control modules.

For engineers reviewing the 24LC04B/P datasheet, 24LC04B/P pinout, 24LC04B/P application, or 24LC04B/P equivalent, key selection criteria include VCC range (2.5–5.5V), industrial/extended temperature support (–40°C to +125°C), I²C bus timing compliance (THIGH ≥600 ns), page write time (≤5 ms), and PDIP-8 package compatibility with legacy through-hole designs.

Technical Context

The 24LC04B/P implements a two-wire I²C interface with Schmitt-trigger inputs and slope-controlled outputs to suppress noise and eliminate ground bounce. Its internal address pointer supports current-address, random, and sequential read modes, while ACK polling enables precise write-cycle completion detection without fixed delays.

Memory is partitioned into two independent 256-word blocks selectable via the B0 bit in the control byte; block addressing enables isolated configuration storage. The device uses on-chip charge-pump HV generator for EEPROM programming and includes built-in ESD protection (>4 kV) and >1 million erase/write cycles with >200-year data retention.

Key Specifications

Pinout & Package

24LC04B/P is supplied in an 8-lead plastic dual in-line package (PDIP) with 300-mil body width, through-hole mounting, and industry-standard pinout. Pin 1 is top-left corner with notch or dot marking.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial EEPROM applications.

Compared with 24LC04B/P, 24AA04-I/P extends voltage flexibility but sacrifices high-temperature capability, while AT24C04-PU offers pin-compatible drop-in replacement with minor firmware adjustments - both retain 16-byte page write and hardware write-protection features essential for robust parameter storage.

Availability

24LC04B/P is available at Aetrix Electronics and suitable for industrial PLCs, automotive body control modules, medical calibration systems, and smart energy meters requiring stable component supply and long-term obsolescence management.

Supply support for 24LC04B/P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.

The 24LC04B belongs to Microchip's serial EEPROM product line, designed specifically for reliable, low-power nonvolatile data storage in space-constrained embedded systems with I²C interface requirements.

FAQ

What is the minimum supply voltage required for 24LC04B/P operation?

The 24LC04B/P requires a minimum VCC of 2.5V, as specified in the Device Selection Table and Electrical Characteristics section. Unlike the 24AA04 variant, it is not rated for operation below 2.5V - attempting to power it at 1.8V or 2.2V will result in undefined behavior or failure to respond on the I²C bus.

Does 24LC04B/P support page write across memory boundaries?

No, 24LC04B/P does not support page writes across physical page boundaries. Each page is 16 bytes, and if a page write command crosses a 16-byte boundary (e.g., starting at address 0x0F), data wraps to the start of the same page instead of advancing to the next. Host firmware must enforce alignment to prevent unintended overwrites.

How is the memory block selected in 24LC04B/P?

Memory block selection in 24LC04B/P is controlled by the B0 bit in the I²C control byte: B0 = 0 selects Block 0 (addresses 0x000–0x0FF), and B0 = 1 selects Block 1 (addresses 0x100–0x1FF). The upper two bits of the control byte are "don't care" and do not affect addressing - only B0 determines block access.

Can the A0, A1, and A2 pins of 24LC04B/P be left unconnected?

Yes, the A0, A1, and A2 pins of 24LC04B/P have no internal connection and may be left floating, tied to VSS, or tied to VCC without affecting device functionality. This is explicitly stated in Section 2.1 and Table 2-1 of the datasheet - unlike higher-density EEPROMs, these pins serve no addressing purpose in the 24LC04B/P.

What is the role of the WP pin during power-up sequencing?

The WP pin of 24LC04B/P must be stabilized before or during VCC ramp-up to ensure predictable write-enable state. If WP floats during power-on, the device may enter an indeterminate write-protected state. For guaranteed operation, tie WP directly to VSS (enable writes) or VCC (disable writes) with no series resistance or RC filtering.