Microchip Technology 24LC128T-E/MS
- Part No.:
- 24LC128T-E/MS
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
24LC128T-E/MS.pdf
- Description:
- IC EEPROM 128KBIT I2C 8MSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,927
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
24LC128T-E/MS from Microchip Technology Inc. is a 128 Kbit (16K × 8) I²C-compatible serial EEPROM designed for nonvolatile data storage in low-power embedded systems. It operates from 2.5V to 5.5V, supports up to 400 kHz clock frequency, features hardware write-protection via the WP pin, and delivers 1 µA max standby current at industrial temperature range (–40°C to +85°C). It is used in sensor calibration storage, configuration retention for industrial controllers, and firmware parameter backup.
For engineers reviewing the 24LC128T-E/MS datasheet, 24LC128T-E/MS pinout, 24LC128T-E/MS application, or 24LC128T-E/MS equivalent, this page provides verified electrical specs, package mapping to MSOP-8, I²C timing constraints, endurance (1M cycles), and real-world use context - all confirmed against Microchip DS20001191T.
Technical Context
The 24LC128T-E/MS implements a two-wire I²C slave interface with Schmitt-trigger inputs on SDA/SCL for noise immunity and slope-controlled outputs to suppress ground bounce. Its internal architecture includes a 64-byte page write buffer, self-timed erase/write cycle, and address pointer logic supporting random, sequential, and current-address read modes.
It uses three hardware address pins (A0–A2) to support up to eight devices on one bus - though in the MSOP-8 package, A0 and A1 are no-connects, limiting cascading to two units. Write protection is implemented via a dedicated WP input sampled at the STOP bit, enabling full-array lock without software overhead.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 128 Kbit (16,384 × 8) - sufficient for storing >16 KB of persistent configuration or calibration data |
| VCC operating range | 2.5V to 5.5V - compatible with 3.3V and 5V logic domains without level shifting |
| Max I²C clock frequency | 400 kHz - enables ~50 kbyte/s effective write throughput using page writes |
| Page write buffer | 64 bytes - reduces write latency by batching multiple bytes per self-timed 5 ms cycle |
| Endurance & retention | 1,000,000 erase/write cycles; >200 years data retention - validated for long-life industrial deployments |
| Standby current | 1 µA max (I-temp) - critical for battery-backed or energy-harvesting applications |
| Write-protect method | Hardware pin (WP) tied to VCC - prevents accidental overwrites without firmware involvement |
Pinout & Package
24LC128T-E/MS is packaged in an 8-lead MSOP (Mini Small Outline Package) with 0.65 mm pitch, 3.0 mm × 3.0 mm body, and exposed pad (optional VSS connection). Pin 1 is marked with a dot; A0 and A1 are not connected in this variant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Chip select input | No-connect in MSOP package - fixed to logic 0; simplifies address decoding in dual-device configurations |
| A1 | Chip select input | No-connect in MSOP package - fixed to logic 0; ensures predictable slave address (1010xx0) |
| A2 | Chip select input | User-configurable address bit - sets MSB of 7-bit slave address (1010A200) |
| VSS | Ground reference | Return path for all internal circuitry; exposed pad may be connected to enhance thermal performance |
| SDA | Serial data I/O | Open-drain bidirectional bus line - requires external pull-up; handles address, command, and data transfer |
| SCL | Serial clock input | Master-generated clock - synchronizes all I²C transactions; Schmitt-triggered for noise margin |
| WP | Write-protect control | Active-high enable - when high, blocks all write operations while permitting unlimited reads |
| VCC | Power supply | Primary voltage rail (2.5–5.5V); powers EEPROM array, logic, and HV generator for write cycles |
Key Features
| Feature | Design Value |
|---|---|
| 64-byte page write buffer | Reduces average write time per byte from 5 ms to ≤78 µs when writing full pages - critical for logging burst data |
| Schmitt-trigger inputs (SDA/SCL) | Provides 5% VCC hysteresis - rejects sub-50 ns noise spikes common in noisy industrial environments |
| Hardware write-protect (WP) | Eliminates need for software-based lock mechanisms - prevents corruption during power brownouts or reset events |
| I²C compatibility up to 400 kHz | Enables direct interfacing with standard microcontroller I²C peripherals - no custom drivers required |
| 1 µA max standby current | Supports >10-year battery life in coin-cell-powered devices - validated across –40°C to +85°C |
Applications
| Industrial Sensor Calibration Storage | Medical Device Configuration Retention |
|---|---|
|
Use Scenario: Storing factory-calibrated offset/gain coefficients for analog sensor front-ends in programmable logic controllers. IC Role / Device Role / Timing Role: Nonvolatile configuration register - retains values across power cycles and supports infrequent updates during maintenance. Use Value: Eliminates recalibration labor; guarantees traceable, uncorrupted parameters even after 10+ years of field operation. |
Use Scenario: Preserving user-selected therapy parameters and device ID in portable infusion pumps. IC Role / Device Role / Timing Role: Secure settings vault - accessed only during boot and setup, isolated from main MCU firmware. Use Value: Meets IEC 62304 Class C requirements for data integrity; WP pin prevents runtime overwrite during fault conditions. |
| Automotive Body Control Module Settings | Smart Energy Meter Firmware Parameters |
|
Use Scenario: Holding seat/mirror position memory and lighting profiles in 12V automotive BCMs. IC Role / Device Role / Timing Role: Low-voltage EEPROM slave - operates down to 2.5V during cranking transients; withstands load dump surges via internal ESD protection. Use Value: AEC-Q100 qualified; survives >4,000V HBM ESD events - eliminates field failures due to assembly handling. |
Use Scenario: Storing tariff schedules, meter ID, and cryptographic keys in ANSI C12.22-compliant smart meters. IC Role / Device Role / Timing Role: Tamper-resistant parameter store - WP pin hardwired to prevent unauthorized reprogramming in deployed units. Use Value: 1M endurance supports daily firmware updates over 27 years; >200-year retention meets utility asset lifetime requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 24AA128T-I/MS | Wider VCC range (1.7–5.5V); same 400 kHz speed; identical MSOP-8 pinout and WP functionality | Better suited for battery-powered devices operating below 2.5V (e.g., coin-cell IoT nodes) | Select 24AA128T-I/MS if system VCC can dip below 2.5V; otherwise 24LC128T-E/MS offers tighter industrial temp validation. |
| AT24C128N-10SU-2.7 | Same density and I²C interface; 1 MHz max clock; different slave address map (1010xxx vs 1010A200); no A0/A1 NC in SOIC-8 | Requires PCB layout change for SOIC-8; higher speed useful only if master supports 1 MHz and timing margins allow | Choose AT24C128N-10SU-2.7 only if migrating from Atmel legacy designs; verify address collision and WP behavior in target firmware. |
Compared with 24AA128T-I/MS, the 24LC128T-E/MS trades lower-voltage operation for stronger industrial temperature validation and identical pinout compatibility; versus AT24C128N-10SU-2.7, it avoids address-map conflicts and maintains Microchip's proven WP implementation but limits clock speed to 400 kHz.
Availability
24LC128T-E/MS is available at Aetrix Electronics and suitable for industrial sensor calibration storage, medical device configuration retention, and automotive body control module settings requiring stable component supply across extended product lifecycles.
Supply support for 24LC128T-E/MS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing infrastructure.
The 24LC128T-E/MS belongs to Microchip's 24XX128 family of I²C EEPROMs, engineered for robustness in industrial and automotive applications where data integrity, low power, and long-term reliability are mandatory.
FAQ
What is the maximum I²C clock frequency supported by the 24LC128T-E/MS?
The 24LC128T-E/MS supports up to 400 kHz I²C clock frequency across its full 2.5V–5.5V VCC range and industrial temperature grade. It does not support 1 MHz operation - that capability is exclusive to the 24FC128 variant. This 400 kHz limit ensures reliable timing margins under worst-case voltage and temperature conditions specified in DS20001191T.
Does the 24LC128T-E/MS have internal pull-up resistors on SDA or SCL?
No, the 24LC128T-E/MS does not include internal pull-up resistors. Its SDA pin is open-drain and requires an external pull-up resistor to VCC; typical values are 2 kΩ for 400 kHz operation. SCL is a CMOS input and also requires external pull-up. This design allows system-level optimization of rise time and bus capacitance loading.
How many devices can be connected on the same I²C bus using the 24LC128T-E/MS?
Up to two 24LC128T-E/MS devices can share one I²C bus. Because the MSOP-8 package has no-connect A0 and A1 pins, only A2 remains user-configurable - yielding two possible slave addresses: 1010000 (A2 = 0) and 1010100 (A2 = 1). This is explicitly documented in DS20001191T Section 2.1 and Figure 5-1.
What happens if the WP pin is left floating on the 24LC128T-E/MS?
The WP pin must be driven to either VSS (enable writes) or VCC (disable writes); leaving it floating violates the absolute maximum ratings and may cause undefined behavior, including intermittent write failures or increased current draw. DS20001191T Section 2.4 mandates a defined logic level - a pull-down resistor to VSS is recommended unless hardware write protection is required.
Is the 24LC128T-E/MS AEC-Q100 qualified?
No, the 24LC128T-E/MS is rated for Industrial temperature range (–40°C to +85°C) and is not AEC-Q100 qualified. The "E" suffix in the part number denotes Extended temperature (–40°C to +125°C) for other variants like 24LC128-E/MS, but the 24LC128T-E/MS specifically carries the "I" grade per Microchip's marking table on page 16 of DS20001191T.
24LC128T-E/MS Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-MSOP
24LC128T-E/MS FAQ
1.How can I place an order for 24LC128T-E/MS through Aetrix?
Please submit a Request for Quotation (RFQ) for 24LC128T-E/MS on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 24LC128T-E/MS reliable?
The price and inventory of 24LC128T-E/MS are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 24LC128T-E/MS is usually 5 days.
3.What payment methods are accepted for 24LC128T-E/MS?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 24LC128T-E/MS transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 24LC128T-E/MS?
24LC128T-E/MS orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 24LC128T-E/MS order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 24LC128T-E/MS?
For technical support, including 24LC128T-E/MS datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 24LC128T-E/MS requirements.
6.How does Aetrix verify that 24LC128T-E/MS is sourced from the original manufacturer or authorized distributors?
All 24LC128T-E/MS products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 24LC128T-E/MS meets industry standards.
7.What is the process for return or replacement of 24LC128T-E/MS?
All 24LC128T-E/MS units undergo pre-shipment inspection (PSI). If there is an issue with 24LC128T-E/MS, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 24LC128T-E/MS part is unused and in its original packaging.
Return procedure for 24LC128T-E/MS:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
24LC128T-E/MS Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

