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Microchip Technology 24LC128T-E/SM
- Part No.:
- 24LC128T-E/SM
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
24LC128T-E/SM.pdf
- Description:
- IC EEPROM 128KBIT I2C 8SOIJ
- Quantity:
- Payment:
- Shipping:
Inventory:4,261
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Product details
Overview
24LC128T-E/SM from Microchip Technology Inc. is a 128 Kbit (16K × 8) I²C-compatible serial EEPROM designed for nonvolatile data storage in low-power embedded systems. It operates from 2.5V to 5.5V, supports up to 400 kHz clock frequency, features hardware write-protection via the WP pin, and delivers 1 million erase/write cycles with >200 years of data retention. It is used in industrial sensor calibration, power meter configuration, and firmware parameter storage.
For engineers reviewing the 24LC128T-E/SM datasheet, 24LC128T-E/SM pinout, 24LC128T-E/SM application, or 24LC128T-E/SM equivalent, this page provides verified electrical specs, package mapping to 8-lead SOIC (SM), functional pin roles, real-world use cases, and two confirmed alternative parts with documented technical and application differences.
Technical Context
The 24LC128T-E/SM implements a two-wire I²C interface with Schmitt-trigger inputs on SDA and SCL for noise immunity, slope-controlled outputs to suppress ground bounce, and cascading support for up to eight devices on one bus using A0–A2 address pins. Its internal architecture includes a 64-byte page write buffer, self-timed erase/write cycle, and an address pointer that auto-increments during sequential reads.
It uses CMOS EEPROM technology with a dedicated high-voltage generator for programming, supports both byte and page write modes, and enforces hardware write protection when WP = VCC. The device samples WP at the Stop bit of each write command and ignores subsequent WP transitions during the write cycle.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 2.5V to 5.5V - defines minimum supply for reliable operation; below 2.5V, device is not functional. |
| Max Clock Frequency | 400 kHz - determines maximum I²C bus speed; limits data throughput to ~40 KB/s in page mode. |
| Memory Density | 128 Kbit (16K × 8) - provides 16,384 bytes of nonvolatile storage for configuration, logs, or calibration data. |
| Page Write Buffer | 64 bytes - enables efficient bulk writes; crossing physical page boundaries (every 64-byte aligned address) causes wraparound. |
| Write Endurance | 1,000,000 cycles - specifies guaranteed erase/write cycles per memory location under rated conditions. |
| Data Retention | >200 years at +25°C - ensures long-term data integrity without refresh in stable environments. |
| Operating Temp | −40°C to +125°C (Extended grade) - qualified for automotive and harsh industrial environments. |
| ESD Protection | >4,000 V HBM - provides robust handling tolerance during PCB assembly and field service. |
Pinout & Package
24LC128T-E/SM is packaged in an 8-lead SOIC (SM) - narrow-body, 3.90 mm width, surface-mount - with standard JEDEC MS-012AC footprint and matte tin (Sn) lead finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Chip Address Input | LSB of 3-bit slave address; hardwired to VSS or VCC to configure I²C address (0x50–0x57). |
| A1 | Chip Address Input | Middle bit of slave address; enables up to eight devices on same I²C bus with unique addresses. |
| A2 | Chip Address Input | MSB of slave address; required for multi-device addressing; must be stable before Start condition. |
| VSS | Ground Reference | Primary return path for all internal circuits; must be low-impedance and decoupled near VCC pin. |
| SDA | Serial Data I/O | Open-drain bidirectional bus line; requires external pull-up resistor (2–10 kΩ depending on speed). |
| SCL | Serial Clock Input | Master-generated clock signal; synchronizes all data transfers; Schmitt-trigger input rejects noise. |
| WP | Hardware Write-Protect | Active-high enable: tied to VCC blocks all writes; tied to VSS enables full read/write access. |
| VCC | Power Supply | 2.5V–5.5V main supply; requires local 0.1 µF ceramic decoupling capacitor adjacent to pin. |
Key Features
| Feature | Design Value |
|---|---|
| Page Write Buffer | 64-byte internal latch enables single-command bulk writes, reducing I²C transaction overhead by up to 64× vs. byte writes. |
| Schmitt Trigger Inputs | On SDA/SCL pins with 5% VCC hysteresis (min 0.05 VCC) - rejects fast transients and improves noise margin in noisy industrial settings. |
| Output Slope Control | Controlled rise/fall times eliminate ground bounce during switching - critical for stable operation in mixed-signal PCBs. |
| Self-Timed Write Cycle | Internal timing eliminates need for external delay; max 5 ms duration allows host to poll ACK instead of fixed wait. |
| Hardware Write Protection | WP pin sampled only at Stop bit - prevents accidental writes during bus glitches or power ramp-up. |
| Cascadable Architecture | Three address pins (A0–A2) support up to eight devices on one I²C bus, enabling scalable memory expansion without extra GPIO. |
Applications
| Industrial Sensor Calibration | Smart Energy Metering |
|---|---|
Use Scenario: Storing factory-calibrated offset/gain coefficients and temperature compensation tables for analog sensor front-ends. IC Role / Device Role / Timing Role: Nonvolatile configuration store accessed at system boot and during field recalibration routines. Use Value: Enables plug-and-play sensor replacement with zero manual setup; retains calibration across power loss and firmware updates. |
Use Scenario: Recording tariff schedules, billing cycles, tamper events, and historical consumption snapshots in utility-grade meters. IC Role / Device Role / Timing Role: Secure, endurance-rated data logger interfaced via isolated I²C to metrology SoC. Use Value: Guarantees 1M+ write cycles for daily logging over 10+ years; extended temp rating supports outdoor meter enclosures. |
| Automotive Body Control Module | Medical Device Configuration |
Use Scenario: Saving user preferences (seat position, mirror angle, lighting profiles) and fault history in AEC-Q100-compliant BCMs. IC Role / Device Role / Timing Role: I²C slave storing persistent settings accessible by MCU during wake-up from sleep mode. Use Value: Extended −40°C to +125°C rating ensures reliability in engine bay proximity; WP pin prevents corruption during CAN/LIN bus activity. |
Use Scenario: Holding FDA-required device ID, calibration certificates, usage counters, and safety-critical configuration flags in portable diagnostics tools. IC Role / Device Role / Timing Role: Tamper-resistant configuration vault with hardware write-lock activated during clinical operation. Use Value: RoHS-compliant, 200-year data retention meets regulatory audit requirements; 4 kV ESD protects against handling damage in clinical environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 24AA128T-I/SM | Wider VCC range (1.7V–5.5V); lower 100 kHz max clock below 2.5V; identical pinout and 128 Kbit density. | Supports battery-powered devices operating down to 1.7V; unsuitable for 2.5V-only systems requiring 400 kHz speed. | Select when ultra-low-voltage operation is required and clock speed ≤100 kHz is acceptable. |
| AT24C128-10PU-2.7 | Same 128 Kbit density and SOIC-8 package; 1 MHz max clock at 2.7V+; different I²C address map (0x50–0x57 vs. 0x50–0x57); no AEC-Q100 qualification. | Lacks automotive qualification; higher speed useful in high-throughput data loggers; no extended-temp support. | Select for cost-sensitive industrial designs needing faster I²C but not requiring AEC-Q100 or −40°C to +125°C operation. |
Compared with 24LC128T-E/SM, the 24AA128T-I/SM extends voltage flexibility at the cost of speed below 2.5V, while the AT24C128-10PU-2.7 trades automotive qualification for higher clock rate - making the 24LC128T-E/SM optimal for extended-temperature, automotive-grade, 400 kHz I²C systems where write protection and noise immunity are critical.
Availability
24LC128T-E/SM is available at Aetrix Electronics and suitable for industrial sensor calibration, smart energy metering, and automotive body control modules requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for 24LC128T-E/SM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog devices, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 24LC128T-E/SM belongs to Microchip's 24XX128 family of I²C EEPROMs, engineered for robust, low-power nonvolatile storage in automotive, industrial, and medical applications demanding high endurance and extended temperature operation.
FAQ
What is the operating voltage range for the 24LC128T-E/SM?
The 24LC128T-E/SM operates from 2.5V to 5.5V. Operation below 2.5V is not supported - unlike the 24AA128 variant, which functions down to 1.7V. This voltage range ensures compatibility with standard 3.3V and 5V logic systems while maintaining stable internal charge pump performance for EEPROM writes.
Does the 24LC128T-E/SM support 1 MHz I²C communication?
No, the 24LC128T-E/SM supports up to 400 kHz I²C clock frequency across its full 2.5V–5.5V VCC range. The 1 MHz capability is exclusive to the 24FC128 variant. Attempting 1 MHz operation on the 24LC128T-E/SM will result in timing violations and unreliable communication.
How does hardware write protection work on the 24LC128T-E/SM?
The WP pin on the 24LC128T-E/SM is sampled only at the Stop bit of each write command. When tied to VCC, it inhibits all write operations (byte, page, or erase) while allowing unrestricted reads. Toggling WP during a write cycle has no effect - the decision is latched at Stop, ensuring immunity to bus noise.
What is the maximum number of 24LC128T-E/SM devices that can share one I²C bus?
Up to eight 24LC128T-E/SM devices can be cascaded on a single I²C bus using the A0, A1, and A2 address pins to generate unique 3-bit chip addresses (0x50–0x57). Each pin must be hardwired to VSS or VCC - floating connections are undefined and may cause bus contention.
Is the 24LC128T-E/SM qualified for automotive applications?
Yes, the "E" suffix in 24LC128T-E/SM denotes Extended temperature grade (−40°C to +125°C) and AEC-Q100 qualification. This makes it suitable for under-hood and body-control applications where thermal stability and long-term reliability are mandatory.
24LC128T-E/SM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIJ
24LC128T-E/SM FAQ
1.How can I place an order for 24LC128T-E/SM through Aetrix?
Please submit a Request for Quotation (RFQ) for 24LC128T-E/SM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 24LC128T-E/SM reliable?
The price and inventory of 24LC128T-E/SM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 24LC128T-E/SM is usually 5 days.
3.What payment methods are accepted for 24LC128T-E/SM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 24LC128T-E/SM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 24LC128T-E/SM?
24LC128T-E/SM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 24LC128T-E/SM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 24LC128T-E/SM?
For technical support, including 24LC128T-E/SM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 24LC128T-E/SM requirements.
6.How does Aetrix verify that 24LC128T-E/SM is sourced from the original manufacturer or authorized distributors?
All 24LC128T-E/SM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 24LC128T-E/SM meets industry standards.
7.What is the process for return or replacement of 24LC128T-E/SM?
All 24LC128T-E/SM units undergo pre-shipment inspection (PSI). If there is an issue with 24LC128T-E/SM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 24LC128T-E/SM part is unused and in its original packaging.
Return procedure for 24LC128T-E/SM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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