My Inquiry
My Account
Microchip Technology 24LC128T-E/ST
- Part No.:
- 24LC128T-E/ST
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
24LC128T-E/ST.pdf
- Description:
- IC EEPROM 128KBIT I2C 8TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,797
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
24LC128T-E/ST from Microchip Technology Inc. is a 128 Kbit (16K × 8) I²C-compatible serial EEPROM designed for nonvolatile data storage in low-power embedded systems. It operates from 2.5V to 5.5V, supports up to 400 kHz clock frequency, features hardware write-protection via the WP pin, and delivers 1 million erase/write cycles with >200 years of data retention. It is used in industrial sensor calibration, power meter configuration, and firmware parameter storage.
For engineers reviewing the 24LC128T-E/ST datasheet, 24LC128T-E/ST pinout, 24LC128T-E/ST application, or 24LC128T-E/ST equivalent, this page provides verified electrical specs, package mapping to 8-lead TSSOP (ST), I²C timing constraints, and real-world use cases requiring byte/page write, noise-immune bus operation, and extended temperature support.
Technical Context
The 24LC128T-E/ST implements a two-wire I²C slave interface with Schmitt-trigger inputs on SDA and SCL for robust noise immunity, and slope-controlled outputs to suppress ground bounce. Its internal architecture includes a 64-byte page write buffer, self-timed erase/write cycle, and address pointer logic enabling sequential, random, and current-address read modes across the full 128Kbit memory space.
It uses cascaded device addressing via A0–A2 pins (hardwired or externally driven), supporting up to eight devices on one bus (two for MSOP). The WP pin enables hardware-level write protection of the entire array (0000h–3FFFh), sampled at the Stop condition of each write command - no dynamic toggling during active writes affects execution.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 128 Kbit (16,384 × 8 bits); supports full 128K boundary reads without wrap-around limitation. |
| VCC range | 2.5V to 5.5V; excludes sub-2.5V operation unlike 24AA128 - critical for stable 3.3V/5V system integration. |
| Max clock frequency | 400 kHz at VCC ≥ 2.5V; defines maximum I²C throughput for burst page writes and rapid configuration updates. |
| Page write buffer | 64 bytes; enables single-stop multi-byte writes - reduces bus overhead and improves write efficiency vs. byte-by-byte. |
| Write endurance | 1,000,000 cycles per page; validated at 25°C/5.5V - ensures long-term reliability in field-updatable systems. |
| Data retention | 200+ years at 25°C; guarantees persistent storage integrity over product lifetime without refresh. |
| Operating temperature | −40°C to +125°C (Extended grade); qualified per AEC-Q100 - suitable for automotive under-hood and industrial edge nodes. |
Pinout & Package
24LC128T-E/ST is packaged in an 8-lead TSSOP (ST), with 0.65 mm lead pitch and exposed pad optional for thermal enhancement. Pin assignments are identical to SOIC/SOIJ/TSSOP variants per Microchip DS20001191T.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Chip address input | LSB of 3-bit slave address; hardwired to VSS/VCC to configure device ID on shared I²C bus (up to 8 devices). |
| A1 | Chip address input | Middle bit of slave address; determines unique I²C address when multiple 24LC128T-E/ST units share bus. |
| A2 | Chip address input | MSB of slave address; enables contiguous 1 Mbit expansion across up to eight devices using A2–A0 as address bits A16–A14. |
| VSS | Ground reference | Return path for all internal circuitry; must be low-impedance connection to avoid noise coupling into I²C lines. |
| SDA | Serial data I/O | Open-drain bidirectional bus line; requires external pull-up (2 kΩ typical for 400 kHz); carries address/data/ACK signals. |
| SCL | Serial clock input | Master-generated clock synchronizing all transfers; Schmitt-trigger input ensures reliable edge detection in noisy environments. |
| WP | Hardware write-protect | Active-high enable: tied to VCC blocks all writes (reads unaffected); sampled only at Stop condition - no runtime protection toggle. |
| VCC | Power supply | 2.5V–5.5V supply; powers EEPROM core, I/O buffers, and HV generator for write/erase; decoupling capacitor required. |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger inputs | Input hysteresis ≥0.05×VCC on SDA/SCL - rejects fast transients and improves noise margin in industrial EMI environments. |
| Output slope control | Controlled rise/fall times eliminate ground bounce during switching - prevents false Start/Stop generation on shared buses. |
| Page write capability | 64-byte buffer allows single-command writes up to full page - reduces I²C transaction count by 64× vs. byte writes. |
| Hardware write-protect | Dedicated WP pin disables writes when high - eliminates software vulnerability and enables secure factory programming. |
| I²C compatibility | Fully compliant with standard-mode (100 kHz) and fast-mode (400 kHz) I²C protocol - interoperable with MCU peripherals without custom drivers. |
Applications
| Industrial Sensor Calibration | Smart Energy Metering |
|---|---|
|
Use Scenario: Storing factory-trimmed offset/gain coefficients and temperature compensation tables for analog sensor front-ends. IC Role / Device Role / Timing Role: Nonvolatile configuration store accessed at power-on reset; retains values across brownouts and firmware updates. Use Value: Eliminates need for external calibration hardware; enables field recalibration via I²C while preserving traceability and security via WP pin. |
Use Scenario: Recording tariff schedules, demand-response thresholds, and tamper-event logs in DIN-rail electricity meters. IC Role / Device Role / Timing Role: High-reliability data logger with guaranteed 200-year retention - survives 20+ year meter deployment life. Use Value: Meets IEC 62056 compliance for secure, long-term energy data storage without battery backup or FRAM cost premium. |
| Automotive Body Control Module | Medical Device Configuration |
|
Use Scenario: Saving user preferences (mirror position, seat settings) and diagnostic fault codes in AEC-Q100-compliant BCMs. IC Role / Device Role / Timing Role: Extended-temp EEPROM interfaced directly to 3.3V microcontroller I²C port; operates reliably at 125°C ambient. Use Value: Qualified for under-hood use without derating; withstands 1M+ write cycles for frequent log updates during vehicle service intervals. |
Use Scenario: Storing FDA-mandated device serial numbers, calibration history, and usage counters in portable diagnostic tools. IC Role / Device Role / Timing Role: Secure, auditable memory with hardware write-lock - prevents accidental or malicious overwrite of regulatory-critical data. Use Value: Supports ISO 13485 traceability requirements; WP pin ensures immutable records even during firmware reflash operations. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 24AA128T-I/ST | Wider VCC range (1.7V–5.5V); lower 100 kHz max clock below 2.5V; Industrial temp only (−40°C to +85°C). | Preferred for battery-powered IoT sensors operating down to 1.8V; unsuitable for 125°C automotive use. | Select when ultra-low-voltage operation is mandatory and extended temperature is not required. |
| AT24C128N-10SU-2.7 | Same 128Kbit capacity, 2.7V–5.5V VCC, 400 kHz I²C, but lacks AEC-Q100 qualification and has 100k-cycle endurance. | Cost-optimized for consumer electronics; not recommended for safety-critical or long-lifecycle industrial deployments. | Choose for price-sensitive, non-automotive designs where 100k-cycle endurance suffices and AEC-Q100 is unnecessary. |
Compared with 24AA128T-I/ST, the 24LC128T-E/ST trades 1.7V operation for AEC-Q100 qualification and 125°C capability; versus AT24C128N-10SU-2.7, it delivers 10× higher endurance and automotive-grade reliability at modest cost premium.
Availability
24LC128T-E/ST is available at Aetrix Electronics and suitable for industrial sensor calibration, smart energy metering, and automotive body control modules requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 24LC128T-E/ST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing infrastructure.
The 24LC128T-E/ST belongs to Microchip's 24XX128 family of I²C EEPROMs, engineered for robust, low-power nonvolatile storage in automotive, industrial, and medical systems demanding extended temperature operation and high endurance.
FAQ
What is the maximum I²C clock frequency supported by the 24LC128T-E/ST?
The 24LC128T-E/ST supports up to 400 kHz I²C clock frequency when VCC is 2.5V or higher. It does not support 1 MHz operation - that capability is exclusive to the 24FC128 variant. This 400 kHz limit ensures reliable timing margins across the full −40°C to +125°C operating range and aligns with standard fast-mode I²C specifications.
Does the 24LC128T-E/ST support write-protection of individual memory pages?
No, the 24LC128T-E/ST provides only hardware-level full-array write-protection via the WP pin - when tied to VCC, all write operations (byte and page) to addresses 0000h–3FFFh are inhibited. It does not implement block or sector write-protection; page-level locking requires external logic or firmware coordination.
What package type does the 24LC128T-E/ST use, and is it pin-compatible with other 24XX128 variants?
The 24LC128T-E/ST uses an 8-lead TSSOP package (ST suffix), with identical pinout to SOIC, SOIJ, and MSOP variants per Microchip's DS20001191T. All share the same A0–A2/SDA/SCL/WP/VCC/VSS arrangement - enabling direct PCB footprint reuse across package options within the 24XX128 family.
How many devices can be connected on the same I²C bus using the 24LC128T-E/ST?
Up to eight 24LC128T-E/ST devices can be connected on a single I²C bus using unique combinations of A0, A1, and A2 address pins. Each device responds only when its hardware-configured 3-bit chip address matches the corresponding bits in the master's control byte - enabling scalable memory expansion without address conflicts.
Is the 24LC128T-E/ST AEC-Q100 qualified, and what grade does it meet?
Yes, the 24LC128T-E/ST is AEC-Q100 qualified for the Extended temperature grade (E), covering −40°C to +125°C operation. This qualification confirms reliability for automotive under-hood applications, including thermal cycling, humidity bias, and ESD stress testing per AEC-Q100 Rev H standards.
24LC128T-E/ST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 128Kbit
- Memory Organization:
- 16K x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 400 kHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- 900 ns
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
24LC128T-E/ST FAQ
1.How can I place an order for 24LC128T-E/ST through Aetrix?
Please submit a Request for Quotation (RFQ) for 24LC128T-E/ST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 24LC128T-E/ST reliable?
The price and inventory of 24LC128T-E/ST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 24LC128T-E/ST is usually 5 days.
3.What payment methods are accepted for 24LC128T-E/ST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 24LC128T-E/ST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 24LC128T-E/ST?
24LC128T-E/ST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 24LC128T-E/ST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 24LC128T-E/ST?
For technical support, including 24LC128T-E/ST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 24LC128T-E/ST requirements.
6.How does Aetrix verify that 24LC128T-E/ST is sourced from the original manufacturer or authorized distributors?
All 24LC128T-E/ST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 24LC128T-E/ST meets industry standards.
7.What is the process for return or replacement of 24LC128T-E/ST?
All 24LC128T-E/ST units undergo pre-shipment inspection (PSI). If there is an issue with 24LC128T-E/ST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 24LC128T-E/ST part is unused and in its original packaging.
Return procedure for 24LC128T-E/ST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
24LC128T-E/ST Tags
-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology
-
AT21CS01-STUM10-T
Microchip Technology
-
AT24C02C-SSHM-T
Microchip Technology
-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics
-
AT24CS02-SSHM-T
Microchip Technology
-
93LC46BT-I/OT
Microchip Technology
-
AT24C04C-SSHM-T
Microchip Technology
-
24LC01BT-I/SN
Microchip Technology
-
24AA02UIDT-I/OT
Microchip Technology
-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
