Microchip Technology 25LC010AT-I/SN
- Part No.:
- 25LC010AT-I/SN
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
25LC010AT-I/SN.pdf
- Description:
- IC EEPROM 1KBIT SPI 10MHZ 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:377
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
25LC010AT-I/SN from Microchip Technology Inc. is a 1 Kbit (128 × 8-bit) SPI Serial EEPROM with 16-byte page write capability, 10 MHz max clock frequency at 4.5–5.5V, and industrial temperature range (−40°C to +85°C). It features hardware write protection (WP pin), HOLD functionality for interrupt-safe serial pauses, and block-level write protection (none/¼/½/all array). Used in microcontroller-based systems for storing calibration data, configuration settings, or firmware parameters.
For engineers reviewing the 25LC010AT-I/SN datasheet, 25LC010AT-I/SN pinout, 25LC010AT-I/SN application, or 25LC010AT-I/SN equivalent, key selection criteria include VCC range (2.5–5.5V), SO/SI/SCK/CS/HOLD/WP/VSS/VCC 8-pin interface, 5 µA standby current, 5 ms max write cycle time, and 1M endurance cycles - all critical for low-power embedded storage designs.
Technical Context
The 25LC010AT-I/SN implements a standard SPI Mode 0,0 or Mode 1,1 interface with separate SI (data-in) and SO (data-out) lines, requiring only CS, SCK, SI, SO, WP, HOLD, VCC, and VSS. Its internal architecture includes an 8-bit instruction register, status register (WIP/WEL/BP0/BP1), and page latches enabling up to 16-byte writes within fixed 16-byte physical pages.
Write operations require explicit WREN instruction followed by CS high to latch enable state; writes are inhibited if WP = low or WEL = 0. The HOLD pin suspends ongoing transfers without resetting the sequence, allowing host MCU to service higher-priority interrupts while preserving SPI state - validated across all supported VCC ranges (2.5–5.5V) and temperatures (−40°C to +85°C).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 1 Kbit (128 × 8-bit) - fits compact configuration storage without over-provisioning. |
| Interface | SPI-compatible serial bus (Mode 0,0 / Mode 1,1) - interoperable with PIC® and most MCU SPI peripherals. |
| Max Clock Frequency | 10 MHz at VCC ≥ 4.5V - enables fast read/write bursts in time-critical applications. |
| Page Write Size | 16 bytes - limits burst writes to single-page boundaries; crossing page boundary wraps data. |
| Write Cycle Time | ≤ 5 ms (byte or page) - deterministic erase/write latency for real-time system timing budgets. |
| Endurance & Retention | 1,000,000 erase/write cycles; >200 years data retention - suitable for long-life industrial deployments. |
| Supply Voltage Range | 2.5V to 5.5V - supports both 3.3V and 5V system rails without level-shifting. |
| Standby Current | 5 µA at 5.5V, +125°C - ultra-low quiescent draw for battery-backed or energy-harvesting nodes. |
Pinout & Package
25LC010AT-I/SN is packaged in an 8-lead SOIC (Small Outline Integrated Circuit) with standard 150-mil body width and gull-wing leads. Pin 1 is marked by laser dot or notch; package is Pb-free and RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS (Pin 1) | Chip Select Input | Active-low enable: drives device into active mode; rising edge initiates internal write cycle after valid command. |
| SO (Pin 2) | Serial Data Output | Tri-state output: shifts out read data on falling SCK edge; high-impedance when CS high or HOLD low. |
| WP (Pin 3) | Write-Protect Input | Hardware lock: disables all writes (array & STATUS) when pulled low; overrides WEL state. |
| VSS (Pin 4) | Ground Reference | Primary return path for all I/O and core logic; must be low-impedance for noise immunity. |
| SI (Pin 5) | Serial Data Input | Latches instructions, addresses, and write data on rising SCK edge; sampled first after CS low. |
| SCK (Pin 6) | Serial Clock Input | Synchronizes all data transfers; timing constraints vary with VCC (e.g., 50 ns min high/low time at 4.5–5.5V). |
| HOLD (Pin 7) | Hold Input | Pauses ongoing SPI transfer: must be driven low while SCK is low; resumes on next SCK low-to-high. |
| VCC (Pin 8) | Supply Voltage | Core power rail: 2.5–5.5V operation; internal voltage regulation ensures stable EEPROM programming. |
Key Features
| Feature | Design Value |
|---|---|
| Block Write Protection | Selectively locks none, upper 1/4 (60h–7Fh), upper 1/2 (40h–7Fh), or entire array (00h–7Fh) via BP0/BP1 bits. |
| Self-Timed Write Cycles | No external delay required: internal timer completes byte/page writes in ≤5 ms; WIP bit indicates busy state. |
| Built-In Power-On Protection | Write enable latch resets at power-up; prevents accidental writes during supply ramp-up or brownout. |
| Hold Functionality | Preserves SPI state mid-transfer: allows MCU to service interrupts without reinitializing communication sequence. |
| ESD Robustness | ≥4 kV HBM on all pins - withstands handling and board-level ESD events without latch-up or corruption. |
| Low-Voltage Operation | Functional down to 2.5V VCC - enables direct interfacing with 3.3V MCUs without level shifters. |
Applications
| Industrial Sensor Calibration | Medical Device Configuration |
|---|---|
Use Scenario: Storing factory-calibrated sensor offsets and gain coefficients in environmental monitoring nodes. IC Role / Device Role / Timing Role: Nonvolatile configuration store accessed at boot and during field recalibration; SPI interface enables low-pin-count integration. Use Value: 1M endurance supports frequent recalibration; 5 µA standby extends battery life in wireless sensor networks. | Use Scenario: Holding user-selectable therapy parameters and safety thresholds in portable infusion pumps. IC Role / Device Role / Timing Role: Secure, tamper-resistant storage for critical operational settings; WP pin prevents runtime corruption. Use Value: Block protection isolates safety-critical registers; >200-year retention ensures data integrity over product lifetime. |
| Automotive Body Control Module | Consumer Appliance Settings |
Use Scenario: Saving seat/mirror position memory and lighting preferences in 12V vehicle subsystems. IC Role / Device Role / Timing Role: SPI EEPROM interfaced to 8-bit automotive MCU; operates across −40°C to +85°C ambient. Use Value: 2.5–5.5V VCC range tolerates automotive load-dump transients; HOLD function maintains comms during CAN interrupt servicing. | Use Scenario: Retaining user-programmed cooking modes, timers, and display brightness in smart ovens. IC Role / Device Role / Timing Role: Low-cost, pin-efficient nonvolatile storage for feature-rich UI customization. Use Value: 10 MHz SPI speed enables fast menu navigation updates; SOIC-8 package simplifies PCB layout and rework. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 25AA010AT-I/SN | Wider VCC range (1.8–5.5V); supports extended low-voltage operation down to 1.8V. | Preferred in battery-powered devices where supply may dip below 2.5V. | Select when operating below 2.5V is required; otherwise 25LC010AT-I/SN offers identical functionality at lower cost. |
| AT25010B-SSHL-T | Same 1 Kbit SPI EEPROM; AEC-Q100 qualified for automotive use; 10 MHz max clock at 2.5–5.5V. | Required for automotive production where qualification evidence is mandatory. | Choose for new automotive designs needing formal qualification; 25LC010AT-I/SN suffices for industrial-grade applications. |
Compared with 25AA010AT-I/SN and AT25010B-SSHL-T, the 25LC010AT-I/SN provides optimal cost-performance balance for industrial temperature-range applications without requiring sub-2.5V operation or AEC-Q100 certification - reducing BOM cost while maintaining full functional compatibility.
Availability
25LC010AT-I/SN is available at Aetrix Electronics and suitable for industrial sensor calibration, medical device configuration, and automotive body control modules requiring stable component supply and long-term obsolescence management.
Supply support for 25LC010AT-I/SN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, headquartered in Chandler, Arizona.
The 25LC010A family delivers cost-optimized, SPI-compatible EEPROMs targeting space-constrained, low-power embedded systems requiring reliable nonvolatile storage - designed for seamless integration with PIC® and other mainstream MCUs.
FAQ
What is the maximum clock frequency supported by the 25LC010AT-I/SN?
The 25LC010AT-I/SN supports up to 10 MHz clock frequency when VCC is between 4.5V and 5.5V. At 2.5V ≤ VCC < 4.5V, the maximum clock frequency is 5 MHz. These limits are defined in the AC Characteristics table (DS21832H, Table 1-2) and ensure reliable setup/hold timing across the full industrial temperature range.
Does the 25LC010AT-I/SN require external pull-up resistors on its SO or SI lines?
No, the 25LC010AT-I/SN does not require external pull-up resistors on SO or SI. The SO pin is actively driven or tri-stated; SI is CMOS input with no pull-up requirement. Pull-ups are only needed if the host MCU lacks internal weak pull-ups and the bus is shared - but this is a system-level design choice, not a device requirement.
How does the HOLD function behave during a write cycle in the 25LC010AT-I/SN?
The HOLD function is disabled during an internal write cycle (TWC) in the 25LC010AT-I/SN. While HOLD can pause read or command sequences, it has no effect once the write cycle begins - the device completes the internal programming regardless of HOLD state. This behavior is documented in Section 2.8 (Power-On State) and Figure 2-2 of DS21832H.
Can the 25LC010AT-I/SN be used in a 1.8V system?
No, the 25LC010AT-I/SN is not rated for 1.8V operation. Its specified VCC range is 2.5V to 5.5V. For 1.8V systems, Microchip's 25AA010AT-I/SN (1.8–5.5V) is the compatible alternative. Using 25LC010AT-I/SN below 2.5V violates Absolute Maximum Ratings and may result in unreliable reads/writes or increased failure rate.
What happens if a page write crosses a 16-byte boundary in the 25LC010AT-I/SN?
If a page write command attempts to cross a 16-byte boundary in the 25LC010AT-I/SN, data wraps around to the start of the same page instead of advancing to the next page. For example, writing 16 bytes starting at address 0x6F fills 0x6F–0x7E then overwrites 0x70–0x7F. This wrap behavior is explicitly stated in Section 2.3 and requires firmware to enforce page-aligned writes.
25LC010AT-I/SN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 128 x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 10 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
25LC010AT-I/SN FAQ
1.How can I place an order for 25LC010AT-I/SN through Aetrix?
Please submit a Request for Quotation (RFQ) for 25LC010AT-I/SN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 25LC010AT-I/SN reliable?
The price and inventory of 25LC010AT-I/SN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 25LC010AT-I/SN is usually 5 days.
3.What payment methods are accepted for 25LC010AT-I/SN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 25LC010AT-I/SN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 25LC010AT-I/SN?
25LC010AT-I/SN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 25LC010AT-I/SN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 25LC010AT-I/SN?
For technical support, including 25LC010AT-I/SN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 25LC010AT-I/SN requirements.
6.How does Aetrix verify that 25LC010AT-I/SN is sourced from the original manufacturer or authorized distributors?
All 25LC010AT-I/SN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 25LC010AT-I/SN meets industry standards.
7.What is the process for return or replacement of 25LC010AT-I/SN?
All 25LC010AT-I/SN units undergo pre-shipment inspection (PSI). If there is an issue with 25LC010AT-I/SN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 25LC010AT-I/SN part is unused and in its original packaging.
Return procedure for 25LC010AT-I/SN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
25LC010AT-I/SN Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
