Microchip Technology 25LC040AX-E/ST
- Part No.:
- 25LC040AX-E/ST
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
25LC040AX-E/ST.pdf
- Description:
- IC EEPROM 4KBIT SPI 10MHZ 8TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,047
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
25LC040AX-E/ST from Microchip Technology Inc. is a 4 Kbit (512 × 8) SPI Serial EEPROM with 16-byte page write capability, 10 MHz max clock frequency, and industrial-automotive temperature support (−40°C to +125°C). It features hardware write protection (WP pin), HOLD functionality for interrupt-safe serial pauses, and block-level array protection (none/¼/½/all). Used in automotive body control modules for storing calibration data and fault logs.
For engineers reviewing the 25LC040AX-E/ST datasheet, 25LC040AX-E/ST pinout, 25LC040AX-E/ST application, or 25LC040AX-E/ST equivalent, key selection criteria include VCC range (2.5–5.5 V), page write timing (≤5 ms), endurance (1M cycles), data retention (>200 years), and TSSOP-8 package compatibility with SPI-based microcontroller interfaces.
Technical Context
The 25LC040AX-E/ST implements a standard SPI Mode 0,0 or 1,1 interface with separate SI/SO lines, CS-controlled selection, and SCK-synchronized data transfer. Its internal architecture includes an 8-bit instruction register, status register (WIP/WEL/BP0/BP1), and page latches enabling up to 16-byte writes within fixed 16-byte physical boundaries.
Hardware protections include active-low WP pin disabling all writes regardless of WEL state, power-on reset of the write enable latch, and automatic WEL reset after each successful WRITE/WRSR operation. The HOLD pin suspends ongoing transfers while maintaining internal state, allowing host MCU to service higher-priority interrupts without reinitializing the sequence.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 4 Kbit (512 × 8 bits); supports 9-bit addressing for full array access |
| Interface | SPI-compatible serial bus (Mode 0,0 and 1,1); requires CS, SCK, SI, SO, WP, HOLD |
| Max Clock Frequency | 10 MHz at VCC ≥ 4.5 V; enables fast configuration reads in boot-time-critical systems |
| Write Cycle Time | ≤5 ms per byte or page; deterministic timing simplifies firmware polling logic |
| Endurance & Retention | 1,000,000 erase/write cycles; >200 years data retention at 25°C - suitable for lifetime automotive storage |
| VCC Range | 2.5 V to 5.5 V; compatible with 3.3 V and 5 V MCU I/O domains without level shifting |
| Temperature Range | −40°C to +125°C (Automotive grade E); validated for under-hood and powertrain applications |
Pinout & Package
25LC040AX-E/ST is packaged in an 8-lead TSSOP (Thin Shrink Small Outline Package) with 0.65 mm lead pitch and exposed pad option (not connected by default). Pin 1 is marked by laser indentation; package conforms to JEDEC MO-153.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS (Pin 1) | Chip Select Input | Active-low enable; must be low for all operations; rising edge initiates internal write cycle |
| SO (Pin 2) | Serial Data Output | Tri-state output; data shifted out MSb-first on falling SCK edge during READ |
| WP (Pin 3) | Write-Protect Input | Hardware lock: low disables all writes to memory and STATUS register regardless of WEL state |
| VSS (Pin 4) | Ground Reference | Primary return path for all digital and internal charge-pump circuits |
| SI (Pin 5) | Serial Data Input | Instruction/address/data input latched on rising SCK edge; MSb-first protocol |
| SCK (Pin 6) | Serial Clock Input | Master-generated clock; defines timing for SI sampling and SO updates |
| HOLD (Pin 7) | Hold Input | Pauses active SPI transaction; SO goes high-Z; resumes from exact point on HOLD high |
| VCC (Pin 8) | Supply Voltage | 2.5–5.5 V operating range; powers logic, EEPROM array, and internal HV generator |
Key Features
| Feature | Design Value |
|---|---|
| Page Write Mode | Up to 16 bytes written atomically within one 16-byte physical page - reduces firmware overhead vs. byte-by-byte writes |
| Block Write Protection | Configurable via STATUS register (BP1/BP0): protect none, upper 1/4 (180h–1FFh), upper 1/2 (100h–1FFh), or entire array (000h–1FFh) |
| Power-On Write Protection | Write enable latch resets at power-up; prevents spurious writes during supply ramp-up or brownout |
| HOLD Functionality | Enables non-disruptive pause/resume of SPI sequences - critical for real-time MCUs handling CAN or PWM interrupts |
| ESD Robustness | ≥4000 V HBM - ensures reliability in automotive assembly and field environments with high static potential |
Applications
| Automotive Body Control Unit (BCU) | Industrial PLC Configuration Storage |
|---|---|
Use Scenario: Storing seat position presets, mirror calibration offsets, and door lock configuration across vehicle life cycles. IC Role / Device Role / Timing Role: Nonvolatile parameter storage accessed during startup and runtime via SPI from 32-bit automotive MCU. Use Value: 1M endurance and >200-year retention ensure zero field failures over 15+ year vehicle service life. |
Use Scenario: Holding I/O mapping tables, PID tuning parameters, and firmware update flags in DIN-rail mounted controllers. IC Role / Device Role / Timing Role: SPI-configurable persistent memory interfaced to ARM Cortex-M7 with HOLD support for deterministic scan-cycle timing. Use Value: Hardware WP pin prevents accidental overwrite during hot-plug I/O module replacement or firmware upload. |
| Medical Infusion Pump Calibration | Smart Energy Meter Firmware Bootloader |
Use Scenario: Securing drug delivery rate coefficients, dose history logs, and sensor calibration constants compliant with IEC 62304. IC Role / Device Role / Timing Role: Safety-critical NVM accessed only during maintenance mode; BP1/BP0 bits lock configuration post-calibration. Use Value: Block protection prevents unauthorized modification of dosing algorithms - satisfies Class C software safety requirements. |
Use Scenario: Storing secure bootloader keys, meter serial number, tariff schedules, and tamper-event counters in ANSI C12.22-compliant meters. IC Role / Device Role / Timing Role: SPI EEPROM holding immutable root-of-trust data; read at power-on before executing signed application image. Use Value: 2.5–5.5 V VCC range matches wide-input DC-DC outputs; 125°C rating supports transformer-coupled meter enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 25AA040AT-I/ST | Wider VCC range (1.8–5.5 V); rated for Industrial (−40°C to +85°C) only; same pinout and instruction set | Not qualified for automotive ambient temperatures; unsuitable for under-hood placement | Select when system operates below 2.5 V or requires extended low-VCC margin, but automotive qualification is not needed |
| AT25040B-MAHL-T | Same 4 Kbit size and SPI interface; 20 MHz max clock; 1.8–5.5 V VCC; different STATUS register layout and WP behavior | Requires firmware adaptation for status bit interpretation and write-protection logic; no HOLD pin | Choose for higher-speed read throughput where HOLD functionality is unused and design can accommodate Atmel-specific register mapping |
Compared with 25LC040AX-E/ST, the 25AA040AT-I/ST offers broader voltage flexibility but lacks automotive temperature certification, while the AT25040B-MAHL-T delivers faster clocking and wider VCC but removes HOLD support and introduces register-level incompatibility requiring firmware changes.
Availability
25LC040AX-E/ST is available at Aetrix Electronics and suitable for automotive electronics, industrial control systems, and medical device manufacturing requiring stable component supply with guaranteed long-term availability and traceable sourcing.
Supply support for 25LC040AX-E/ST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog devices, and memory solutions, headquartered in Chandler, Arizona, with global manufacturing and support infrastructure.
The 25LC040A family is designed specifically for automotive-grade serial EEPROM applications demanding high reliability, extended temperature operation, and robust hardware write protection in safety-critical systems.
FAQ
What is the maximum clock frequency supported by the 25LC040AX-E/ST?
The 25LC040AX-E/ST supports up to 10 MHz clock frequency when VCC is 4.5 V to 5.5 V. At 2.5 V ≤ VCC < 4.5 V, the maximum is 5 MHz, and at 1.8 V ≤ VCC < 2.5 V, it drops to 3 MHz. These limits are defined in Table 1-2 of the DS21827H datasheet and ensure reliable setup/hold timing across voltage and temperature ranges. The 25LC040AX-E/ST does not operate above these frequencies.
Does the 25LC040AX-E/ST have a HOLD pin, and how is it used?
Yes, the 25LC040AX-E/ST includes an active-low HOLD pin (Pin 7) that suspends ongoing SPI communication without resetting the internal state. When asserted low while SCK is low, SI/SO/SCK inputs are ignored and SO enters high-impedance. Resuming requires bringing HOLD high while SCK remains low. This allows the host MCU to service time-critical interrupts and resume exactly where the transaction paused - a feature confirmed in Section 2.6 and Figure 1-1 of the 25LC040AX-E/ST datasheet.
How does write protection work on the 25LC040AX-E/ST?
25LC040AX-E/ST implements dual-layer write protection: hardware via the WP pin (low = all writes disabled), and software via BP0/BP1 bits in the STATUS register (configurable 0–100% array lock). The WP pin overrides the WEL bit - even if WEL=1, WP=0 blocks all writes. Table 2-4 and Section 2.4 confirm this hierarchy. This ensures failsafe protection against firmware errors or voltage glitches during critical operations.
What package type is used for the 25LC040AX-E/ST?
The 25LC040AX-E/ST uses an 8-lead TSSOP (Thin Shrink Small Outline Package) with standard JEDEC MO-153 dimensions, 0.65 mm lead pitch, and laser-marked Pin 1 identification. Package marking code "X/ST" in the datasheet's Package Types table explicitly maps "ST" to TSSOP. This surface-mount package supports automated assembly and provides thermal performance suitable for automotive under-hood environments.
Is the 25LC040AX-E/ST RoHS compliant and Pb-free?
Yes, the 25LC040AX-E/ST is Pb-free and RoHS compliant, as stated in the Features section on page 1 of DS21827H. The package marking includes the Pb-free JEDEC designator "3e", and the "Pb-Free and RoHS Compliant" bullet confirms regulatory conformance. This applies to all package variants including the ST (TSSOP) variant, meeting EU Directive 2011/65/EU requirements for hazardous substance restrictions.
25LC040AX-E/ST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 4Kbit
- Memory Organization:
- 512 x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 10 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
25LC040AX-E/ST FAQ
1.How can I place an order for 25LC040AX-E/ST through Aetrix?
Please submit a Request for Quotation (RFQ) for 25LC040AX-E/ST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 25LC040AX-E/ST reliable?
The price and inventory of 25LC040AX-E/ST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 25LC040AX-E/ST is usually 5 days.
3.What payment methods are accepted for 25LC040AX-E/ST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 25LC040AX-E/ST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 25LC040AX-E/ST?
25LC040AX-E/ST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 25LC040AX-E/ST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 25LC040AX-E/ST?
For technical support, including 25LC040AX-E/ST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 25LC040AX-E/ST requirements.
6.How does Aetrix verify that 25LC040AX-E/ST is sourced from the original manufacturer or authorized distributors?
All 25LC040AX-E/ST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 25LC040AX-E/ST meets industry standards.
7.What is the process for return or replacement of 25LC040AX-E/ST?
All 25LC040AX-E/ST units undergo pre-shipment inspection (PSI). If there is an issue with 25LC040AX-E/ST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 25LC040AX-E/ST part is unused and in its original packaging.
Return procedure for 25LC040AX-E/ST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
25LC040AX-E/ST Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
