Microchip Technology 25LC040X/ST
- Part No.:
- 25LC040X/ST
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
25LC040X/ST.pdf
- Description:
- IC EEPROM 4KBIT SPI 2MHZ 8TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,592
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
25LC040X/ST from Microchip Technology Inc. is a 4 Kbit (512 × 8) SPI-compatible serial EEPROM with 2.5–5.5 V supply range, 2 MHz max clock frequency, and industrial temperature range (−40°C to +85°C). It features 16-byte page write, hardware write protection via WP pin, and HOLD functionality for interrupt-safe bus suspension - used in embedded system configuration storage, sensor calibration data retention, and firmware parameter backup.
For engineers reviewing the 25LC040X/ST datasheet, 25LC040X/ST pinout, 25LC040X/ST application, or 25LC040X/ST equivalent, key selection criteria include its TSSOP-8 alternate pinout, 2 MHz SPI timing at 2.5 V, block-level write protection (BP0/BP1), and 1 million endurance cycles with >200-year data retention.
Technical Context
The 25LC040X/ST implements a standard SPI Mode 0,0 interface with separate SI (data in) and SO (data out) lines, CS-controlled device selection, and dedicated HOLD and WP pins for real-time bus control and hardware write inhibition. Its internal architecture includes an 8-bit instruction register, auto-incrementing address pointer for sequential reads, and nonvolatile STATUS register with WIP/WEL/BP bits.
Write operations require explicit WREN instruction followed by CS high transition to initiate self-timed internal erase-and-write cycle (≤5 ms), while read operations support continuous addressing with rollover from 01FFh to 0000h. The device powers up with write enable latch reset and SO in high-impedance state.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 4 Kbit (512 × 8-bit array), sufficient for small configuration tables or calibration coefficients |
| Interface | SPI-compatible serial bus (Mode 0,0), requiring only CS, SCK, SI, SO, WP, HOLD - minimal GPIO usage |
| Max clock frequency | 2 MHz at VCC ≥ 2.5 V, enabling fast parameter updates without MCU SPI clock scaling |
| Write cycle time | ≤5 ms internal self-timed write, eliminating need for external timeout logic |
| Endurance & retention | 1 million write/erase cycles and >200 years data retention - suitable for infrequent but critical field updates |
| Supply voltage | 2.5–5.5 V operation, compatible with 3.3 V and 5 V systems without level-shifting |
| Temperature range | Industrial grade (−40°C to +85°C), validated for use in automotive body control modules and industrial PLCs |
Pinout & Package
25LC040X/ST uses an 8-pin Thin Shrink Small Outline Package (TSSOP) with alternate pinout per Microchip's product identification system - distinct from standard SOIC/PDIP pin mapping. Pin 1 is HOLD (not CS), enabling direct compatibility with space-constrained PCB layouts requiring relocated HOLD signal routing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| HOLD | Serial communication suspend input | Tri-states SO and ignores SI/SCK transitions when low; must be low during SCK low phase to activate |
| VCC | Positive supply | 2.5–5.5 V power rail; decoupling capacitor required within 10 mm of pin |
| CS | Chip select | Active-low enable; rising edge after write sequence initiates internal write cycle |
| SO | Serial data output | High-impedance when CS high; data valid after falling SCK edge during read |
| WP | Hardware write protect | Low disables all writes to memory and STATUS register; overrides WREN latch state |
| VSS | Ground reference | Must be connected to system ground plane with low-inductance path |
| SI | Serial data input | Data latched on rising SCK edge; MSB-first protocol for instructions, addresses, and data |
| SCK | Serial clock input | Synchronizes all transfers; rise/fall times ≤2 μs required for reliable timing compliance |
Key Features
| Feature | Design Value |
|---|---|
| 16-byte page write | Enables burst programming of calibration data blocks without exceeding page boundary, reducing total write cycles |
| Block write protection | BP0/BP1 bits allow selective protection of upper 1/4, 1/2, or full array - prevents accidental overwrite of boot parameters |
| HOLD pin functionality | Pauses ongoing SPI transfer mid-sequence, allowing host MCU to service higher-priority interrupts without reinitializing communication |
| Power-on write disable | Write enable latch resets at power-up, preventing spurious writes during brown-out or reset conditions |
| ESD robustness | 4 kV HBM rating ensures reliability in handling-sensitive manufacturing and field-repair environments |
Applications
| Industrial Sensor Node | Automotive Body Control Module |
|---|---|
Use Scenario: Storing factory-trimmed offset/gain values and runtime-calibrated temperature compensation coefficients. IC Role / Device Role / Timing Role: Nonvolatile configuration storage accessed during power-up and periodic self-test sequences. Use Value: Eliminates need for external trimming components and enables field recalibration via diagnostic tools using standard SPI commands. | Use Scenario: Retaining user preferences (window position, mirror angle) and fault log history across ignition cycles. IC Role / Device Role / Timing Role: Low-power parameter archive with guaranteed write integrity during battery voltage dips. Use Value: WP pin hardwires protection during normal operation; HOLD allows safe interruption during CAN message processing. |
| Medical Diagnostic Handheld | Smart Energy Meter |
Use Scenario: Securely storing calibration constants and regulatory audit logs compliant with IEC 62304. IC Role / Device Role / Timing Role: Tamper-resistant data vault with write-cycle-limited logging capability. Use Value: 1M endurance supports >10 years of daily calibration events; BP bits lock critical calibration sector against firmware update errors. | Use Scenario: Recording tariff schedules, demand-response event timestamps, and meter firmware version history. IC Role / Device Role / Timing Role: Infrequently written, long-retention storage interfaced directly to metrology SoC's SPI peripheral. Use Value: 2.5 V minimum VCC ensures operation during supercapacitor backup power; 500 nA standby current extends backup runtime. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 25LC040T/ST | Tape-and-reel packaging variant; identical electrical specs and pinout to 25LC040X/ST | No functional difference - selected for automated SMT assembly vs. sample evaluation | Choose 25LC040T/ST for volume production; 25LC040X/ST for prototyping or manual placement |
| AT25040B-SSHL-T | Same 4 Kbit SPI EEPROM but with 1.8–5.5 V VCC range and 20 MHz max clock; different STATUS register bit layout | Supports lower-voltage microcontrollers and faster command throughput; requires firmware adaptation for BP bit handling | Select AT25040B-SSHL-T only when migrating to 1.8 V systems or requiring >2 MHz SPI speed |
Compared with 25LC040X/ST, 25LC040T/ST offers identical functionality in tape-and-reel format for SMT lines, while AT25040B-SSHL-T provides wider voltage range and higher speed at the cost of STATUS register compatibility - making 25LC040X/ST optimal for stable 3.3 V industrial designs requiring pinout-specific TSSOP layout.
Availability
25LC040X/ST is available at Aetrix Electronics and suitable for industrial sensor nodes, automotive body control modules, medical handheld diagnostics, and smart energy meters requiring stable component supply with guaranteed long-term obsolescence management.
Supply support for 25LC040X/ST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontroller, analog, and Flash-IP solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The 25LC040X/ST belongs to Microchip's legacy 25XX040 serial EEPROM family, designed specifically for reliable, low-power nonvolatile storage in resource-constrained embedded systems where SPI interface simplicity and hardware write protection are critical.
FAQ
What is the pin 1 function on the 25LC040X/ST TSSOP package?
Pin 1 of the 25LC040X/ST is the HOLD input, not Chip Select - this alternate pinout distinguishes it from standard SOIC/PDIP variants. HOLD must be held high during normal operation and pulled low (while SCK is low) to pause ongoing SPI transfers. This layout simplifies routing in dense PCBs where HOLD signal placement is prioritized over CS.
Does the 25LC040X/ST support 3.3 V microcontrollers?
Yes, the 25LC040X/ST operates across 2.5–5.5 V, making it fully compatible with 3.3 V systems. Its 2 MHz max clock frequency at VCC ≥ 2.5 V ensures reliable SPI communication with common 3.3 V MCUs without level shifters, and its 500 nA standby current minimizes system power draw during sleep modes.
How does write protection work on the 25LC040X/ST?
The 25LC040X/ST implements dual-layer write protection: hardware via the WP pin (low = all writes disabled), and software via BP0/BP1 bits in the STATUS register (configurable 0–100% array protection). WP takes precedence - if low, no writes occur regardless of WREN latch or BP settings - ensuring fail-safe prevention of accidental overwrites.
What is the maximum write speed for the 25LC040X/ST?
The 25LC040X/ST supports up to 2 MHz SPI clock frequency at VCC ≥ 2.5 V, enabling byte writes at ~2.5 μs per bit. However, internal write cycles take ≤5 ms per page (16 bytes), so effective sustained write throughput is limited by this self-timed erase-and-program step, not clock rate.
Is the 25LC040X/ST suitable for automotive applications?
The 25LC040X/ST is rated for industrial temperature range (−40°C to +85°C), not automotive (−40°C to +125°C). For under-hood or dashboard applications requiring AEC-Q100 qualification, Microchip's 25C040 variant - specified for E-grade (−40°C to +125°C) - should be used instead of the 25LC040X/ST.
25LC040X/ST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 4Kbit
- Memory Organization:
- 512 x 8
- Memory Interface:
- SPI
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
25LC040X/ST FAQ
1.How can I place an order for 25LC040X/ST through Aetrix?
Please submit a Request for Quotation (RFQ) for 25LC040X/ST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 25LC040X/ST reliable?
The price and inventory of 25LC040X/ST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 25LC040X/ST is usually 5 days.
3.What payment methods are accepted for 25LC040X/ST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 25LC040X/ST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 25LC040X/ST?
25LC040X/ST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 25LC040X/ST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 25LC040X/ST?
For technical support, including 25LC040X/ST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 25LC040X/ST requirements.
6.How does Aetrix verify that 25LC040X/ST is sourced from the original manufacturer or authorized distributors?
All 25LC040X/ST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 25LC040X/ST meets industry standards.
7.What is the process for return or replacement of 25LC040X/ST?
All 25LC040X/ST units undergo pre-shipment inspection (PSI). If there is an issue with 25LC040X/ST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 25LC040X/ST part is unused and in its original packaging.
Return procedure for 25LC040X/ST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
25LC040X/ST Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
